STMICROELECTRONICS STW40NS15

STW40NS15
N-CHANNEL 150V - 0.042Ω - 40A TO-247
MESH OVERLAY™ MOSFET
PRELIMINARY DATA
TYPE
STW40NS15
■
■
■
■
VDSS
RDS(on)
ID
150 V
<0.052Ω
40A
TYPICAL RDS(on) = 0.042Ω
EXTREMELY HIGH dv/dt CAPABILITY
VERY LOW INTRINSIC CAPACITANCES
GATE CHARGE MINIMIZED
DESCRIPTION
This powermos MOSFET is designed using the
company’s consolidated strip layout-based MESH
OVERLAY™ process. This technology matches
and improves the performances compared with
standard parts from various sources.
3
2
1
TO-247
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■ HIGH CURRENT SWITCHING
■ UNINTERRUPTIBLE POWER SUPPLY (UPS)
■ PRIMARYSWITCH IN ISOLATED DC-DC
CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol
Value
Unit
Drain-source Voltage (VGS = 0)
150
V
Drain-gate Voltage (RGS = 20 kΩ)
150
V
Gate- source Voltage
±20
V
ID
Drain Current (continuos) at TC = 25°C
40
A
ID
Drain Current (continuos) at TC = 100°C
25
A
Drain Current (pulsed)
160
A
VDS
VDGR
VGS
IDM
(1)
PTOT
Parameter
Total Dissipation at TC = 25°C
Derating Factor
dv/dt
Peak Diode Recovery voltage slope
Tstg
Storage Temperature
Tj
Max. Operating Junction Temperature
180
W
0.933
W/°C
9
V/ns
–65 to 175
°C
175
°C
(•)Pulse width limited by safe operating area
October 2000
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
1/6
STW40NS15
THERMAL DATA
Rthj-case
Thermal Resistance Junction-case Max
0.83
°C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
°C/W
Rthc-sink
Thermal Resistance Case-sink Typ
0.5
°C/W
Maximum Lead Temperature For Soldering Purpose
300
°C
Tl
AVALANCHE CHARACTERISTICS
Symbol
Parameter
Max Value
Unit
IAR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
40
A
EAS
Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
500
mJ
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol
V(BR)DSS
IDSS
IGSS
Parameter
Test Conditions
Min.
Typ.
Max.
150
Unit
Drain-source
Breakdown Voltage
ID = 250 µA, VGS = 0
V
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
1
µA
VDS = Max Rating, TC = 125 °C
10
µA
Gate-body Leakage
Current (VDS = 0)
VGS = ±20V
±100
nA
ON (1)
Symbol
Parameter
Test Conditions
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250µA
RDS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 40 A
ID(on)
On State Drain Current
VDS > ID(on) x RDS(on)max,
VGS = 10V
Min.
Typ.
Max.
Unit
2
3
4
V
0.044
0.052
Ω
40
A
DYNAMIC
Symbol
gfs (1)
2/6
Parameter
Forward Transconductance
Test Conditions
VDS > ID(on) x RDS(on)max,
ID = 20A
VDS = 25V, f = 1 MHz, VGS = 0
Min.
Typ.
Max.
Unit
20
S
2400
pF
Ciss
Input Capacitance
Coss
Output Capacitance
380
pF
Crss
Reverse Transfer
Capacitance
160
pF
STW40NS15
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol
td(on)
tr
Parameter
Turn-on Delay Time
Rise Time
Test Conditions
Min.
Typ.
Max.
Unit
VDD = 75V, ID = 20A
RG = 4.7Ω, VGS = 10V
(see test circuit, Figure 3)
25
ns
45
ns
VDD = 120V, ID = 40A,
VGS = 10V
100
Qg
Total Gate Charge
110
nC
Qgs
Gate-Source Charge
17
nC
Qgd
Gate-Drain Charge
47
nC
SWITCHING OFF
Symbol
td(off)
Tf
tr(Voff)
Parameter
Turn-off Delay Time
Fall Time
Off-voltage Rise Time
Test Conditions
Min.
Typ.
Max.
Unit
VDD = 75V, ID = 20A
RG = 4.7Ω, VGS = 10V
(see test circuit, Figure 3)
85
Vclamp = 120V, ID = 20 A,
RG = 4.7Ω, VGS = 10V
(see test circuit, Figure 5)
47
ns
tf
Fall Time
35
ns
tc
Cross-over Time
70
ns
SOURCE DRAIN DIODE
Symbol
ISD
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Source-drain Current
40
A
ISDM (2)
Source-drain Current (pulsed)
160
A
VSD (1)
Forward On Voltage
ISD = 40A, VGS = 0
1.5
V
trr
Reverse Recovery Time
ISD = 40A, di/dt = 100A/µs,
VDD = 50V, Tj = 150°C
(see test circuit, Figure 5)
Qrr
IRRM
270
ns
Reverse Recovery Charge
200
nC
Reverse Recovery Current
1.5
A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3/6
STW40NS15
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
4/6
STW40NS15
TO-247 MECHANICAL DATA
mm
DIM.
MIN.
TYP.
inch
MAX.
MIN.
TYP.
MAX.
A
4.7
5.3
0.185
0.209
D
2.2
2.6
0.087
0.102
E
0.4
0.8
0.016
0.031
F
1
1.4
0.039
0.055
F3
2
2.4
0.079
0.094
F4
3
3.4
0.118
0.134
G
10.9
0.429
H
15.3
15.9
0.602
0.626
L
19.7
20.3
0.776
0.779
L3
14.2
14.8
0.559
0.582
L4
34.6
1.362
L5
5.5
0.217
M
2
3
0.079
0.118
P025P
5/6
STW40NS15
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
© 2000 STMicroelectronics – Printed in Italy – All Rights Reserved
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