STMICROELECTRONICS STW80NF55-08

STW80NF55-08
N-CHANNEL 55V - 0.0065Ω - 80A TO-247
STripFET™ POWER MOSFET
TYPE
STW80NF55-08
■
■
■
■
VDSS
RDS(on)
ID
55 V
< 0.008 Ω
80 A
TYPICAL RDS(on) = 0.0065Ω
EXCEPTIONAL dv/dt CAPABILITY
100% AVALANCHE TESTED
LOW THRESHOLD DRIVE
3
2
1
DESCRIPTION
This Power MOSFET is the latest development of
STMicroelectronics unique "Single Feature Size™"
strip-based process. The resulting transistor shows
extremely high packing density for low on-resistance, rugged avalanche characteristics and less
critical alignment steps therefore a remarkable
manufacturing reproducibility.
TO-247
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■ DC-AC & DC-DC CONVERTERS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ SOLENOID AND RELAY DRIVERS
■ MOTOR CONTROL, AUDIO AMPLIFIERS
ABSOLUTE MAXIMUM RATINGS
Symbol
VDS
VDGR
Value
Unit
Drain-source Voltage (VGS = 0)
Parameter
55
V
Drain-gate Voltage (RGS = 20 kΩ)
55
V
VGS
Gate- source Voltage
±20
V
ID (*)
Drain Current (continuous) at TC = 25°C
80
A
ID
Drain Current (continuous) at TC = 100°C
80
A
Drain Current (pulsed)
320
A
Total Dissipation at TC = 25°C
300
W
IDM (l)
PTOT
Derating Factor
EAS (1)
Tstg
Tj
Single Pulse Avalanche Energy
Storage Temperature
Max. Operating Junction Temperature
(●) Pulse width limited by safe operating area
September 2002
2
W/°C
870
mJ
–65 to 175
°C
175
°C
(1) Starting T j = 25°C, I D = 40A, VDD = 40V
(*) Current Limited by wire bonding
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STW80NF55-08
THERMAL DATA
Rthj-case
Thermal Resistance Junction-case Max
0.5
°C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
°C/W
Maximum Lead Temperature For Soldering Purpose
300
°C
Tl
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol
V(BR)DSS
IDSS
IGSS
Parameter
Test Conditions
Min.
Typ.
Max.
55
Unit
Drain-source
Breakdown Voltage
ID = 250 µA, VGS = 0
V
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
1
µA
VDS = Max Rating, TC = 125 °C
10
µA
Gate-body Leakage
Current (VDS = 0)
VGS = ±20V
±100
nA
ON (1)
Symbol
Parameter
Test Conditions
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250µA
RDS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 40 A
Min.
Typ.
Max.
Unit
2
3
4
V
0.0065
0.008
Ω
Typ.
Max.
Unit
DYNAMIC
Symbol
gfs (1)
2/8
Parameter
Forward Transconductance
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer
Capacitance
Test Conditions
VDS > 2.5 V, ID =18 A
VDS = 25V, f = 1 MHz, VGS = 0
Min.
20
S
3850
pF
800
pF
250
pF
STW80NF55-08
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol
td(on)
tr
Qg
Qgs
Qgd
Parameter
Turn-on Delay Time
Rise Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Test Conditions
Min.
VDD = 27V, ID = 40A
RG = 4.7Ω VGS = 10V
(see test circuit, Figure 3)
VDD = 80V, ID = 80A,
VGS = 10V
Typ.
Max.
Unit
25
ns
85
ns
115
24
46
150
nC
nC
nC
Typ.
Max.
Unit
SWITCHING OFF
Symbol
Parameter
Test Conditions
Min.
td(off)
tf
Turn-off-Delay Time
Fall Time
VDD = 27V, ID = 40A,
RG = 4.7Ω, VGS = 10V
(see test circuit, Figure 3)
70
25
ns
ns
td(off)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
Vclamp =44V, ID =80A
RG = 4.7Ω, VGS = 10V
(see test circuit, Figure 5)
85
75
110
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
Max.
Unit
Source-drain Current
80
A
ISDM (1)
Source-drain Current (pulsed)
320
A
VSD (2)
Forward On Voltage
ISD = 80A, VGS = 0
1.5
V
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 80A, di/dt = 100A/µs,
VDD = 50V, Tj = 150°C
(see test circuit, Figure 5)
ISD
trr
Qrr
IRRM
Parameter
Test Conditions
Min.
Typ.
80
250
6.4
ns
nC
A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedance
3/8
STW80NF55-08
Output Characteristics
Tranfer Characteristics
Tranconductance
Static Drain-Source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
4/8
STW80NF55-08
Normalized Gate Thereshold Voltage vs Temp.
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
Normalized Breakdown Voltage vs Temperature
5/8
STW80NF55-08
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8
STW80NF55-08
TO-247 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
inch
MAX.
MIN.
A
4.85
5.15
0.19
TYP.
0.20
D
2.20
2.60
0.08
0.10
E
0.40
0.80
0.015
0.03
F
1
1.40
0.04
0.05
F1
3
0.11
F2
2
0.07
MAX.
F3
2
2.40
0.07
0.09
F4
3
3.40
0.11
0.13
G
10.90
0.43
H
15.45
15.75
0.60
0.62
L
19.85
20.15
0.78
0.79
L1
3.70
4.30
0.14
L2
L3
18.50
14.20
0.17
0.72
14.80
0.56
0.58
L4
34.60
1.36
L5
5.50
0.21
M
2
3
0.07
0.11
V
5º
5º
V2
60º
60º
Dia
3.55
3.65
0.14
0.143
7/8
STW80NF55-08
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consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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