STP8NK80Z - STP8NK80ZFP STW8NK80Z N-CHANNEL 800V - 1.3Ω - 6.2A TO-220/TO-220FP/TO-247 Zener-Protected SuperMESH™Power MOSFET TYPE STP8NK80Z STP8NK80ZFP STW8NK80Z ■ ■ ■ ■ ■ ■ VDSS RDS(on) ID Pw 800 V 800 V 800 V < 1.5 Ω < 1.5 Ω < 1.5 Ω 6.2 A 6.2 A 6.2 A 140 W 30 W 140 W TYPICAL RDS(on) = 1.3 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED GATE CHARGE MINIMIZED VERY LOW INTRINSIC CAPACITANCES VERY GOOD MANUFACTURING REPEATIBILITY 3 1 3 2 TO-220 1 2 TO-220FP 3 2 1 TO-247 DESCRIPTION The SuperMESH™ series is obtained through an extreme optimization of ST’s well established stripbased PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products. INTERNAL SCHEMATIC DIAGRAM APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING ■ IDEAL FOR OFF-LINE POWER SUPPLIES, ADAPTORS AND PFC ■ LIGHTING ■ ORDERING INFORMATION SALES TYPE MARKING PACKAGE PACKAGING STP8NK80Z P8NK80Z TO-220 TUBE STP8NK80ZFP P8NK80ZFP TO-220FP TUBE STW8NK80Z W8NK80Z TO-247 TUBE February 2003 1/11 STP8NK80Z - STP8NK80ZFP - STW8NK80Z ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit STP8NK80Z - STW8NK80Z VDS VDGR VGS Drain-source Voltage (VGS = 0) 800 V Drain-gate Voltage (RGS = 20 kΩ) 800 V Gate- source Voltage ± 30 V ID Drain Current (continuous) at TC = 25°C ID Drain Current (continuous) at TC = 100°C IDM () PTOT 6.2 6.2 (*) A 3.9 3.9 (*) A Drain Current (pulsed) 24.8 24.8 (*) A Total Dissipation at TC = 25°C 140 30 W Derating Factor 1.12 0.24 W/°C VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5 KΩ) dv/dt (1) STP8NK80ZFP 4000 V 4.5 V/ns Peak Diode Recovery voltage slope VISO Insulation Withstand Voltage (DC) Tj Tstg Operating Junction Temperature Storage Temperature - 2500 V -55 to 150 °C ( ) Pulse width limited by safe operating area (1) ISD ≤6.2A, di/dt ≤200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX. (*) Limited only by maximum temperature allowed THERMAL DATA Rthj-case Thermal Resistance Junction-case Max Rthj-amb Thermal Resistance Junction-ambient Max Tl TO-220 TO-220FP TO-247 0.89 4.2 0.89 °C/W 50 °C/W 62.5 Maximum Lead Temperature For Soldering Purpose 300 °C AVALANCHE CHARACTERISTICS Symbol Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Parameter 6.2 A EAS Single Pulse Avalanche Energy (starting Tj = 25°C, ID = IAR, VDD = 50 V) 300 mJ GATE-SOURCE ZENER DIODE Symbol Parameter Test Conditions Min. BVGSO Gate-Source Breakdown Voltage Igs=± 1 mA (Open Drain) 30 Typ. Max. Unit V PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. 2/11 STP8NK80Z - STP8NK80ZFP - STW8NK80Z ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON/OFF Symbol Parameter Test Conditions Min. Typ. Max. Drain-source Breakdown Voltage ID = 1 mA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating, TC = 125 °C 1 50 µA µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20V ±10 µA VGS(th) Gate Threshold Voltage VDS = VGS, ID = 100 µA RDS(on) Static Drain-source On Resistance VGS = 10 V, ID = 3.1 A V(BR)DSS 800 Unit 3 V 3.75 4.5 V 1.3 1.5 Ω Typ. Max. Unit DYNAMIC Symbol gfs (1) Ciss Coss Crss Coss eq. (3) Parameter Test Conditions Forward Transconductance VDS = 15 V, ID = 3.1 A Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25 V, f = 1 MHz, VGS = 0 Equivalent Output Capacitance VGS = 0, VDS = 640 V Min. 5.2 S 1320 143 27 pF pF pF 58 pF SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 400 V, ID = 3.1 A RG = 4.7Ω, VGS = 10 V (Resistive Load see, Figure 3) 17 30 ns ns Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 640 V, ID = 6.2 A, VGS = 10 V 46 8.5 25 nC nC nC SWITCHING OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off Delay Time Fall Time VDD = 400 V, ID = 3.1 A RG = 4.7Ω VGS = 10 V (Resistive Load see, Figure 3) 48 28 ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time VDD = 640V, ID = 6.2 A, RG = 4.7Ω, VGS = 10 V (Inductive Load see, Figure 5) 9 9 18 ns ns ns SOURCE DRAIN DIODE Symbol Parameter Test Conditions ISD ISDM (2) Source-drain Current Source-drain Current (pulsed) VSD (1) Forward On Voltage ISD = 6.2 A, VGS = 0 Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 6.2 A, di/dt = 100 A/µs VDD = 50 V, Tj = 150°C (see test circuit, Figure 5) trr Qrr IRRM Min. Typ. 460 2990 13 Max. Unit 6.2 24.8 A A 1.6 V ns nC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 3/11 STP8NK80Z - STP8NK80ZFP - STW8NK80Z Safe Operating Area For TO-220 Thermal Impedance For TO-220 Safe Operating Area For TO-220FP Thermal Impedance For TO-220FP Safe Operating Area For TO-247 Thermal Impedance For TO-247 4/11 STP8NK80Z - STP8NK80ZFP - STW8NK80Z Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 5/11 STP8NK80Z - STP8NK80ZFP - STW8NK80Z Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature Maximum Avalanche Energy vs Temperature 6/11 STP8NK80Z - STP8NK80ZFP - STW8NK80Z Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 7/11 STP8NK80Z - STP8NK80ZFP - STW8NK80Z TO-220 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 D1 0.107 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 DIA. 3.75 3.85 0.147 0.151 D1 C D A E L4 H2 G G1 F1 L2 F2 F Dia. L5 L9 L7 L6 8/11 L4 P011C STP8NK80Z - STP8NK80ZFP - STW8NK80Z TO-220FP MECHANICAL DATA mm. DIM. MIN. A 4.4 inch TYP MAX. MIN. TYP. MAX. 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.5 0.045 0.067 F2 1.15 1.5 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 28.6 30.6 1.126 1.204 L4 9.8 10.6 .0385 0.417 L5 2.9 3.6 0.114 0.141 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 B D A E L3 L3 L6 F2 H G G1 ¯ F F1 L7 L2 L5 1 2 3 L4 9/11 STP8NK80Z - STP8NK80ZFP - STW8NK80Z TO-247 MECHANICAL DATA mm DIM. MIN. MAX. MIN. A 4.7 5.3 0.185 0.209 D 2.2 2.6 0.087 0.102 E 0.4 0.8 0.016 0.031 F 1 1.4 0.039 0.055 F3 2 2.4 0.079 0.094 F4 3 3.4 0.118 0.134 G TYP. inch 10.9 TYP. MAX. 0.429 H 15.3 15.9 0.602 0.626 L 19.7 20.3 0.776 0.779 L3 14.2 14.8 0.559 0.582 L4 34.6 1.362 L5 5.5 0.217 M 2 3 0.079 0.118 P025P 10/11 STP8NK80Z - STP8NK80ZFP - STW8NK80Z Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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