STMICROELECTRONICS STY25NA60

STY25NA60

N - CHANNEL 600V - 0.225Ω - 25 A - Max247
EXSTREMELY LOW GATE CHARGE POWER MOSFET
TYPE
STY25NA60
■
■
■
■
■
■
■
V DSS
R DS(on)
ID
600 V
< 0.24 Ω
25 A
TYPICAL RDS(on) = 0.225 Ω
EFFICIENT AND RELIABLE MOUNTING
THROUGH CLIP
± 30V GATE TO SOURCE VOLTAGE RATING
100% AVALANCHE TESTED
LOW INTRINSIC CAPACITANCE
GATE CHARGE MINIMIZED
REDUCED VOLTAGE SPREAD
DESCRIPTION
The Max247 package is a new high volume
power package exibiting the same footprint as the
industry standard TO-247, but designed to accomodate much larger silicon chips, normally supplied in bigger packages such as TO-264.The increased die capacity makes the device idealto reduce component count in multiple paralleled designs and save board space with respect to larger
packages.
1
2
3
Max247
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING
■ SWITCH MODE POWER SUPPLY (SMPS)
■ DC-AC CONVERTER FOR WELDING
EQUIPMENT AND UNINTERRUPTABLE
POWER SUPPLY AND MOTOR DRIVE
■
ABSOLUTE MAXIMUM RATINGS
Symb ol
V DS
V DGR
V GS
Value
Un it
Drain-source Voltage (VGS = 0)
Parameter
600
V
Drain- gate Voltage (RGS = 20 kΩ)
600
V
± 30
V
G ate-source Voltage
o
ID
Drain Current (continuous) at Tc = 25 C
25
A
ID
Drain Current (continuous) at Tc = 100 o C
16.5
A
Drain Current (pulsed)
100
A
I DM (•)
P tot
T s tg
Tj
o
T otal Dissipation at Tc = 25 C
300
W
Derating F actor
2.4
W /o C
Storage Temperature
Max. O perating Junction Temperature
-55 to 150
o
C
150
o
C
(•) Pulse width limited by safe operating area
March 1999
1/8
STY25NA60
THERMAL DATA
R thj -case
R thj -amb
R thc-sink
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Thermal Resistance Case-Heatsink
with Conductive Grease
Max
Max
Typ
o
0.42
40
0.05
C/W
C/W
o
C/W
o
AVALANCHE CHARACTERISTICS
Symbo l
Parameter
IAR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
E AS
Single Pulse Avalanche Energy
o
(starting Tj = 25 C, I D = IAR , VDD = 50 V)
Max Valu e
Unit
25
A
3000
mJ
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symbo l
V (BR)DSS
Parameter
Drain-source
Breakdown Voltage
Test Con ditions
I D = 250 µA
V DS = Max Rating
Zero G ate Voltage
Drain Current (V GS = 0) V DS = Max Rating
IGSS
Gate-body Leakage
Current (VDS = 0)
T yp.
Max.
600
V GS = 0
I DSS
Min.
Unit
V
T c = 125 oC
V GS = ± 30 V
50
500
µA
µA
± 100
nA
ON (∗)
Symbo l
Parameter
Test Con ditions
ID = 250 µA
V GS(th)
Gate Threshold
Voltage
R DS(on)
Static Drain-source O n V GS = 10 V
Resistance
I D(o n)
V DS = V GS
Min.
T yp.
Max.
Unit
3
4
5
V
0.225
0.24
Ω
I D = 12.5 A
25
On State Drain Current V DS > ID(o n) x R DS(on )ma x
V GS = 10 V
A
DYNAMIC
Symbo l
g f s (∗)
C iss
C os s
C rss
2/8
Parameter
Test Con ditions
Forward
Transconductance
V DS > ID(o n) x R DS(on )ma x
ID = 12.5 A
Input Capacitance
Output Capacitance
Reverse T ransfer
Capacitance
V DS = 25 V
V GS = 0
f = 1 MHz
Min.
T yp.
20
Max.
Unit
S
6200
690
195
pF
pF
pF
STY25NA60
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbo l
Parameter
Test Con ditions
t d(on)
tr
Turn-on delay Time
Rise Time
V DD = 300 V
I D = 12.5 A
V GS = 10 V
R G = 4.7 Ω
(see test circuit, figure 3)
Qg
Q gs
Q gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V DD = 480 V ID = 25 A V GS = 10 V
Min.
T yp.
Max.
45
70
Unit
ns
ns
240
25
115
315
nC
nC
nC
T yp.
Max.
Unit
SWITCHING OFF
Symbo l
tr (Voff)
tf
tc
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Con ditions
Min.
70
25
105
V DD = 480 V
I D = 25 A
V GS = 10 V
R G = 4.7 Ω
(see test circuit, figure 5)
ns
ns
ns
SOURCE DRAIN DIODE
Symbo l
ISD
I SDM (•)
V SD (∗)
t rr
Q rr
I RRM
Parameter
Test Con ditions
Min.
T yp.
Source-drain Current
Source-drain Current
(pulsed)
Forward On Voltage
I SD = 25 A
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
di/dt = 100 A/µs
I SD = 25 A
T j = 150 o C
V DD = 100 V
(see test circuit, figure 5)
V GS = 0
Max.
Unit
25
100
A
A
2
V
840
ns
19.5
µC
46.5
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
3/8
STY25NA60
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
4/8
STY25NA60
Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/8
STY25NA60
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8
STY25NA60
Max247 MECHANICAL DATA
mm
DIM.
MIN.
A
4.70
TYP.
inch
MAX.
MIN.
TYP.
MAX.
5.30
A1
2.20
2.60
b
1.00
1.40
b1
2.00
2.40
b2
3.00
3.40
c
0.40
0.80
D
19.70
20.30
e
5.35
5.55
E
15.30
15.90
L
14.20
15.20
L1
3.70
4.30
P025Q
7/8
STY25NA60
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are
subjec t to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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 1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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