TDA1675A VERTICAL DEFLECTION CIRCUIT .. . . .. .. . SYNCHRONISATION CIRCUIT ESD PROTECTED PRECISION OSCILLATOR AND RAMP GENERATOR POWER OUTPUT AMPLIFIER WITH HIGH CURRENT CAPABILITY FLYBACK GENERATOR VOLTAGE REGULATOR PRECISION BLANKING PULSE GENERATOR THERMAL SHUT DOWN PROTECTION CRT SCREEN PROTECTION CIRCUIT WHICH BLANKS THE BEAM CURRENT IN THE EVENT OF LOSS OF VERTICAL DEFLECTION CURRENT MULTIWATT 15 (Plastic Package) DESCRIPTION ORDER CODE : TDA1675A The TDA1675A is a monolithic integrated circuit in 15-lead Multiwatt® package. It is a full performance and very efficient vertical deflection circuit intended for direct drive of the yoke of 110o colour TV picture tubes. It offers a wide range of applications also in portable CTVs, B&W TVs, monitors and displays. PIN CONNECTIONS (top view) FLYBACK SUPPLY BLANKING OUTPUT AMPLIFIER INPUT (-) AMPLIFIER INPUT (+) RAMP OUTPUT RAMP GENERATOR GROUND HEIGHT ADJUSTMENT OSCILLATOR SYNC. INPUT OSCILLATOR OSCILLATOR AMPLIFIER SUPPLY AMPLIFIER OUTPUT 1675A-01.EPS 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Tab connected to Pin 8 September 1993 1/11 TDA1675A BLOCK DIAGRAM +V S + BLANKING OUT 13 14 2 + C BLANK GENERATOR AND CRT PROTECTION VOLTAGE REGULATOR FLYBACK GENERATOR f 15 6 11 Ro R3 Co CLOCK PULSE 3 R1 POWER AMP. - Ly Ry 1 Iy R2 Re 12 7 BUFFER STAGE SYNC. SYNC. 7 9 THERMAL PROTECTION 10 Ra Rb Ca HEIGHT Rd + Rc 8 + Cc LIN Rf Cb 1675A-02.EPS RAMP GENERATOR OSCILLATOR YOKE 4 + ABSOLUTE MAXIMUM RATINGS VS V1, V2 V5 V11, V12 V13 Parameter Value Unit Supply Voltage at Pin 14 35 V Flyback Peak Voltage 65 V Sync. Input Voltage 20 V VS - 10 V Power Amplifier Input Voltage Voltage at Pin 13 VS IO Output Current (non repetitive) at t = 2ms 3 A IO Output Peak Current at f = 50Hz t > 10µs 2 A IO Output Peak Current at f = 50Hz t ≤ 10 µs 3.5 A I15 Pin 15 Peak-to-peak Flyback Current at f = 50Hz, tfly ≤ 1.5ms 3 A I15 Pin 15 D.C. Current at V1 < V14 100 mA Ptot Maximum Power Dissipation at Tcase ≤ 60oC 30 Tstg, Tj Storage and Junction Temperature W o - 40, + 150 C 1675A-01.TBL Symbol Symbol Parameter Value Unit RTH(j-c) Thermal Resistance Junction-case Max. 3 o RTH(j-a) Thermal Resistance Junction-ambient Max. 40 o 2/11 C/W C/W 1675A-02.TBL THERMAL DATA TDA1675A DC ELECTRICAL CHARACTERISTICS (VS = 35V, Tamb = 25oC, unless otherwise specified) Parameter Pin 2 quiescent current Ramp generator bias current Ramp generator current Test conditions I1 = 0 V9 = 0 V9 = 0 ; - I7 = 20µA Ramp generator non linearity ∆V9 = 0 to 15V, - I7 = 20µA Pin 14 quiescent current Quiescent output voltage Min. 18.5 VS = 35V, Ra = 2.2kΩ, Rb = 1kΩ VS = 15V, Ra = 390Ω, Rb = 1kΩ I1 = 1.2A, - I1 = 1.2A 16.4 6.9 - I7 = 20µA 6.3 V1L V1H V4 V7 ∆V 7 ∆VS Output saturation voltage to ground Output saturation voltage to supply Oscillator virtual ground Regulated voltage at pin 7 Regulated voltage drift with supply voltage ∆VS = 15 to 35V V11 V13 V15 Amplifier input (+) reference voltage Blanking output saturation voltage Pin 15 saturation voltage to ground I13 = 10 mA I15 = 20 mA 4.1 Typ. 16 0.02 20 Max. 36 1 21.5 Unit mA µA µA Fig. 1b 1b 1b 0.2 1 % 1b 25 17.8 7.5 1 1.6 0.45 6.6 45 19.5 8.1 1.4 2.2 1b 1a 1 2 4.4 0.35 1 4.7 0.5 1.5 mA V V V V V V mV V V V V 7 1c 1d 1b 1b 1b 1b 1a 1a 1675A-03.TBL Symbol I2 - I9 - I9 ∆I 9 I9 I14 V1 Figure 1 : DC Test Circuit. Figure 1a Figure 1b I 15 V15 VS VS I 13 13 I2+ I1 A 14 2 B 1V 15 7 11 I 14 14 2 4 1 V4 3 1 8V I1 22kΩ V13 V11 75kΩ 5 11 8 7 9 8 -I 9 10 Rb V7 -I 9 0.1µF Figure 1c -I 7 1675A-04.EPS 9 10 V1 12 1675A-03.EPS 4 1V 12 5 47kΩ Ra V9 Figure 1d VS VS 14 14 2 +I 1 4 4 1 12 11 5 0.1µF 10 8 1 1V V1L 12 1675A-05.EPS 1V 8V V1H 8V 11 5 10 8 -I 1 1675A-06.EPS 2 0.1µF 3/11 TDA1675A AC ELECTRICAL CHARACTERISTICS (Refer to A.C. test circuit of fig. 2, Tamb = 25oC, VS = 24V, f = 50Hz, unless otherwise specified) Parameter Test conditions Min. IY = 2APP Typ. Max. Unit IS Supply Current I5 Sync Input Current Required to Sync 295 V1 Flyback Voltage Iy = 2App 50 V V3 Peak-to-peak Oscillator Sawtooth Voltage I5 = 0 I5 = 100µA 3.6 3.4 V V 1.85 V Start Scan Level of the Input Ramp V10TH(L) Flyback Time Iy = 2App tBLANK Blanking Pulse Duration fo = 50Hz, Tj = 75 C fo = 60Hz, Tj = 75oC fo Free Running Frequency ∆f Synchronization Range Tj Junction Temperature for Thermal Shut-down tFLY mA µA 100 0.6 o ms 1.33 1.4 1.17 1.47 ms ms Ro = 7.5kΩ, Co = 330nF, Tj = 75oC Ro = 6.2kΩ, Co = 330nF, Tj = 75oC 42 43.5 52.5 46 Hz Hz I5 = 100µA, Tj = 75oC 14 16 Hz o 145 C Peak-to-peak Output Noise VON 35 mVPP 1675A-04.TBL Symbol Figure 2 : AC Test Circuit 1N4001 220µF 2.4kΩ t f Iy 0.1µF t blank 1000µF +V S V1 BLANKING OUT GND 13 14 15 2 1/fo 100µA 5 1 Co 2.2Ω 3 7 S2 220kΩ HEIGHT 4/11 9 560kΩ 180kΩ SERVICE SWITCH 15kΩ V3 5.9Ω 270Ω 2.4kΩ 12 4 11 10 0.1µF 1/fo IY 0.1µF 56kΩ 0.1µF 8 2200µF 47µF 100kΩ R f Iy 1/fo LINEARITY GND V10 V10thL Rf 1/fo 1675A-07.EPS S1 (R o ) 0.82Ω A B YOKE 10mH 0.22µF 1kΩ t blank TDA 1675A 0.33µF 4.7kΩ (FREQ.) 7.5kΩ 4.7kΩ 6 120Ω SYNC. IN t sync. TDA1675A Figure 3 : Application Circuit for Small Scree 90o CTV Set (Ry = 15Ω ; Ly = 30 mH ; Iy = 0.82 APP) 1N4001 220µF - 35V +V S C2 35V 470µF R3 10kΩ C4 D1 C3 0.1µF BLANKING OUT 13 SYNC. PULSE IN 14 15 2 0.1µF YOKE 5 1 C1 R1 4.7kΩ R9 2.2Ω 6 TDA 1675A Ro C7 R11 330Ω 0.22µF 7.5kΩ 1% 2.4kΩ 12 4 o 3 7 9 11 10 8 0.1µF R2 15kΩ SERVICE SWITCH R4 150kΩ S1 * RT1 * C5 0.1µF R5 390kΩ 100kΩ 56kΩ R7 910Ω 2% R8 120Ω C8 * R10 2% C9 1000µF 25V 5% R12 2.2Ω 47µF 10V RT2 LINEARITY * R6 100kΩ C6 0.1µF 1675A-08.EPS C 330nF 5% HEIGHT * The value depends on the characteristics of the CRT. The value shown is indicative only. TYPICAL PERFORMANCE Parameter Value Unit VS Minimum supply voltage 25 V IS Supply current 140 mA tFLY Flyback time 0.7 ms tBLKG Banking time 1.4 ms Free running frequency 43.5 Hz Power dissipation 2.4 W Thermal resistance of the heatsink o o for Tamb = 60oC and Tj max = 110 oC for Tamb = 60 C and Tj max = 120 C 13 16 o C/W o fO * PTOT * RTH(heatsink) C/W * Worst case condition. 5/11 1675A-05.TBL Symbol TDA1675A Figure 4 : Application Circuit for 110o CTV Set (Ry = 9.6Ω ; Ly = 24.6 mH ; Iy = 1.2 APP) 1N4001 220µF - 25V +V S C2 35V 470µF R3 10kΩ C4 D1 C3 0.1µF BLANKING OUT 13 14 15 2 0.1µF YOKE 5 1 C1 R1 4.7kΩ R9 2.2Ω 6 TDA 1675A Ro C7 R11 330Ω 0.22µF 7.5kΩ 1% 2.4kΩ 12 4 C o 330nF 5% 3 7 9 11 10 8 0.1µF R2 15kΩ SERVICE SWITCH R4 180kΩ S1 * RT1 * C5 0.1µF R5 470kΩ 220kΩ 56kΩ R7 1.2kΩ 2% R8 120Ω C8 * R10 2% C9 1500µF 16V 5% R12 1.2Ω 47µF 10V RT2 LINEARITY * R6 C6 0.1µF 100kΩ 1675A-09.EPS SYNC. PULSE IN HEIGHT * The value depends on the characteristics of the CRT. The value shown is indicative only. Symbol Value Unit VS Minimum supply voltage Parameter 22.5 V IS Supply current 185 mA tFLY Flyback time 1 ms tBLKG Banking time 1.4 ms Free running frequency 43.5 Hz Power dissipation 2.7 W Thermal resistance of the heatsink for Tamb = 60oC and Tj max = 110oC for Tamb = 60oC and Tj max = 120oC 11.5 14.5 o C/W o fO * PTOT * RTH(heatsink) * Worst case condition. 6/11 C/W 1675A-06.TBL TYPICAL PERFORMANCE TDA1675A Figure 5 : Application Circuit for 110o CTV Set (Ry = 5.9Ω ; Ly = 10 mH ; Iy = 1.95 APP) 1N4001 220µF - 25V +V S C2 35V 1000µF R3 10kΩ C4 D1 C3 0.1µF BLANKING OUT 13 14 15 2 0.1µF YOKE 5 1 C1 R1 4.7kΩ R9 2.2Ω 6 TDA 1675A Ro C7 R11 330Ω 0.22µF 7.5kΩ 1% 2.4kΩ 12 4 C o 330nF 5% 3 7 9 11 10 8 0.1µF R2 15kΩ SERVICE SWITCH R4 180kΩ S1 * RT1 * C5 0.1µF R5 560kΩ 220kΩ 56kΩ R7 1kΩ 2% R8 120Ω C8 * R10 2% C9 2200µF 16V 5% R12 0.82Ω 47µF 10V RT2 LINEARITY * R6 100kΩ C6 0.1µF 1675A-10.EPS SYNC. PULSE IN HEIGHT * The value depends on the characteristics of the CRT. The value shown is indicative only. Symbol Value Unit VS Minimum supply voltage Parameter 24 V IS Supply current 285 mA tFLY Flyback time 0.6 ms tBLKG Banking time 1.4 ms Free running frequency 43.5 Hz Power dissipation 4.3 W Thermal resistance of the heatsink for Tamb = 60oC and Tj max = 110oC for Tamb = 60oC and Tj max = 120oC 6.5 8.5 o C/W o fO * PTOT * RTH(heatsink) C/W * Worst case condition. 7/11 1675A-07.TBL TYPICAL PERFORMANCE TDA1675A Figure 6 : PC Board and Components Layout for the Application Circuits of Figures 3, 4 and 5 (1 : 1 scale) Ro TDA 1675A S1 R2 C3 Co R4 R3 C11 RT1 C4 R9 C6 R1 R5 D1 C7 RT2 R6 C5 R7 C8 R8 C1 C2 R10 C9 R12 YOKE GND SYNC. Iy IN TEST VS APPLICATION INFORMATION (Refer to the block diagram) Pin 6 Oscillator and sync gate (Clock generation) The oscillator is obtained by means of an integrator driven by a two threshold circuit that switches Ro high or low so allowing the charge or the discharge of Co under constant current conditions. The Sync input pulse at the Sync gate lowers the level of the upper threshold and than it controls the period duration. A clock pulse is generated. Pin 4 is the inverting input of the amplifier used as integrator. Pin 3 Pin 5 8/11 BLANK GND OUT is the output of the switch driven by the internal clock pulse generated by the threshold circuits. is the output of the amplifier. is the input for sync pulses (positive) Ramp generator and buffer stage A current mirror, the current intensity of which can be externally adjusted, charges one capacitor producing a linear voltage ramp. The internal clock pulse stops the increasing ramp by a very fast discharge of the capacitor a new voltage ramp is immediately allowed. 1675A-11.EPS R11 TDA1675A The required value of the capacitance is obtained by means of the series of two capacitors Ca and Cb, which allow the linearity control by applying a feedback between the output of the buffer and the tapping from Ca and Cb. Pin 7 The resistance between pin 7 and ground defines the current mirror current and than the height of the scanning. Pin 9 is the output of the current mirror that charges the series of Ca and Cb. This pin is also the input of the buffer stage. Pin 10 is the output of the buffer stage and it is internally coupled to the inverting input of the power amplifier through R1. Power amplifier This amplifier is a voltage-to-current power converter, the transconductance of which is externally defined by means of a negative current feedback. The output stage of the power amplifier is supplied by the main supply during the trace period, and by the flyback generator circuit during the most of the duration of the flyback time. The internal clock turns off the lower power output stage to start the flyback. The power output stage is thermally protected by sensing the junction temperature and then by putting off the current sources of the power stage. Pin 12 is the inverting input of the amplifier. An external network, Ra and Rb, defines the DClevel across Cy so allowing a correct centering of the output voltage. The series network Rc and Cc, in conjunction with Ra and Rb, applies at the feedback input I2 a small part of the parabola, available across Cy, and AC feedback voltage, taken across Rf. The external components Rc, Ra and Rd, produce the linearity correction on the output scanning currentIy and their values must be optimized for each type of CRT. Pin 11 is the non-inverting input. At this pin the non-inverting input reference voltage supplied by the voltage regulator can be measured. A capacitor must be connected to increase the performances from the noise point of view. Pin 1 is the output of the power amplifier and it drives the yoke by a negative slope cur- Pin 2 rent ramply. Re and the Boucherot cell are used to stabilize the power amplifier. The supply of the power output stage is forced at this pin. During the trace time the supply voltage is obtained from the main supply voltage VS by a diode, while during the retrace time this pin is supplied from the flyback generator. Flyback generator This circuit supplies both the power amplifier output stage and the yoke during the most of the duration of the flyback time (retrace). The internal clock opens the loop of the amplifier and lets pin 1 floating so allowing the rising of the flyback. Crossing the main supply voltage at pin 14, the flyback pulse front end drives the flyback generator in such a way allowing its output to reach and overcome the main supply voltage, starting from a low condition forced during the trace period. An integrated diode stops the rising of this output increase and the voltage jump is transferred by means of capacitor Cf at the supply voltage pin of the power stage (pin 2). When the current across the yoke changes its direction, the output of the flyback generator falls down to the main supply voltage and it is stopped by means of the saturated output darlington at a high level. At this time the flyback generator starts to supply the power output amplifier output stage by a diode inside the device. The flyback generator supplies the yoke too. Later, the increasing flyback current reaches the peak value and then the flyback time is completed: the trace period restarts. The output of the power amplifier (pin 1) falls under the main supply voltage and the output of the flyback generator is driven for a low state so allowing the flyback capacitor Cf to restore the energy lost during the retrace. Pin 15 is the output of the flyback generator that, when driven, jumps from low to high condition. An external capacitor Cf transfers the jump to pin 2 (see pin 2). Blanking generator and CRT protection This circuit is a pulse shaper and its output goes high during the blanking period or for CRT protection. The input is internally driven by the clock pulse that defines the width of the blanking time 9/11 TDA1675A when a flyback pulse has been generated. If the flyback pulse is absent (short cirucit or open cirucit of the yoke), the blanking output remains high so allowing the CRT protection. Pin 13 is an open collector output where the blanking pulse is available. Figure 8 : 2 V 1L V1H (V) VS = 35V 1.5 Voltage regulator The main supply voltage VS, is lowered and regulated internally to allow the required reference voltages for all the above described blocks. Pin 14 is the main supply voltage input VS (positive). Pin 8 is the GND pin or the negative input of VS Figure 7 : Output Saturation Voltage to Supply versus Output Peak Current I Y (App) 0.5 Output Saturation Voltage to Ground vs. Peak Output Current 0 0.5 Figure 9 : (V) 32 1.5 1 1.5 2 1675A-13.EPS 1 Maximum allowable Power Dissipation vs. Ambient Temperature Ptot (W) R R th 24 1 th 16 = 8˚ th ˚C /W = 2˚ C/ W K SIN AT HE R =4 E IT FIN IN VS = 35V C /W 0.5 0 0.5 1 1.5 2 MOUNTING INSTRUCTIONS The power dissipated in the circuit must be removed by adding an external heatsink. Thanks to the MULTIWATT ® package attaching the heatsink is very simple, a screw or a compression T amb (˚C) 0 -50 0 50 100 150 1675A-14.EPS I Y (App) 1675A-12.EPS 8 spring (clip) being sufficient. Between the heatsink and the package, it is better to insert a layer of silicon grease, to optimize the thermal contact; no electrical isolation is needed between the two surfaces. 1675A-15.IMG Figure 10 : Mounting Examples 10/11 TDA1675A PMMUL15V.EPS PACKAGE MECHANICAL DATA : 15 PINS - PLASTIC MULTIWATT A B C D E F G G1 H1 H2 L L1 L2 L3 L4 L7 M M1 S S1 Dia. 1 Min. Millimeters Typ. Max. 5 2.65 1.6 Min. 0.55 0.75 1.4 17.91 0.019 0.026 0.045 0.692 0.772 1 0.49 0.66 1.14 17.57 19.6 22.1 22 17.65 17.25 10.3 2.65 4.2 4.5 1.9 1.9 3.65 1.27 17.78 17.5 10.7 4.3 5.08 Inches Typ. Max. 0.197 0.104 0.063 0.039 20.2 22.6 22.5 18.1 17.75 10.9 2.9 4.6 5.3 2.6 2.6 3.85 0.870 0.866 0.695 0.679 0.406 0.104 0.165 0.177 0.075 0.075 0.144 0.050 0.700 0.689 0.421 0.169 0.200 0.022 0.030 0.055 0.705 0.795 0.890 0.886 0.713 0.699 0.429 0.114 0.181 0.209 0.102 0.102 0.152 MUL15V.TBL Dimensions Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. © 1994 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 11/11