STMICROELECTRONICS TDA9530

TDA9530
9.5NS TRIPLE HIGH VOLTAGE VIDEO AMPLIFIER
FEATURE
• TRIPLE CHANNEL VIDEO AMPLIFIER
• SUPPORTs DC OR AC COUPLING
APPLICATIONS
• BUILT IN VOLTAGE GAIN: 20
• RISE AND FALL TIMES: 9.5ns TYPICAL
• BANDWIDTH: 37MHz TYPICAL
• SUPPLY VOLTAGE: 110V
• ADDITIONAL CUT-OFF INPUT CONTROL
DESCRIPTION
The TDA9530 is a triple video amplifier with high
voltage Bipolar/CMOS/DMOS technology (BCD).
It can drive the 3 cathodes of a monitor CRT in DC
or AC coupling mode. A DC coupling application is
obtained by connecting a triple DC controlled circuit either on the input pin or on the cut-off pin.
MULTIWATT 15
(Plastic Package)
ORDER CODE: TDA9530
PIN CONNECTIONS
OUT3
C.OFF3
GND3
IN3
VCC
IN2
GND2
GNDS
OUT2
C.OFF2
VDD
IN1
GND1
C.OFF1
OUT1
Version 4.1
March 2000
1/8
1
TDA9530
BLOCK DIAGRAM
OUT1 GND1
1
OUT2 GND2
7
3
OUT3 GND3
9
15
13
TDA9530
VDD 5
VCC 11
4
IN1
2
10
C.OFF1
IN2
6
C.OFF2
12
IN3
14
8
C.OFF3 GNDS
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VDD
High Supply Voltage
120
V
VCC
Low Supply Voltage
17
V
VESD
ESD Susceptibility
Human Body Model, 100pF. Discharge through 1.5KΩ
EIAJ Norm, 200pF. Discharge through 0Ω
2
250
kV
V
IOD
Output Source Current (pulsed < 50µs)
80
mA
I OG
Output Sink Current (pulsed < 50µs)
80
mA
V I Max
Maximum Input Voltage
15
V
VI Min
Minimum Input Voltage
- 0.5
V
VIC OFF Max
Maximum C. off Input Voltage
VCC + 0.5
V
VIC OFF Min
Minimum C. off Input Voltage
- 0.5
V
2/8
TJ
Junction Temperature
150
°C
TSTG
Storage Temperature
-20 + 150
°C
TDA9530
THERMAL DATA
Symbol
Parameter
Value
Unit
Rth (j-c)
Junction-Case Thermal Resistance (Max.)
3
°C/W
R th (j-a)
Junction-Ambient Thermal Resistance (Typ.)
35
°C/W
ELECTRICAL CHARACTERISTICS
(VCC = 12V, VC OFF = 2.5V, VDD = 110V, Tamb = 25 °C, unless otherwise specified)
Symbol
Parameter
Test Conditions
VDD
High Supply Voltage (Pin 5)
VCC
Low Supply Voltage (Pin 11)
IDD
ICC
High Voltage Supply Internal DC Current
Low Voltage Supply Internal DC Current
VOUT = 50V
High Voltage Supply Rejection
VOUT = 50V
dVOUT/dVDD
Min
Typ
Max
Unit
20
110
115
V
10
12
15
V
15
40
mA
mA
0.5
%
VOUT = 80V
15
mV/
°C
Differential Output Voltage Offset Drift
Versus Temperature
VOUT = 80V
5
mV/
°C
∆V OUT/
∆VC.OFF
Cut-Off Control Gain
VOUT = 80V
1V < VC OFF < 4V
14
IBC .OFF
Cut-Off Control Bias Current
VOUT = 80V
Max. Output Voltage
Min. Output Voltage
I0 =-60mA, see Note 1
I0 =60mA, see Note 1
dV OUT/d θ
Output Voltage Drift Versus Temperature for any Channel
d∆VOUT/dθ
VOUT SATH
VOUT SATL
10
VDD 6.5
11
AVR
Typical Video Gain (see note 2)
VOUT = 50V
20
E lin
Linearity Error
17<V OUT<VDD-15V
5
OS
Overshoot
µA
V
V
8
%
5
%
5
%
Low Frequency Gain Matching
VOUT = 50V, f=1MHz
R IN
Video Input Resistor
VOUT = 50V
2
KΩ
BW
Bandwidth at -3dB
VOUT =50V,CLOAD=8pF
R P=200Ω, ∆VOUT=20V
37
MHz
tR, tF
Rise and Fall Time
VOUT =50V,CLOAD=8pF
R P=200Ω, ∆V OUT=40V
9.5
ns
50
32
dB
dB
Lf ∆g/g
Lf CT
Hf CT
Low Frequency Crosstalk
High Frequency Crosstalk
VOUT =50V,CLOAD=8pF
R P=200 Ω,∆V OUT=20V
f = 1 MHz
f = 20MHz
Pulsed current width < 50µs
Note: 1 Theoretically VOUT = 140V - 14VC OFF - 20V IN.
3/8
TDA9530
TYPICAL APPLICATION
PC Board Lay-out
The best performance is obtained with a carefully
designed HF PC board, especially for the output
and input capacitors.
Rise/fall time and bandwidth are measured on
a 8pF load (including a PC board parasitical, socket and a CRT capacitor).
The input voltage range for the cut-off adjustment
pins is from 1 to 4 volts and a 10 nF to 47 nF bypass capacitor is recommended on these pins.
Power Dissipation
The power dissipation is the sum of the DC and
the dynamic dissipation.
As the feedback resistors are integrated, the DC
power dissipation (capacitive load) can be estimated by:
VCC
VCC
75Ω
PSTAT = VDD . IDD + VCC . I CC
The dynamic dissipation in worst case (full bandwidth and black pixel/white pixel picture - see Note
3) is:
PDYN = 3 VDD . CL . VOUT(PP) . f . K
where f is the video frequency and K the active line
duration / total duration.
Example: for VDD = 110V, VCC = 12V,
VOUT = 40 VPP, I DD = 15mA, ICC = 40mA,
fVIDEO = 30MHz, CL = 8pF and K = 0.72.
We have: PSTAT = 2.13W and PDYN = 2.28W
Therefore: Ptot = 4.41W.
Note: 2 This worst thermal case must only be
considered for TJmax calculation.
Nevertheless, during the average life of the
circuit, the conditions are very close to the
white picture conditions.
VDD 110V
11
5
VDD
8
GNDS
TDA9530
OUT1 RP
4
1
IN1
VC.OFF1 2
C.OFF1
CL
3
GND1
75Ω
OUT2 RP
10
7
IN2
VC.OFF2 6
C.OFF2
CL
9
GND2
75Ω
IN3
OUT3 RP
12
VC.OFF3 14
15
C.OFF3
CL
13
GND3
4/8
TDA9530
Figure 1. TDA9207/9209 - TDA9533/9530 Demonstration Board: Silk Screen and Trace (scale 1:1)
5/8
1
2
75R
R17
75R
R25
A
C7
100nF
100nF
R15
R9
S7
FBLK
C22
47uF
C21
47uF
Jump
Jump
Jump
Jump
Jump
47uF
C23
12V
S6
OSD3
5-8V
S5
OSD2
5V
S4
S3
33R
33R
33R
OSD1
AV
100nF
C13
R23
1N4148
D5
1N4148
D4
1N4148
D3
5V
1N4148
D8
D2
1N4148 C4
5V
1N4148
D7
5V
75R
R12
Video
Bi n
J2
1
3
Gin
2
VSYNC
HSYNC
6/8
3
4
5
6
7
8
9
10
11
12
4
A
R5
R6
C6(1)
C9(1)
B
HSYNC
BLANK
5-8V
J6
12
11
10
9
8
7
6
5
4
3
2
1
VFly
HFly
VSYNC
5-8V
5V
HSYNC
BLANK
HEAT
G1
110V
12V
SCL
SDA
CUT3
CUT2
OUT3
GNDP
OUT2
VCCP
OUT1
CUT1
Hs/BPCP
13
14
15
16
17
18
19
C17
100nF
100pF
100pF
C1(1)
OSD
J7
100pF 100pF
C16
20 C8(1)
21
22
23 C5(1)
24
100R
2R7
R3
C
1
2
3
4
5
6
7
8
9
10
11
12
5V
SCL
SDA
AV
OSD1
OSD2
OSD3
FBLK
SDA
SCL
HSYNC
HFly
VFly
100nF
C14(1)
J4
C
G1
R28
10
R29
D
OUT1
GND1
VDD
OUT2
GND2
VCC
GND3
OUT3
2K7
R2
D
Date:
Size
A4
Title
150R
6
G2
KR
10nF/ 2KV
C20
J5
Monday,January 17,2000
DocumentNumber
<Doc>
Sheet
E
1
L3 .33uH
CRT4 TDA9207/09+TDA9533
7
8
9
R22
FDH400
of
F2(2)
F1(2)
R27
FDH400
D9(2)
110V
L2 .33uH
D6(2)
110V
1
Rev
F3(2)
150R / 0.5W
150R / 0.5W
R11 150R / 0.5W
FDH400
D1(2)
110V
L1 .33uH
10nF/ 400V
C19
HEAT
120R / 0.5W
KG
G2
R
H2
R26
10nF/ 400V
C25
G
5
H1
10
G1
B
11
KB
47uF
C11
R21 120R / 0.5W
100nF
120R / 0.5W
12V
R10
C10(1)
1
GND
12
100nF/250V
Bout
Rout
100nF/250V
C12(1)
Gout
4.7uF / 150V
E
transient response optimisation
33R
C24
R19(2)
110V
GND
J3
1
3
5
7
9
11
13
15
SDA
SCL
C18
110V
TDA9530/33
C_OFF1
IN1
C_OFF2
GNDS
IN2
IN3
100nF
2: The purpose of all componentsfollowed by (2) is to ensure a
good protectionagainst overvoltage(arcing protection)
U2
2K7
R1
C_OFF3
C15(1)
2
4
6
8
10
GND_CRT
100R
15R/50R
R20
R24
100R
R18
15R/50R
R16
12
14
100nF
15R/50R
100R
1
2
3
4
C3(1)
R14
R13
I2C
J1
5V
1: All capacitorsfollowed by (1) are decoupling capacitors
which must be connected as close as possible to the device
Notes:
U1
R8
100R
BLK
Jump
Jump R7
S1
TDA9207/09
FBLK
OSD3
OSD2
OSD1
VDDL/AV
VCCA
GNDA
IN3
S2
5V
GNDL
IN2
ABL
IN1
Supply
12
11
10
9
8
7
100nF 6
5
100nF 4
3
2
1
C2(1) 100nF
2R7 2R7 2R7
R4
5V
B
1
2
3
4
TDA9530
Figure 2. TDA9207/9209 - TDA9533/9530 Demonstration Board Schematic
Rin
TDA9530
PACKAGE MECHANICAL DATA
15 PIN - PLASTIC MULTIWATT
H1
A
S
L7
S1
C
L4
L
D
L2
L1
L3
Dia 1
H2
B
E
F
M1
Dimensions
M
G1
Millimeters
Min.
Typ.
G
Inches
Max.
Min.
Typ.
Max.
A
5
0.197
B
2.65
0.104
C
1.6
0.063
D
1
0.039
E
0.49
0.55
0.019
0.022
F
0.66
0.75
0.026
0.030
G
1.02
1.27
1.52
0.040
0.050
0.060
G1
17.53
17.78
18.03
0.690
0.700
0.710
H1
19.6
0.772
H2
20.2
0.795
L
21.9
22.2
22.5
0.862
0.874
L1
21.7
22.1
22.5
0.854
0.870
0.886
L2
17.65
18.1
0.695
L3
17.25
17.5
17.75
0.679
0.689
0.699
L4
10.3
10.7
10.9
0.406
0.421
0.429
0.886
0.713
L7
2.65
2.9
0.104
M
4.25
4.55
4.85
0.167
0.179
0.114
M1
4.63
5.08
5.53
0.182
0.200
S
1.9
2.6
0.075
0.191
0.218
0.102
S1
1.9
2.6
0.075
0.102
Dia. 1
3.65
3.85
0.144
0.152
7/8
TDA9530
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no
responsibility for the consequences of use of such information nor for any infringement of patents or other
rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of STMicroelectronics. Specifications mentioned in this public ation are subject to change
witho ut notice. This publication supersedes and replaces all information previously supplied.
STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics.
 2000 STMicroelectronics - All Rights Reserved
Purchase of I2C Components of STMicroelectronics, conveys a license under the Philip s I2C Patent.
Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C
Standard Specifications as defined by Philip s.
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.
http://www .st.com
8/8