TS472 Very Low Noise Microphone Preamplifier with 2V Biased Output and Active Low Standby Mode ■ Low noise: 10nV/√Hz typ. equivalent input noise @ F = 1kHz ■ Fully differential input/output ■ 2.2V to 5.5V single supply operation ■ Low power consumption @20dB: 1.8mA ■ Fast start up time @ 0dB: 5ms typ. ■ Low distortion: 0.1% typ. ■ 40kHz bandwidth @ -3dB and adjustable ■ Active low standby mode function (1µA max) ■ Low noise 2.0V microphone bias output ■ Available in flip-chip lead-free package ■ ESD protection (2kV) Flip-chip - 12 bumps Pin Connections (top view) Description C1 C2 STDBY VCC OUTPUT BIAS GS OUT+ OUT- IN+ IN- GND BYPASS The TS472 is a differential-input microphone preamplifier optimized for high-performance, PDA and notebook audio systems. This device features an adjustable gain from 0dB to 40dB with excellent power-supply and common-mode rejection ratios. In addition, the TS472 has a very low-noise microphone bias generator of 2V. Applications It also includes a complete shutdown function, with active low standby mode. ■ Video and photo cameras with sound input ■ Sound acquisition & voice recognition ■ Video conference systems ■ Notebook computers and PDAs Order Codes Part Number TS472EIJT October 2005 Temperature Range Package Packing Marking -40, +85°C Flip-Chip Tape & Reel 472 Rev 2 1/20 www.st.com 20 Typical Application Schematic 1 TS472 Typical Application Schematic Figure 1 shows a typical application schematic for the TS472 with gain = 20dB. To change the gain see Chapter 4.5: Gain settings on page 14. Figure 1. Application schematic Optional C1 VCC Cs 1uF Cin+ A3 B3 TS472 Cout+ A1 IN+ OUT+ C2 B1 IN- OUT- D2 + Electret Mic Vcc C2 U1 C2 C1 Rpos D3 C3 1uF Positive Output Negative Output Cout- CinRneg G BIAS 2.0V GND STDBY C3 Bias C1 A2 GAIN SELECT B2 BYPASS D1 Rout+ Rout- Cb 1uF Standby Control Table 1. External component descriptions Components Cin+, Cin- Input coupling capacitors which blocks the DC voltage at the amplifier input terminal and determine Lower cut-off frequency. Cout+, Cout- Output coupling capacitors which blocks the DC voltage coming from the amplifier output terminal (pins C2 and D2) and determine Lower cut-off frequency. Rout+, Rout- Output load resistors which allow to charged the output coupling capacitors Cout. These output resistors can be represented by an input impedance of a following stage. Rpos, Rneg Microphone biasing resistors Cs Supply Bypass capacitor which provides power supply filtering. Cb Bypass pin capacitor which provides half supply filtering. C1, C2 C3 2/20 Functional Description Low pass filter capacitors which can determine Higher cut-off frequency. Bias output capacitor which keeps voltage stabilized and provides 2.0V bias filtering. TS472 2 Absolute Maximum Ratings Absolute Maximum Ratings Table 2. Key parameters and their absolute maximum ratings Symbol VCC Vi Parameter Supply voltage (1) Input Voltage Value Unit 6 V GND-0.3 to VCC+0.3 V Toper Operating Free Air Temperature Range -40 to + 85 °C Tstg Storage Temperature -65 to +150 °C Maximum Junction Temperature 150 °C Rthja Flip-chip Thermal Resistance Junction to Ambient 180 °C/W ESD Human Body Model 2 kV ESD Machine Model 200 V Lead Temperature (soldering, 10sec) 250 °C Value Unit 2.2 to 5.5 V 20 dB 1.5 ≤ VSTB ≤ V CC GND ≤ VSTB ≤ 0.4 V -40 to +85 °C 150 °C/W Tj 1. All voltages values are measured with respect to the ground pin. Table 3. Operating conditions Symbol VCC G Parameter Supply Voltage Typical Differential Gain (GS connected to 4.7kΩ or Bias) VSTB Standby Voltage Input: Device ON Device OFF TOP Operational Free Air Temperature Range Rthja Flip-chip Thermal Resistance Junction to Ambient 3/20 Electrical Characteristics 3 TS472 Electrical Characteristics Table 4. VCC = 3V, GND = 0V, Tamb = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Unit Equivalent Input Noise Voltage Density REQ=100Ω at 1KHz 10 nV -----------Hz Total Harmonic Distortion + Noise 20Hz ≤ F≤ 20kHz, Gain=20dB, Vin=50mVRMS 0.1 % VIN Input Voltage, Gain=20dB 10 BW Bandwidth @ -3dB Bandwidth @ -1dB pin A3, B3 floating 40 20 en THD+N G Overall Output Voltage Gain (Rgs variable) Minimum Gain, Rgs infinite Maximum Gain, Rgs=0 70 mVRMS kHz -3 39.5 -1.5 41 0 42.5 dB Input impedance referred to GND 80 100 120 kΩ RLOAD Resistive load 10 CLOAD Capacitive load ZIN ICC Supply current, Gain=20dB kΩ 1.8 ISTANDBY Standby current PSRR Table 5. Power Supply Rejection Ratio, Gain=20dB, F=217Hz, Vripple=200mVpp, Inputs grounded Differential Output Single-Ended Outputs, 100 pF 2.4 mA 1 µA dB -70 -46 Bias output: V CC = 3V, GND = 0V, Tamb = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit VOUT No load condition 1.9 2 2.1 V ROUT Output resistance 80 100 120 Ω IOUT Output Bias Current PSRR 4/20 Max. Power Supply Rejection Ratio, F=217Hz, Vripple=200mVpp 70 2 mA 80 dB TS472 Electrical Characteristics Table 6. Differential RMS noise voltage Input Referred Noise Voltage (µVRMS) Gain (dB) Unweighted Filter A-weighted Filter Unweighted Filter A-weighted Filter 0 15 10 15 10 20 3.4 2.3 34 23 40 1.4 0.9 141 91 Table 7. Table 8. Bias output RMS noise voltage Cout (µF) Unweighted Filter (µVRMS) A-weighted Filter (µVRMS) 1 5 4.4 10 2.2 1.2 SNR (signal to noise ratio), THD+N < 0.5% Unweighted Filter (dB) Gain (dB) Note: Output Noise Voltage (µVRMS) A-weighted Filter (dB) Vcc=2.2V Vcc=3V Vcc=5.5V Vcc=2.2V Vcc=3V Vcc=5.5V 0 75 76 76 79 80 80 20 82 83 83 89 90 90 40 70 72 74 80 82 84 Unweighted filter = 20Hz ≤ F ≤ 20kHz 5/20 Electrical Characteristics Table 9. TS472 Index of graphics Description Figure Page Figure 2 to 3 page 7 Standby threshold voltage vs. power supply voltage Figure 4 page 7 Frequency response Figure 5 page 7 Bias output voltage vs. bias output current Figure 6 page 7 Bias output voltage vs. power supply voltage Figure 7 page 7 Figure 8 to 9 page 8 Differential output PSRR vs. frequency Figure 10 to 11 page 8 Differential output PSRR vs. frequency Figure 12 to 13 page 8 Single-ended output PSRR vs. frequency Figure 14 page 9 Equivalent input noise voltage density Figure 15 page 9 D gain vs. power supply voltage Figure 16 page 9 Dgain vs. ambient temperature Figure 17 page 9 Maximum input voltage vs. gain, THD+N<1% Figure 18 to 19 page 9 THD+N vs. input voltage Figure 20 to 25 page 10 THD+N vs. frequency Figure 26 to 27 page 11 Transient response Figure 28 to 29 page 11 Current consumption vs. power supply voltage Bias PSRR vs. frequency 6/20 TS472 Electrical Characteristics Figure 2. Current consumption vs. power supply voltage Figure 3. 3.0 3.0 No Loads, Maximum Gain No Loads, Minimum Gain 2.5 Current Consumption (mA) Current Consumption (mA) 2.5 2.0 1.5 1.0 T AMB =-40°C 0.5 TAMB=25°C T AMB =85°C 0.0 2.0 1.5 1.0 T AMB=-40°C Figure 4. 3 4 Power Supply Voltage (V) 5 5.5 Standby threshold voltage vs. power supply voltage 2.2 Figure 5. 30 0.8 20 PSRR (dB) 1.0 0.6 0.4 TAMB =85°C 3 4 Power Supply Voltage (V) 5 5.5 Frequency response Cb=1 µF, T AMB =25 °C, Gain=20dB, Rout=100k Ω 10 no C1,C2 C1,C2=100pF 0 Cin,Cout=100nF 0.2 0.0 C1,C2=220pF -10 Cin,Cout=10nF No Loads Tamb = 25°C 2.2 Figure 6. 3 4 Power Supply Voltage (V) 5 5.5 Bias output voltage vs. bias output current -20 10 100 Figure 7. 2.2 1000 Frequency (Hz) 10000 100000 Bias output voltage vs. power supply voltage 2.2 Bias Output Voltage (V) Tamb=25°C Bias Output Voltage (V) TAMB =25°C 0.5 0.0 2.2 Standby Treshold Voltage (V) Current consumption vs. power supply voltage 2.0 Tamb=85°C 1.8 Tamb=-40°C 1.6 Ibias=0mA 2.0 Ibias=2mA 1.8 Ibias=4mA 1.6 Tamb=25°C 1.4 1.4 0 1 2 3 Bias Output Current (mA) 4 2.2 3 4 Power Supply Voltage (V) 5 5.5 7/20 Electrical Characteristics Figure 8. TS472 Bias PSRR vs. frequency Figure 9. 0 0 -40 Vripple=200mVpp Vcc=3V Cb=1 µ F Tamb =25°C -20 PSRR (dB) PSRR (dB) -20 Bias PSRR vs. frequency Bias floating or 1kΩ to GND -60 Vripple=200mVpp Vcc=5V Cb=1 µ F Tamb=25 °C Bias=1kΩ to GND -40 -60 -80 -80 -100 -100 Bias floating 50 100 1k 10k 50 20k 100 1k Frequency (Hz) Figure 10. Differential output PSRR vs. frequency 0 V RIPPLE =200mV PP, Inputs grounded V RIPPLE =200mV PP , Inputs grounded V CC=3V, Cb=Cin=1 µF, T AMB =25 °C -20 V CC =5V, Cb=Cin=1 µ F, TAMB =25 °C Maximum Gain PSRR (dB) PSRR (dB) Maximum Gain -40 Gain=20dB -60 Minimum Gain -80 -100 50 -40 -60 100 1k Frequency (Hz) 10k -100 50 20k Minimum Gain 100 1k Frequency (Hz) 10k 20k 10k 20k Figure 13. Differential output PSRR vs. frequency 0 0 V RIPPLE=200mV PP , Inputs grounded V RIPPLE =200mV PP , Inputs grounded V CC =3V, Minimum Gain, Cin=1µ F, T AMB =25°C -40 -20 PSRR (dB) PSRR (dB) Gain=20dB -80 Figure 12. Differential output PSRR vs. frequency -20 20k Figure 11. Differential output PSRR vs. frequency 0 -20 10k Frequency (Hz) Cb=1µ F No Cb Cb=100nF -60 V CC =3V, Gain=20dB, Cin=1 µ F, T AMB =25°C -40 Cb=1 µ F No Cb -60 -80 -80 -100 50 -100 50 Cb=100nF 8/20 100 1k Frequency (Hz) 10k 20k 100 1k Frequency (Hz) TS472 Electrical Characteristics Figure 14. Single-ended output PSRR vs. frequency Figure 15. Equivalent input noise voltage density 0 1000 PSRR (dB) -20 -30 Cin=100nF R EQ =100 Ω Vcc=3V TAMB=25 °C en (nV/√Hz ) Vripple=200mVpp Inputs grounded Cb=1 µ F Cin=100nF Tamb=25°C -10 -40 -50 100 10 -60 -70 Vcc=2.2V Vcc=5V 1 10 -80 100 50 1000 Frequency (Hz) 10000 20k Figure 16. ∆ gain vs. power supply voltage 10k 100k 0.50 F=1kHz Vin=5mV Tamb=25°C 0.8 0.25 Maximum Gain 0.6 F=1kHz V IN =5mV 0.00 ∆Gain (dB) ∆Gain (dB) 1k Frequency (Hz) Figure 17. ∆gain vs. ambient temperature 1.0 0.4 0.2 -0.25 Maximum Gain -0.50 0.0 Gain=20dB Minimum Gain -0.2 -0.75 Gain=20dB -0.4 2.2 3 4 Power Supply Voltage (V) 5 140 Maximum Input Voltage (mV RMS) TAMB =25°C F=1kHz THD+N<1% 100 50 V CC =3V V CC =2.2V 0 -20 T AMB =25°C, F=1kHz, THD+N<1% 10 20 Gain (dB) 30 60 80 40 Gain=0dB 120 100 80 60 Gain=40dB 40 Gain=30dB Gain=20dB 20 0 0 0 20 40 Ambient Temperature (°C) Figure 19. Maximum input voltage vs. power supply voltage, THD+N<1% 150 V CC =5.5V Minimum Gain -1.00 -40 5.5 Figure 18. Maximum input voltage vs. gain, THD+N<1% Maximum Input Voltage (mVRMS) 100 2.2 3 4 Power Supply Voltage (V) 5 5.5 9/20 Electrical Characteristics TS472 Figure 20. THD+N vs. input voltage Figure 21. THD+N vs. input voltage 10 10 Minimum Gain Minimum Gain Gain=20dB 1 THD+N (%) THD+N (%) 1 0.1 Gain=20dB 0.1 Maximum Gain Maximum Gain Tamb=25°C, Vcc=3V, F=100Hz, Cb=1 µ F, RL=10k Ω , BW=100Hz-120kHz 0.01 1E-3 0.01 0.01 0.1 0.3 1E-3 Input Voltage (V RMS ) 0.01 10 Minimum Gain Minimum Gain Gain=20dB Gain=20dB 1 THD+N (%) 1 0.1 0.1 Maximum Gain Maximum Gain Tamb=25°C, Vcc=3V, F=1kHz, Cb=1µ F, RL=10k Ω , BW=100Hz-120kHz 1E-3 0.01 0.01 0.1 1E-3 0.3 Figure 24. THD+N vs. input voltage 0.1 0.3 0.1 0.3 10 Minimum Gain Minimum Gain Maximum Gain 1 Maximum Gain 1 Gain=20dB THD+N (%) THD+N (%) 0.01 Figure 25. THD+N vs. input voltage 10 0.1 T AMB =25°C, V CC =3V, F=20kHz, 0.01 Input Voltage (V RMS ) Gain=20dB 0.1 0.01 Cb=1 µ F, RL=10kΩ , BW=100Hz-120kHz 1E-3 10/20 Tamb=25°C, Vcc=5V, F=1kHz, Cb=1µ F, RL=10k Ω , BW=100Hz-120kHz Input Voltage (V RMS ) Input Voltage (V RMS ) 0.01 0.3 Figure 23. THD+N vs. input voltage 10 0.01 0.1 Input Voltage (V RMS ) Figure 22. THD+N vs. input voltage THD+N (%) Tamb=25°C, Vcc=5V, F=100Hz, Cb=1µ F, RL=10kΩ , BW=100Hz-120kHz 0.1 0.3 1E-3 Tamb=25°C, Vcc=5V, F=20kHz, Cb=1µ F, RL=10k Ω , BW=100Hz-120kHz 0.01 Input Voltage (V RMS ) TS472 Electrical Characteristics Figure 26. THD+N vs. frequency Figure 27. THD+N vs. frequency 10 10 Tamb=25°C, Vcc=3V, RL=10kΩ Cb=1µ F, BW=100Hz-120kHz Tamb=25°C, Vcc=5V, RL=10kΩ Cb=1µ F, BW=100Hz-120kHz Maximum Gain, Vin=15mVRMS Maximum Gain, Vin=15mVRMS 1 Minimum Gain, Vin=100mVRMS THD + N (%) THD + N (%) 1 Gain=20dB, Vin=50mVRMS 0.1 0.01 Minimum Gain, Vin=100mV RMS Gain=20dB, Vin=50mVRMS 0.1 0.01 50 100 1000 Frequency (Hz) Figure 28. Transient response 10000 20k 50 100 1000 Frequency (Hz) 10000 20k Figure 29. Transient response 11/20 Application Information TS472 4 Application Information 4.1 Differential configuration principle The TS472 is a full-differential input/output microphone preamplifier. The TS472 also includes a common mode feedback loop that controls the output bias value to average it at Vcc/2. This allows the device to always have a maximum output voltage swing, and by consequence, maximize the input dynamic voltage range. The advantages of a full-differential amplifier are: 4.2 ● Very high PSRR (Power Supply Rejection Ratio). ● High common mode noise rejection. ● In theory, the filtering of the internal bias by an external bypass capacitor is not necessary. But, to reach maximum performances in all tolerance situations, it’s better to keep this option. Higher cut-off frequency The higher cut-off frequency FCH of the microphone preamplifier depends on an external capacitors C1, C2. TS472 has an internal first order low pass filter (R=40kΩ, C=100pF) to limit the highest cut-off frequency on 40kHz (with a 3dB attenuation). By connecting C1, C2 you can decrease FCH with regard to following formula: 1 F CH = ---------------------------------------------------------------------------------3 –12 2π ⋅ 40 ×10 ⋅ ( C 1, 2 + 100 ×10 ) Figure 24, which follows, directly shows the higher cut-off frequency in Hz versus the value of the output capacitors C1, C2 in nF: Figure 30. Higher cut-off frequency vs. output capacitors Higher Cut-off Frequency (kHz) 40 10 1 200 400 600 C1, C2 (pF) 800 For example, FCH is almost 20kHz with C1,2=100pF. 12/20 1000 TS472 4.3 Application Information Lower cut-off frequency The lower cut-off frequency FCL of the microphone preamplifier depends on the input capacitors Cin and output capacitors C out. These input and output capacitors are mandatory in a application because of DC voltage blocking. The input capacitors Cin in serial with the input impedance of the TS472 (100kΩ) are equivalent to a first order high pass filter. Assuming that FCL is the lowest frequency to be amplified (with a 3dB attenuation), the minimum value of Cin is: 1 C in = ---------------------------------------------3 2π ⋅ F CL ⋅ 100 ×10 The capacitors Cout in serial with the output resistors R out (or an input impedance of the next stage) are also equivalent to a first order high pass filter. Assuming that FCL is the lowest frequency to be amplified (with a 3dB attenuation), the minimum value of Cout is: 1 C out = ------------------------------------2π ⋅ F CL ⋅ R out Figure 31. Lower cut-off frequency vs. input capacitors Figure 32. Lower cut-off frequency vs. output capacitors 1000 1000 Rout=10kΩ Typical Zin 100 ZinMIN 10 Lower Cut-off frequency (Hz) Lower Cut-off frequency (Hz) ZinMAX 100 Rout=100kΩ 10 1 10 Cin (nF) 100 1 10 100 1000 Cout (nF) Figure 30 and Figure 32 give directly the lower cut-off frequency (with 3dB attenuation) versus the value of the input or output capacitors Note: In case FCL is kept the same for calculation, It must be taken in account that the 1st order highpass filter on the input and the 1st order high-pass filter on the output create a 2nd order highpass filter in the audio signal path with an attenuation of 6dB on FCL and a rolloff of 40db⁄ decade. 4.4 Low-noise microphone bias source The TS472 provides a very low noise voltage and power supply rejection BIAS source designed for biasing an electret condenser microphone cartridges. The BIAS output is typically set at 2.0 VDC (no load conditions), and can typically source 2mA with respect to drop-out, determined by the internal resistance 100Ω (for detailed load regulation curves see Figure 6). 13/20 Application Information 4.5 TS472 Gain settings The gain in the application depends mainly on: ● the sensitivity of the microphone, ● the distance to the microphone, ● the audio level of the sound, ● the desired output level. The sensitivity of the microphone is generally expressed in dB/Pa, referenced to 1V/Pa. For example, the microphone used in testing had an output voltage of 6.3 mV for a sound pressure of 1 Pa (where Pa is the pressure unit, Pascal). Expressed in dB, the sensitivity is: 20Log(0.0063) = -44 dB/Pa To facilitate the first approach, the following table gives voltages and gains used with a low cost omnidirectional Electret Condenser Microphone of -44dB/Pa. Table 10. Typical TS472 gain vs. distance to the microphone (sensitivity -44dB/Pa) Distance to microphone Microphone output voltage TS472 Gain 1 cm 30 mVRMS 20 20 cm 3 mV RMS 100 The gain of the TS472 microphone preamplifier can be set: From -1.5 dB to 41 dB by connecting an external grounded resistor RGS to the GS pin. It 1. allows to adapt more precisely the gain to each application. Table 11. Selected gain vs. gain select resistor Gain (dB) 0 10 20 30 40 RGS (Ω) 470k 27k 4k7 1k 68 Figure 33. Gain in dB vs. gain select resistor 50 Figure 34. Gain in V/V vs. gain select resistor Tamb=25 °C Tamb=25°C 100 40 Gain (V/V) Gain (dB) 30 20 10 10 0 -10 10 14/20 1 100 1k 10k R GS (Ω ) 100k 1M 10 100 1k 10k R GS (Ω ) 100k 1M TS472 Application Information 2. To 20dB by applying VGS > 1VDC on Gain Select (GS) pin. This setting can help to reduce a number of external components in an application, because 2.0 VDC is provided by TS472 itself on BIAS pin. Following Figure 26 gives other values of the gain vs. voltage applied on GS pin Figure 35. Gain vs. gain select voltage Tamb=25 °C 40 Gain (dB) 20 0 -20 -40 -60 -80 0.2 0.4 0.6 V GS (V ) 0.8 4 5 Wake-up time When the standby is released to put the device ON, a signal appears on the output a few microseconds later, and the bypass capacitor Cb is charged in a few milliseconds. As Cb is directly linked to the bias of the amplifier, the bias will not work properly until the Cb voltage is correct. In the typical application, when a biased microphone is connected to the differential input via the input capacitors (Cin), (and the output signal is in line with the specification), the wake-up time will depend upon the values of the input capacitors Cin and the gain. When gain is lower than 0dB, the wake-up time is determined only by the bypass capacitor Cb, as described above. For a gain>0dB, see Figure 36 Figure 36. Wake-up time in the typical application vs. input capacitors 60 50 Wake-up Time (ms) 4.6 0 Tamb = 25°C Vcc=3V Cb=1µ F 40 Maximum Gain Gain=20dB 30 20 10 0 20 40 60 Input capacitors C IN (nF) 80 100 15/20 Application Information 4.7 TS472 Standby mode When the standby command is set, the time required to set the output stages (differential outputs and 2.0V bias output) in high impedance and the internal circuitry in shutdown mode is a few microseconds. 4.8 Layout considerations The TS472 has sensitive pins to connect C1, C2 and Rgs. To obtain high power supply rejection and low noise performance, it is mandatory that the layout track to these component is as short as possible. Decoupling capacitors on Vcc and bypass pin are needed to eliminate power supply drops. In addition, the capacitor location for the dedicated pin should be as close to the device as possible. 4.9 Demoboard A demoboard for the TS472 is available. For more information about this demoboard, please refer to Application Note AN2240, which can be found on www.st.com. Figure 37. Top layer Figure 39. Component location 16/20 Figure 38. Bottom layer TS472 Application Information Figure 40. Demoboard schematic Jumper J4 1 100pF 2 2 100nF C2 1 2 1 C8 2 R6 100nF 100nF POS. INPUT NEG. INPUT 1 IN+ OUT+ 13 8 IN- OUT- OUTPUT 2 3 C2 TS472_FC_Adapter 6 Jumper J2 12 C5 1 INPUT 2 100nF GAIN SELECT P8 5 20dB Min Max Rgs 1 Gain Bias 4 BIAS Bias BYPASS 10 1 3 5 7 2 4 6 8 1 R1 P6 VCC 1 2 3 2 470k 1 R2 P9 Jumper J1 Bias Gain Select 2 STDBY C3 1uF 2 2 R11 15 C11 GND 1 1 2 1 R7 9 4 3 2 1 Vcc 2 C1 14 C4 P1 4 3 2 1 POS. OUTPUT NEG. OUTPUT R8 100k 1 2 100pF 1 P2 R9 100k 2 C7 1uF 2 C10 1uF 1 2 1 Bias C6 100nF C9 2 1 C1 1 Vcc R10 1 VCC 1 2 2 1 2 Vx P5 1 P11 Vbias 1 2 1 P10 0dB 10dB 20dB 30dB 40dB 1 3 5 7 9 2 4 6 8 10 Rgs 2 27k 1 R3 2 4.7k 1 R4 2 1k StandBy 1 R5 Jumper J3 2 68 17/20 Package Mechanical Data 5 TS472 Package Mechanical Data Figure 41. TS472 footprint recommendation 75µmmin. 100µmmax. 500µm 500µm Track Φ=400µmtyp. 150µmmin. Φ=340µmmin. 500µm 500µm Φ=250µm Non Solder mask opening Pad in Cu 18µmwith Flash NiAu(2-6µm, 0.2µmmax.) Figure 42. Pin-out (top view) 3 C1 2 OUTPUT BIAS 1 C2 STDBY VCC GS OUT+ OUT- IN+ IN- GND BYPASS A B C D n Balls are underneath Figure 43. Marking (top view) 18/20 ■ ST Logo ■ Part number: 472 ■ E Lead free Bumps ■ Three digits Datecode: YWW ■ The dot is for marking pin A1 E 472 YW W TS472 Package Mechanical Data Figure 44. Flip-chip - 12 bumps 2.1 mm 1.6 mm 0.5mm 0.5mm ∅0.315mm 6 0 0 µ m ■ Die size: 2.1mm x 1.6mm ± 30µm ■ Die height (including bumps): 600µm ■ Bumps diameter: 315µm ±50µm ■ Bump Diameter Before Reflow: 300µm ±10µm ■ Bumps Height: 250µm ±40µm ■ Die Height: 350µm ±20µm ■ Pitch: 500µm ±50µm ■ Coplanarity: 50µm max Figure 45. Tape & reel specification (top view) 1.5 4 1 1 A Die size Y + 70µm A 8 Die size X + 70µm 4 All dimensions are in mm User direction of feed 19/20 Revision History 6 TS472 Revision History Date Revision Changes July 2005 1 First Release corresponding to the product preview version. Oct. 2005 2 First release of fully mature product datasheet. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 20/20