FL7730MY Single-Stage Primary-Side-Regulation PWM Controller for PFC and LED Dimmable Driving Features Description Compatible with Traditional TRIAC Control (No need to change existing lamp infrastructure: wall switch & wire) Compatible with Non-Dimming Lamp Designs This highly integrated PWM controller, FL7730MY, provides several features to enhance the performance of single-stage flyback converters. The proprietary topology, TRUECURRENT™, enables the simplified circuit design for LED lighting applications. Power Factor Correction (PFC) Line Voltage Compensation for CC Control Open-LED Protection Cost-Effective Solution without Input Bulk Capacitor and Feedback Circuitry Accurate Constant-Current (CC) Control, Independent Online Voltage, Output Voltage, Magnetizing Inductance Variation Linear Frequency Control for Better Efficiency and Simple Design Short-LED Protection Cycle-by-Cycle Current Limiting Over-Temperature Protection with Auto Restart Low Startup Current: 20μA Low Operating Current: 5mA Frequency Hopping for Better EMI Performance SOP-8 Package Available TRIAC dimming is smoothly managed by dimming brightness control without flicker. By using single-stage topology with primary-side regulation, an LED lighting board can be implemented with few external components and minimized cost. It does not require an input bulk capacitor or feedback circuitry. To implement good power factor and low total harmonic distortion, constant on-time control is utilized with an external capacitor connected to the COMI pin. Precise constant-current control regulates accurate output current versus changes in input voltage and output voltage. The operating frequency is proportionally changed by the output voltage to guarantee Discontinuous Conduction Mode (DCM) operation with higher efficiency and simpler design. The FL7730MY provides protections such as open-LED, short-LED, and over-temperature protections. Current-limit level is automatically reduced to minimize output current and protect external components in a short-LED condition. The FL7730MY frequency-hopping function in the oscillator improves EMI performance. The FL7730MY controller is available in an 8-pin SOP package. Application Voltage Range: 80VAC ~ 308VAC Applications LED Lighting System Ordering Information Part Number Operating Temperature Range Package Packing Method FL7730MY -40°C to +125°C 8-Lead, Small Outline Package (SOP-8) Tape & Reel © 2011 Fairchild Semiconductor Corporation FL7730MY • Rev. 1.0.3 www.fairchildsemi.com FL7730MY — Single-Stage Primary-Side-Regulation PWM Controller for PFC and LED Dimmable Driving February 2012 TRIAC Dimmer BRIDGE DIODE TRANS Line input FUSE FL7730 4 5 7 3 VDD GATE GND DIM COMI VS GND CS 2 8 6 1 Figure 1. Typical Application Internal Block Diagram Shutdown Internal Bias S VDD Good + - VDD 4 VOVP Gate Driver Q R OSC - + OCP Level Controller + - GND 3 Q + S TSD R DCM VS 1 CS LEB VOCP Sawtooth Generator - VDD good 2 GATE BCM 7 COMI DIM 5 TRIAC Dimming Function + Linear Frequency Controller tDIS Detector Freq. Line Compensator Error Amp. VREF TrueCurrent™ Calculation FL7730MY — Single-Stage Primary-Side-Regulation PWM Controller for PFC and LED Dimmable Driving Application Diagram 6 VS GND 8 Sample & Hold VS Figure 2. Functional Block Diagram © 2011 Fairchild Semiconductor Corporation FL7730MY • Rev. 1.0.3 www.fairchildsemi.com 2 F: Fairchild Logo Z: Plant Code X: 1-Digit Year Code Y: 1-Digit Week Code TT: 2-Digit Die Run Code T: Package Type (M=SOP) P: Z: Pb free, Y: Green package M: Manufacture Flow Code ZXYTT 7730 TPM Figure 3. Top Mark Pin Configuration Figure 4. Pin Configuration Pin Definitions Pin # Name 1 CS 2 GATE PWM Signal Output. This pin uses the internal totem-pole output driver to drive the power MOSFET. 3 GND Ground 4 VDD Power Supply. IC operating current and MOSFET driving current are supplied using this pin. 5 DIM Dimming. This pin controls the dimming operation of LED lighting. 6 VS Voltage Sense. This pin detects the output voltage information and discharge time for linear frequency control and constant-current regulation. This pin connects divider resistors from the auxiliary winding. 7 COMI Constant Current Loop Compensation. This pin is the output of the transconductance error amplifier. 8 GND Ground Description Current Sense. This pin connects a current-sense resistor to detect the MOSFET current for the output-current regulation in constant current regulation. © 2011 Fairchild Semiconductor Corporation FL7730MY • Rev. 1.0.3 FL7730MY — Single-Stage Primary-Side-Regulation PWM Controller for PFC and LED Dimmable Driving Marking Information www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. (1,22) VVDD DC Supply Voltage Max. Unit 30 V VVS VS Pin Input Voltage -0.3 7.0 V VCS CS Pin Input Voltage -0.3 7.0 V VDIM DIM Pin Input Voltage -0.3 7.0 V VCOMI COMI Pin Input Voltage -0.3 7.0 V GATE Pin Input Voltage -0.3 VGATE 30.0 V Power Dissipation (TA＜50°C) 633 mW θJA Thermal Resistance (Junction to Air) 158 °C /W θJC Thermal Resistance (Junction to Case) 39 °C /W Maximum Junction Temperature 150 °C 150 °C 260 °C PD TJ TSTG TL ESD Storage Temperature Range -55 Lead Temperature (Soldering, 10 Seconds) Human Body Model, JESD22-A114 Electrostatic Discharge Capability Charged Device Model, JESD22-C101 6 2 KV Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. 2. All voltage values, except differential voltages, are given with respect to the GND pin. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol TA Parameter Operating Ambient Temperature © 2011 Fairchild Semiconductor Corporation FL7730MY • Rev. 1.0.3 Min. Max. Unit -40 125 °C FL7730MY — Single-Stage Primary-Side-Regulation PWM Controller for PFC and LED Dimmable Driving Absolute Maximum Ratings www.fairchildsemi.com 4 VDD=20V and TA=25°C unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Units 14.5 16.0 17.5 V 6.75 7.75 8.75 V 3 4 5 mA 2 20 μA 22.0 23.5 25.0 V 1.5 V VDD Section VDD-ON Turn-On Threshold Voltage VDD-OFF Turn-Off Threshold Voltage IDD-OP Operating Current Maximum Frequency, CLOAD = 1nF IDD-ST Startup Current VDD = VDD-ON – 0.16V VOVP VDD Over-Voltage-Protection Gate Section VOL VOH Output Voltage Low VDD=20V,IGATE=-1mA Output Voltage High VDD=10V,IGATE=+1mA Peak Sourcing Current VDD = 10 ~ 20V 60 mA Peak Sinking Current VDD = 10 ~ 20V 180 mA tr Rising Time CLOAD = 1nF 100 150 200 ns tf Falling Time CLOAD = 1nF 20 60 100 ns 12 15 18 V Isource Isink VCLAMP Output Clamp Voltage 5 V Oscillator Section fMAX-CC Maximum Frequency in CC 60 65 70 kHz fMIN-CC Minimum Frequency in CC 21.0 23.5 26.0 kHz V VSMAX-CC VS for Maximum Frequency in CC f = fMAX -2kHz 2.25 2.35 2.45 VSMIN-CC VS for Minimum Frequency in CC f = fMIN +2kHz 0.55 0.85 1.15 V fHOPPING Frequency Hopping Range ±1.8 ±2.9 ±4.0 kHz fHOPPING Frequency Hopping Period tON(MAX) Maximum Turn-On Time 2 ms 12 14 16 s 2.475 2.500 2.525 V 2.38 2.43 2.48 V Current Sense Section VRV Reference Voltage VCCR EAI Voltage for Constant Current Regulation tLEB Leading-Edge Blanking Time tMIN Minimum On Time in CC tPD Propagation Delay to GATE ttdis-BNK ICOMI-BNK VCS = 0.44V VCOMI = 0V 50 300 ns 600 ns 100 150 ns tDIS Blanking Time of VS 1.5 s VS Current for COMI Blanking 100 A 85 mho Current-Error Amplifier Section Gm Transconductance ICOMI-SINK COMI Sink Current ICOMI-SOURCE COMI Source Current VEAI=3V, VCOMI=5V 28 38 A VEAI=2V, VCOMI=0V 28 38 A 4.9 0.1 V VCOMI-HGH COMI High Voltage VEAI=2V VCOMI-LOW COMI Low Voltage VEAI=3V FL7730MY — Single-Stage Primary-Side-Regulation PWM Controller for PFC and LED Dimmable Driving Electrical Characteristics V Continued on the following page… © 2011 Fairchild Semiconductor Corporation FL7730MY • Rev. 1.0.3 www.fairchildsemi.com 5 VDD=15V and TA=25°C unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Units VCS Threshold Voltage for OCP 0.60 0.67 0.74 V VCS Threshold Voltage for Low OCP 0.13 0.18 0.23 Over-Current Protection Section VOCP VLowOCP tstartup Startup Time V 13 ms VLowOCP-EN VS Threshold Voltage to Enable Low OCP level 0.40 V VLowOCP-DIS VS Threshold Voltage to Disable Low OCP level 0.60 V Over-Temperature Protection Section TOTP TOTP-HYS Threshold Temperature for OTP(3) 140 Restart Junction Temperature Hysteresis 150 160 10 o C o C Dimming Section VDIM-LOW Maximum VDIM at Low Dimming Angle Range 2.45 2.50 2.55 V VDIM-HIGH Maximum VDIM at High Dimming Angle Range 3.43 3.50 3.57 V DSLOW VDIM vs. Vcs,offset Slope at Low Dimming Angle Range 0.19 V/V DSHIGH VDIM vs. Vcs,offset Slope at High Dimming Angle Range 0.58 V/V Note: 3. If over-temperature protection is activated, the power system enters Auto Recovery Mode and output is disabled. Device operation above the maximum junction temperature is NOT guaranteed. © 2011 Fairchild Semiconductor Corporation FL7730MY • Rev. 1.0.3 FL7730MY — Single-Stage Primary-Side-Regulation PWM Controller for PFC and LED Dimmable Driving Electrical Characteristics www.fairchildsemi.com 6 Figure 5. VDD-ON vs. Temperature Figure 6. VDD-OFF vs. Temperature Figure 7. IDD-OP vs. Temperature Figure 8. VOVP vs. Temperature Figure 9. fMAX-CC vs. Temperature Figure 10. fMIN-CC vs. Temperature © 2011 Fairchild Semiconductor Corporation FL7730MY • Rev. 1.0.3 FL7730MY — Single-Stage Primary-Side-Regulation PWM Controller for PFC and LED Dimmable Driving Typical Performance Characteristics www.fairchildsemi.com 7 Figure 11. VRV vs. Temperature Figure 12. VCCR vs. Temperature Figure 13. VOCP vs. Temperature Figure 14. VLowOCP vs. Temperature Figure 15. DSLOW vs. Temperature Figure 16. DSHIGH vs. Temperature © 2011 Fairchild Semiconductor Corporation FL7730MY • Rev. 1.0.3 FL7730MY — Single-Stage Primary-Side-Regulation PWM Controller for PFC and LED Dimmable Driving Typical Performance Characteristics www.fairchildsemi.com 8 an error voltage (VCOMI), which determines turn-on time in Voltage Mode control. With Fairchild’s innovative TRUECURRENT™ technique, constant current output can be precisely controlled. FL7730 is AC-DC dimmable PWM controller for LED TM lighting applications. TRUECURRENT technique and internal line compensation regulates accurate LED current independent of input voltage, output voltage, and magnetizing inductance variations. The TRIAC dim function block provides smooth brightness dimming control compatible with a conventional TRIAC dimmer. The linear frequency control in the oscillator reduces conduction loss and maintains DCM operation in a wide range of output voltages, which implements high power factor correction in a single-stage flyback topology. A variety of protections; such as short-LED protection, open-LED protection, over-temperature protection, and cycle-by-cycle current limitation; stabilize system operation and protect external components. PFC and THD In a conventional boost converter, Boundary Conduction Mode (BCM) is generally used to keep input current in phase with input voltage for power factor (PF) and Total Harmonic Distortion (THD). However, in flyback / buck boost topology, constant turn-on time and constant frequency in Discontinuous Conduction Mode (DCM) can implement high PF and low THD, as shown in Figure 18. Constant turn-on time is maintained by an internal error amplifier and a large external capacitor (typically >1µF) at the COMI pin. Constant frequency and DCM operation are managed by linear frequency control. Startup Powering at startup is slow due to the low feedback loop bandwidth in the PFC converter. To boost power during startup, an internal oscillator counts 12ms to define Startup Mode. During Startup Mode, turn-on time is determined by Current Mode control with a 0.2V CS voltage limit and transconductance becomes 14 times larger, as shown in Figure 17. After Startup Mode, turnon time is controlled by Voltage Mode using the COMI voltage and the error amplifier transconductance is reduced to 85Mho. IIN IIN_AVG GATE Constant Frequency Figure 18. Input Current and Switching Linear Frequency Control DCM should be guaranteed for high power factor in flyback topology. To maintain DCM in the wide range of output voltage, frequency is linearly adjusted by output voltage in linear frequency control. Output voltage is detected by auxiliary winding and resistive divider connected to the VS pin, as shown in Figure 19. Figure 17. Startup Sequence Constant-Current Regulation The output current is estimated using the peak drain current and inductor current discharge time because output current is same as the average of the diode current in steady state. The peak value of the drain current is determined by the CS pin. The inductor discharge time (tDIS) is sensed by a tDIS detector. Using three sources of information (peak drain current, inductor discharging time, and operating switching period), a TRUECURRENT™ block calculates estimated output current. The output of the calculation is compared with an internal precise reference to generate © 2011 Fairchild Semiconductor Corporation FL7730MY • Rev. 1.0.3 FL7730MY — Single-Stage Primary-Side-Regulation PWM Controller for PFC and LED Dimmable Driving Functional Description Figure 19. Linear Frequency Control www.fairchildsemi.com 9 Primary Current Secondary Current Short-LED Protection nVo Lm Vo = Vo.nom In a short-LED condition, the switching MOSFET and secondary diode are usually stressed by the high powering current. However, FL7730 changes the OCP level in a short-LED condition. When VS is lower than 0.4V, the OCP level becomes down to 0.2V from 0.7V, as shown in Figure 22, so that powering is limited and external components’ current stress is relieved. T t DIS 3 n Vo 4 Lm Vo = 75% Vo.nom 4 T 3 4 t DIS 3 3 n Vo 5 Lm Vo = 60% Vo.nom 5 T 3 5 t 3 DIS Figure 20. Primary and Secondary Current BCM Control Figure 22. Internal OCP Block The end of secondary diode conduction time can be over a switching period set by linear frequency control. In this case, FL7730 doesn’t allow CCM and operation mode changes from DCM to BCM. Therefore, FL7730 originally eliminates sub-harmonic distortion in CCM. Figure 23 shows operational waveforms in short-LED condition. Output voltage is quickly lowered to 0V after the LED-short event. The reflected auxiliary voltage is also 0V, making VS less than 0.4V. The 0.2V OCP level limits primary-side current and VDD hiccups up and down in between UVLO hysteresis. Dimming Control TRIAC dimmable control is implemented by simple and noise-immune external passive components and an internal dimming function block. Figure 21 shows dimming angle detection and the internal dimming control block. Dimming angle is sensed by Zener diode and Zener diode voltage is divided by two resistors (RD1 and RD2) to fit the sensing range of the DIM pin. The detected signal is filtered by capacitor CD to provide DC voltage into the DIM pin. The internal dimming control adds CSoffset to the peak current value as the input of TRUECURRENT™ calculation block. When the dimming angle is small, lowered DIM voltage increases CSoffset, which makes calculated output current larger and reduces turn-on time to dim the LED brightness. CS Vin 1 LEB RBIAS RD1 DIM TRIAC Dim Function VZ RD2 CD CSoffset 5 Figure 23. Waveforms in Short-LED Condition CSoffset FL7730MY — Single-Stage Primary-Side-Regulation PWM Controller for PFC and LED Dimmable Driving To disable the dimming function, a 1nF filter capacitor can be added at the DIM pin. An internal current source (~7.5µA) on the DIM pin charges the filter capacitor up to 4V. FL7730 goes into IC Test Mode when DIM voltage is over 6V; so the maximum DIM voltage should be limited to less than 5V. When output voltage decreases, secondary diode conduction time is increased and the linear frequency control lengthens switching period, which retains DCM operation in the wide output voltage range, as shown in Figure 20. The frequency control lowers primary rms current for better power efficiency in full-load condition. TrueCurrent Calculation DIM Figure 21. Dimming Control Schematic © 2011 Fairchild Semiconductor Corporation FL7730MY • Rev. 1.0.3 www.fairchildsemi.com 10 Under-Voltage Lockout (UVLO) FL7730 protects external components, such as diodes and capacitors on the secondary side, in the open-LED condition. During switch-off, the VDD capacitor is charged up to the auxiliary winding voltage, which is applied as the reflected output voltage. Because the VDD voltage has output voltage information, the internal voltage comparator on the VDD pin can trigger output Over-Voltage Protection (OVP), as shown in Figure 24. When at least one LED is open-circuited, output load impedance becomes very high and output capacitor is quickly charged up to VOVP x Ns / Na. Then switching is shut down and VDD block goes into “Hiccup” Mode until the open-LED condition is removed, shown in Figure 25. The turn-on and turn-off thresholds are fixed internally at 16V and 7.5V, respectively. During startup, the VDD capacitor must be charged to 16V through the startup resistor to enable the FL7730. The VDD capacitor continues to supply VDD until power can be delivered from the auxiliary winding of the main transformer. VDD must not drop below 7.5V during this startup process. This UVLO hysteresis window ensures that the VDD capacitor is adequate to supply VDD during startup. Over-Temperature Protection (OTP) The built-in temperature-sensing circuit shuts down PWM output if the junction temperature exceeds 150°C. While PWM output is shut down, the VDD voltage gradually drops to the UVLO voltage. Some of the internal circuits are shut down and VDD gradually starts increasing again. When VDD reaches 16V, all the internal circuits start operating. If the junction temperature is still higher than 140°C, the PWM controller shuts down immediately. Internal Bias VDD good + - VDD 4 VOVP Frequency Hopping S VDD good Q EMI reduction is accomplished by frequency hopping, which spreads the energy over a wider frequency range than the bandwidth measured by the EMI test equipment. The internal frequency-hopping circuit changes the switching frequency ±2.9kHz. Shutdown gate driver R Figure 24. Internal OVP Block Figure 25. Waveforms in Open-LED Condition © 2011 Fairchild Semiconductor Corporation FL7730MY • Rev. 1.0.3 FL7730MY — Single-Stage Primary-Side-Regulation PWM Controller for PFC and LED Dimmable Driving Open-LED Protection www.fairchildsemi.com 11 5.00 4.80 A 0.65 3.81 8 5 B 6.20 5.80 PIN ONE INDICATOR 1.75 4.00 3.80 1 5.60 4 1.27 (0.33) 0.25 M 1.27 C B A LAND PATTERN RECOMMENDATION 0.25 0.10 SEE DETAIL A 1.75 MAX 0.25 0.19 C 0.10 0.51 0.33 0.50 x 45° 0.25 R0.10 C OPTION A - BEVEL EDGE GAGE PLANE R0.10 OPTION B - NO BEVEL EDGE 0.36 NOTES: UNLESS OTHERWISE SPECIFIED 8° 0° 0.90 0.406 SEATING PLANE (1.04) DETAIL A SCALE: 2:1 A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M. E) DRAWING FILENAME: M08AREV13 Figure 26. 8-Lead, SOIC, JEDEC MS-012, .150" Narrow Body Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ © 2011 Fairchild Semiconductor Corporation FL7730MY • Rev. 1.0.3 www.fairchildsemi.com 8 FL7730MY — Single-Stage Primary-Side-Regulation PWM Controller for PFC and LED Dimmable Driving Physical Dimensions FL7730MY — Single-Stage Primary-Side-Regulation PWM Controller for PFC and LED Dimmable Driving 13 www.fairchildsemi.com © 2011 Fairchild Semiconductor Corporation FL7730MY • Rev. 1.0.3