NC7SB3157, FSA3157 Low-Voltage SPDT Analog Switch or 2:1Multiplexer / De-multiplexer Bus Switch Features Description ■ Useful in Both Analog and Digital Applications The NC7SB3157 / FSA3157 is a high-performance, single-pole / double-throw (SPDT) analog switch or 2:1 multiplexer / de-multiplexer bus switch. ■ Space-Saving, SC70 6-Lead Surface Mount Package ■ Ultra-Small, MicroPak™ Leadless Package ■ Low On Resistance: <10Ω on Typical at 3.3V VCC ■ Broad VCC Operating Range: 1.65V to 5.5V ■ Rail-to-Rail Signal Handling ■ Power-Down, High-Impedance Control Input ■ Over-Voltage Tolerance of Control Input to 7.0V ■ Break-Before-Make Enable Circuitry ■ 250MHz, 3dB Bandwidth The device is fabricated with advanced sub-micron CMOS technology to achieve high-speed enable and disable times and low on resistance. The break-beforemake select circuitry prevents disruption of signals on the B Port due to both switches temporarily being enabled during select pin switching. The device is specified to operate over the 1.65 to 5.5V VCC operating range. The control input tolerates voltages up to 5.5V, independent of the VCC operating range. Ordering Information Part Number Top Mark NC7SB3157P6X B7A RoHS 6-Lead, SC70, EIAJ SC88, 1.25mm Wide Package 3000 Units on Tape and Reel NC7SB3157L6X BB RoHS 6-Lead, MicroPak 1.0mm Wide Package 5000 Units on Tape and Reel FSA3157P6X B7A RoHS 6-Lead, SC70, EIAJ SC88, 1.25mm Wide Package 3000 Units on Tape and Reel FSA3157L6X BB RoHS 6-Lead, MicroPak 1.0mm Wide Package 5000 Units on Tape and Reel Eco Status Package Description Packing Method For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. MicroPak™ is a trademark of Fairchild Semiconductor Corporation. ©2006 Fairchild Semiconductor Corporation NC7SB3157, FSA3157 Rev. 1.0.3 www.fairchildsemi.com NC7SB3157, FSA3157 — Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch September 2008 Connection Diagrams B1 S A B0 2. Pin Assignments SC70 Figure 1. Logic Symbol Analog Symbol B1 S VCC GND B0 A Figure 4. Pin One Orientation Figure 3. Analog Symbol Function Table Input (S) Function Logic Level Low B0 Connected to A Logic Level High B1 Connected to A Note: Orientation of top mark determines pin one location. Read the top product code mark left to right and pin one is the lower left pin (see Figure 4). Pin Descriptions Pin Names Description A, B0, B1 Data Ports S Control Input B1 1 6 S GND 2 5 VCC B0 3 4 A Figure 5. Pad Assignments for MicroPak™ © 2006 Fairchild Semiconductor Corporation NC7SB3157, FSA3157 Rev. 1.0.3 www.fairchildsemi.com 2 NC7SB3157, FSA3157 — Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch Logic Symbol Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC Parameter Min. Max. Unit Supply Voltage –0.5 +7.0 V VS DC Switch Voltage(1) –0.5 VCC +0.5 V VIN DC Input Voltage(1) –0.5 +7.0 V IIK DC Input Diode Current at VIN < 0V DC Output Current –50 mA 128 mA DC VCC or Ground Current ±100 mA +150 °C °C IOUT ICC/IGND TSTG Storage Temperature Range –65 TJ Junction Temperature Under Bias +150 TL Junction Lead Temperature (Soldering, 10 seconds) +260 °C PD Power Dissipation at +85°C 180 mW Human Body Model, JESD22-A114 4000 V ESD Note: 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Min. Max. Unit VCC Supply Voltage Operating 1.65 5.50 V VIN Control Input Voltage(2) 0 VCC V VIN Voltage(2) 0 VCC V 0 VCC V VOUT TA tr, tf θJA Switch Input Output Voltage(2) Operating Temperature Input Rise and Fall Time –40 +85 °C Control Input VCC = 2.3V–3.6V 0 10 ns/V Control Input VCC = 4.5V–5.5V 0 5 ns/V 270 °C/W Thermal Resistance, SC70 Note: 2. Control input must be held HIGH or LOW; it must not float. © 2006 Fairchild Semiconductor Corporation NC7SB3157, FSA3157 Rev. 1.0.3 www.fairchildsemi.com 3 NC7SB3157, FSA3157 — Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch Absolute Maximum Ratings Symbol Parameter Conditions TA = –40°C to +85°C TA = +25°C VCC (V) Min. Typ. Max. Min. Units Max. VIH High Level Input Voltage 1.65 – 1.95 0.75 VCC VIL Low Level Input Voltage 1.65 – 1.95 0.25 VCC 0.25 VCC 2.3 – 5.5 0.3 VCC 0.3 VCC IIN Input Leakage Current 0 ≤ VIN ≤ 5.5V 0 – 5.5 ±0.05 ±0.1 ±1 µA Off State Leakage Current 0 ≤ A, B ≤ VCC 1.65 – 5.5 ±0.05 ±0.1 ±1 µA 4.5 3.0 7.0 7.0 VIN = 2.4V, IO = –30mA 5.0 12.0 12.0 VIN = 4.5V, IO = –30mA 7.0 15.0 15.0 IOFF 2.3 – 5.5 VIN = 0V, IO = 30mA RON Switch On Resistance(3) VIN = 0V, IO = 24mA 0.7 VCC 3.0 VIN = 3V, IO = –24mA VIN = 0V, IO = 8mA 2.3 VIN = 2.3V, IO = –8mA VIN = 0V, IO = 4mA 1.65 VIN = 1.65V, IO = –4mA ICC Quiescent Supply Current; All Channels On or Off VIN = VCC or GND IOUT = 0 Analog Signal Range RRANGE ΔRON Rflat 0.75 VCC 4.0 9.0 9.0 10.0 20.0 20.0 12.0 12.0 30.0 30.0 6.5 20.0 20.0 17.0 50.0 50.0 1 10 µA VCC V 0 VCC 0 IA = –30mA, 0 ≤ VBn ≤ VCC 4.5 25.0 3.0 50.0 2.3 100 IA = –4mA, 0 ≤ VBn ≤ VCC 1.65 300 On Resistance Flatness(3, 4, 6) Ω 5.0 On Resistance Over IA = –24mA, 0 ≤ VBn ≤ VCC Signal Range (3, 7) IA = –8mA, 0 ≤ VBn ≤ VCC On Resistance Match BetweenChannels(3, 4, 5) V 13.0 5.5 VCC V 0.7 VCC IA = –30mA, VBn = 3.15 4.5 0.15 IA = –24mA, VBn 2.1 3.0 0.2 IA = –8mA, VBn = 1.6 2.3 0.5 IA = –4mA, VBn = 1.15 1.65 0.50 IA = –30mA, 0 ≤ VBn ≤ VCC 5.0 6.0 IA = –24mA, 0 ≤ VBn ≤ VCC 3.3 12.0 IA = –8mA, 0 ≤ VBn ≤ VCC 2.5 28.0 IA = –4mA, 0 ≤ VBn ≤ VCC 1.8 125 Ω Ω Ω Notes: 3. Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B Ports). 4. Parameter is characterized, but not tested in production. 5. ΔRON = RON max – RON minimum measured at identical VCC, temperature, and voltage levels. 6. Flatness is defined as the difference between the maximum and minimum value of on resistance over the specified range of conditions. 7. Guaranteed by design. © 2006 Fairchild Semiconductor Corporation NC7SB3157, FSA3157 Rev. 1.0.2 www.fairchildsemi.com 4 NC7SB3157, FSA3157 — Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch DC Electrical Characteristics Symbol tPHL, tPLH Parameter Conditions Propagation Delay Bus-to-Bus(8) VI = OPEN VCC (V) TA = –40°C to Figure +85°C Units Number Min. Typ. Max. Min. Max. TA = +25°C 1.65 – 1.95 3.5 3.5 2.3 – 2.7 1.2 1.2 3.0 – 3.6 0.8 0.8 4.5 – 5.5 tPZL, tPZH tPLZ, tPHZ tB-M Q OIRR Output Enable Time Turn-On Time (A to Bn) Output Disable Time Turn-Off Time (A Port to B Port) VI = 2 x VCC for tPZL VI = 0V for tPZH VI = 2 x VCC for tPLZ VI = 0V for tPHZ Break-Before-Make Time(9) Charge Injection(9) 0.3 Figure 12 Figure 13 ns Figure 12 Figure 13 0.3 1.65 – 1.95 7.0 23.0 7.0 24.0 2.3 – 2.7 3.5 13.0 3.5 14.0 3.0 – 3.6 2.5 6.9 2.5 7.6 4.5 – 5.5 1.7 5.2 1.7 5.7 1.65 – 1.95 3.0 12.5 3.0 13.0 2.3 – 2.7 2.0 7.0 2.0 7.5 3.0 – 3.6 1.5 5.0 1.5 5.3 3.5 0.8 3.8 4.5 – 5.5 0.8 1.65 –1.95 0.5 0.5 2.3 – 2.7 0.5 0.5 3.0 – 3.6 0.5 0.5 4.5 – 5.5 0.5 ns Figure 12 Figure 13 ns Figure 14 pC Figure 15 dB Figure 16 dB Figure 17 0.5 CL = 0.1nF, VGEN = 0V, 5.0 7.0 RGEN = 0Ω 3.3 3.0 Off Isolation(10) RL = 50Ω, f = 10MHz 1.65 – 5.5 –57.0 Crosstalk RL = 50Ω, f = 10MHz 1.65 – 5.5 –54.0 BW –3dB Bandwidth RL = 50Ω 1.65 – 5.5 250 THD Total Harmonic Distortion(9) RL = 600Ω, 0.5 VPP, f = 600 Hz to 20 KHz 5.0 .011 Xtalk ns MHz Figure 20 % Notes: 8. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the on resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance). 9. Guaranteed by design. 10. Off Isolation = 20 log10 [VA / VBn]. Capacitance TA = +25°C, f = 1MHz. Capacitance is characterized, but not tested in production. Symbol CIN CIO-B CIOA-ON Parameter Conditions Control Pin Input Capacitance Typ. Max. Units Figure Number VCC = 0V 2.3 pF B Port Off Capacitance VCC = 5.0V 6.5 pF Figure 18 A Port Capacitance When Switch Is Enabled VCC = 5.0V 18.5 pF Figure 19 © 2006 Fairchild Semiconductor Corporation NC7SB3157, FSA3157 Rev. 1.0.2 www.fairchildsemi.com 5 NC7SB3157, FSA3157 — Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch AC Electrical Characteristics VCC = 1.65V Off Isolation (dB) Off Isolation (dB) 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 1 10 100 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 1000 VCC = 5.5V 1 10 Frequency (MHz) VCC = 1.65V 1 10 100 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 1000 VCC = 5.5V 1 10 Frequency (MHz) 100 1000 Frequency (MHz) Figure 8. Crosstalk, VCC = 1.65V Figure 9. Crosstalk, VCC = 5.5V 0 0 -1 -1 -2 -2 -3 -3 Gain (dB) Gain (dB) 1000 Figure 7. Off Isolation, VCC = 5.5V Crosstalk (dB) Crosstalk (dB) Figure 6. Off Isolation, VCC = 1.65V 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 100 Frequency (MHz) -4 -5 -6 -4 -5 -6 CL = 0pF VCC = 1.65V -7 CL = 0pF VCC = 5.5V -7 -8 -8 1 10 100 1000 1 Frequency (MHz) 100 1000 Frequency (MHz) Figure 10. Bandwidth, VCC = 1.65V Figure 11. Bandwidth, VCC = 5.5V © 2006 Fairchild Semiconductor Corporation NC7SB3157, FSA3157 Rev. 1.0.2 10 www.fairchildsemi.com 6 NC7SB3157, FSA3157 — Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch Typical Characteristics VI RU FROM OUTPUT UNDER TEST CL RD Notes: Input driven by 50Ω source terminated in 50Ω CL includes load and stray capacitance Input PRR = 1.0 MHz; tW = 500 ns Figure 12. AC Test Circuit tr = 2.5ns tr = 2.5ns tr = 2.5ns VCC tr = 2.5ns 90% Switch Input 90% 50% 50% 10% tPZL GND tW Output tPHL 50% VOL+0.3V VOH Output 50% GND tPLZ VTRI 10% tPLH 50% 10% 50% 10% VCC 90% 90% Control Input VOL tPHZ VOH tPZH 50% VOL Output VOH–0.3V 50% VTRI Figure 13. AC Waveforms VIN B0 A S Logic Input VOUT B1 RL CL VOUT 0.9 x VOUT Logic Input tD Figure 14. Break-Before-Make Interval Timing © 2006 Fairchild Semiconductor Corporation NC7SB3157, FSA3157 Rev. 1.0.3 www.fairchildsemi.com 7 NC7SB3157, FSA3157 — Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch AC Loading and Waveforms RGEN A BN Logic Input VOUT OFF ON OFF VGE S RL 1MΩ CL 100pF ΔVOUT VOUT Logic Input Q = (ΔVOUT)(CL) Figure 15. Charge Injection Test 10nF 10nF 50Ω Signal Generator 0dBm VCC A Logic Input 0V or VIH S BN Analyzer 50Ω B0 VCC A 50Ω B1 S Analyzer GND 50Ω GND Figure 16. Off Isolation Figure 17. Crosstalk 10nF 10nF A Capacitance Meter f = 1MHz Capacitance Meter VCC S Logic Input 0V or VCC A VCC f = 1MHz S Logic Input 0V or VCC BN BN GND GND Figure 19. Channel On Capacitance Figure 18. Channel Off Capacitance 10nF Signal Generator 0dBm BN VCC A 50Ω S Logic Input 0V or VCC GND Figure 20. Bandwidth © 2006 Fairchild Semiconductor Corporation NC7SB3157, FSA3157 Rev. 1.0.3 www.fairchildsemi.com 8 NC7SB3157, FSA3157 — Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch AC Loading and Waveforms (continued) Figure 21. 6-Lead, SC70, EIAJ SC88, 1.25mm Wide Package Note: click here for tape and reel specifcations, available at: http://www.fairchildsemi.com/products/analog/pdf/sc70-6_tr.pdf Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2006 Fairchild Semiconductor Corporation NC7SB3157, FSA3157 Rev. 1.0.2 www.fairchildsemi.com 9 NC7SB3157, FSA3157 — Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch Physical Dimensions 2X 0.05 C 1.45 B 2X (1) 0.05 C (0.49) 5X 1.00 (0.75) (0.52) 1X A TOP VIEW 0.55MAX (0.30) 6X PIN 1 0.05 C 0.05 0.00 0.05 C C DETAIL A RECOMMENED LAND PATTERN 0.25 0.15 6X 1.0 0.10 0.05 0.45 0.35 0.10 0.00 6X C B A C 0.40 0.30 0.35 5X 0.25 0.40 5X 0.30 (0.05) 6X Notes: 0.5 (0.13) 4X BOTTOM VIEW 0.075 X 45 CHAMFER DETAIL A PIN 1 TERMINAL 1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD 2. DIMENSIONS ARE IN MILLIMETERS 3. DRAWING CONFORMS TO ASME Y14.5M-1994 MAC06AREVC 6-Lead, MicroPak™ 1.0mm Wide Package Note: click here for tape and reel specifcations, available at: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2006 Fairchild Semiconductor Corporation NC7SB3157, FSA3157 Rev. 1.0.2 www.fairchildsemi.com 10 NC7SB3157, FSA3157 — Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch Physical Dimensions NC7SB3157, FSA3157 — Low-Voltage SPDT Analog Switch or 2:1 Multiplexer / De-multiplexer Bus Switch 11 NC7SB3157, FSA3157 Rev. 1.0.3 www.fairchildsemi.com © 2006 Fairchild Semiconductor Corporation