STMICROELECTRONICS VNP10N06

VNP10N06
”OMNIFET”:
FULLY AUTOPROTECTED POWER MOSFET
TYPE
VNP10N06
■
■
■
■
■
■
■
■
■
■
V clamp
R DS(on)
I l im
60 V
0.3 Ω
10 A
LINEAR CURRENT LIMITATION
THERMAL SHUT DOWN
SHORT CIRCUIT PROTECTION
INTEGRATED CLAMP
LOW CURRENT DRAWN FROM INPUT PIN
LOGIC LEVEL INPUT THRESHOLD
ESD PROTECTION
SCHMITT TRIGGER ON INPUT
HIGH NOISE IMMUNITY
STANDARD TO-220 PACKAGE
1
2
3
TO-220
DESCRIPTION
The VNP10N06 is a monolithic device made
using SGS-THOMSON Vertical Intelligent Power
M0 Technology, intended for replacement of
standard power MOSFETS in DC to 50 KHz
applications. Built-in thermal shut-down, linear
current limitation and overvoltage clamp protect
the chip in harsh enviroments.
BLOCK DIAGRAM
June 1997
1/11
VNP10N06
ABSOLUTE MAXIMUM RATING
Symbol
Parameter
Value
Unit
V
V DS
Drain-source Voltage (V in = 0)
Internally Clamped
V in
Input Voltage
Internally Clamped
V
I in
Input Current
± 20
mA
ID
Drain Current
Internally Limited
A
IR
Reverse DC O utput Current
V esd
Electrostatic Discharge (C= 100 pF , R=1.5 KΩ)
P to t
Total Dissipation at T c = 25 C
Tj
Tc
T st g
o
-15
A
4000
V
42
Operating Junction T emperature
Case Operating T emperature
W
Internally Limited
o
C
Internally Limited
o
C
-55 to 150
o
C
Storage Temperature
THERMAL DATA
R t hj-ca se
R t hj- amb
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Max
Max
o
3
62.5
o
C/W
C/W
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symb ol
V CLAMP
Parameter
Test Cond ition s
Min.
Typ .
Max.
Un it
50
60
70
V
1.5
V
Drain-source Clamp
Voltage
I D = 200 mA
V in = 0
VI L
Input Low Level
Voltage
I D = 100 µA
VDS = 16 V
VI H
Input High Level
Voltage
R L = 27 Ω V DD = 16 V
V DS = 0.5 V
3.2
V I NCL
Input-Source Reverse
Clamp Voltage
I in = -1 mA
I in = 1 mA
-1
8
I DSS
Zero Input Voltage
Drain Current (V in = 0)
V DS = 50 V
V DS < 35 V
I I SS
Supply Current from
Input Pin
V DS = 0 V
V
-0.3
11
V
V
250
100
µA
µA
150
300
µA
Typ .
Max.
Un it
0.15
0.3
Ω
Typ .
Max.
Un it
350
500
pF
V in = V IL
V in = V IL
Vin = 5 V
ON (∗)
Symb ol
R DS( on)
Parameter
Static Drain-source On
Resistance
Test Cond ition s
Vi n = 7 V
ID = 1 A
Min.
o
T J < 125 C
DYNAMIC
Symb ol
C oss
2/11
Parameter
Output Capacitance
Test Cond ition s
V DS = 13 V
f = 1 MHz
Vin = 0
Min.
VNP10N06
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING (∗∗)
Symb ol
Parameter
Test Cond ition s
Typ .
Max.
Un it
1100
550
200
100
1600
900
400
200
ns
ns
ns
ns
V DD = 16 V
Id = 1 A
R gen = 1000 Ω
V gen = 7 V
(see figure 3)
1.2
1
1.6
1.2
1.8
1.5
2.3
1.8
µs
µs
µs
µs
Turn-on Current Slope
V DD = 16 V
Vi n = 7 V
ID = 1 A
R gen = 10 Ω
1.5
A/µs
Total Input Charge
V DD = 12 V
ID = 1 A
13
nC
t d(on)
tr
t d(of f)
tf
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall T ime
V DD = 16 V
Id = 1 A
R gen = 10 Ω
V gen = 7 V
(see figure 3)
t d(on)
tr
t d(of f)
tf
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall T ime
(di/dt) on
Qi
Min.
V in = 7 V
SOURCE DRAIN DIODE
Symb ol
Parameter
Test Cond ition s
V SD (∗)
Forward O n Voltage
I SD = 1 A
t r r (∗∗)
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I SD = 1 A
di/dt = 100 A/µs
Tj = 25 oC
V DD = 30 V
(see test circuit, figure 5)
Q r r (∗∗)
I RRM (∗∗)
Min.
V in = V IL
Typ .
Max.
Un it
0.8
1.6
V
125
ns
0.22
µC
3.5
A
PROTECTION
Symb ol
I lim
Parameter
Test Cond ition s
Drain Current Limit
Vi n = 7 V
V DS = 13 V
t dl im (∗∗)
Step Response
Current Limit
Vi n = 7 V
V DS step from 0 to 13 V
T jsh (∗∗)
Overtemperature
Shutdown
T j rs (∗∗)
Overtemperature Reset
E as (∗∗)
Single Pulse
Avalanche Energy
o
starting T j = 25 C
V DD = 24 V
V i n = 7 V R g en = 1 KΩ L = 10 mH
Min.
Typ .
Max.
Un it
6
10
15
A
12
20
µs
150
o
C
135
o
C
250
mJ
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(∗∗) Parameters guaranteed by design/characterization
3/11
VNP10N06
PROTECTION FEATURES
During Normal Operation, the INPUT pin is
electrically connected to the gate of the internal
power MOSFET through a low impedance path
as soon as VIN > VIH.
The device then behaves like a standard power
MOSFET and can be used as a switch from DC
to 50KHz. The only difference from the user’s
standpoint is that a small DC current (typically
150 µA) flows into the INPUT pin in order to
supply the internal circuitry.
During turn-off of an unclamped inductive load
the output voltage is clamped to a safe level by
an integrated Zener clamp between DRAIN pin
and the gate of the internal Power MOSFET.
In this condition, the Power MOSFET gate is set
4/11
to a voltage high enough to sustain the inductive
load current even if the INPUT pin is driven to 0V.
The device integrates an active current limiter
circuit which limits the drain current ID to Ilim
whatever the INPUT pin Voltage.
When the current limiter is active, the device
operates in the linear region, so power dissipation
may exceed the heatsinking capability. Both case
and junction temperatures increase, and if this
phase lasts long enough, junction temperature
may reach the overtemperature threshold Tjsh.
If Tj reaches Tjsh, the device shuts down
whatever the INPUT pin voltage. The device will
restart automatically when Tj has cooled down to
Tjrs
VNP10N06
Thermal Impedance
Derating Curve
Output Characteristics
Static Drain-Source On Resistance vs Input
Voltage
Static Drain-Source On Resistance
Static Drain-Source On Resistance
5/11
VNP10N06
Input Charge vs Input Voltage
Capacitance Variations
Normalized Input Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
Normalized On Resistance vs Temperature
Turn-on Current Slope
6/11
VNP10N06
Turn-on Current Slope
Turn-off Drain-Source Voltage Slope
Turn-off Drain-Source Voltage Slope
Switching Time Resistive Load
Switching Time Resistive Load
Switching Time Resistive Load
7/11
VNP10N06
Current Limit vs Junction Temperature
Source Drain Diode Voltage vs Junction
Temperature
8/11
Step Response Current Limit
VNP10N06
Fig. 1: Unclamped Inductive Load Test Circuits
Fig. 2: Unclamped Inductive Waveforms
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Input Charge Test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 6: Waveforms
9/11
VNP10N06
TO-220 MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
C
1.23
1.32
0.048
0.051
D
2.40
2.72
0.094
D1
0.107
1.27
0.050
E
0.49
0.70
0.019
0.027
F
0.61
0.88
0.024
0.034
F1
1.14
1.70
0.044
0.067
F2
1.14
1.70
0.044
0.067
G
4.95
5.15
0.194
0.203
G1
2.4
2.7
0.094
0.106
H2
10.0
10.40
0.393
0.409
14.0
0.511
0.551
L2
16.4
L4
0.645
13.0
2.65
2.95
0.104
0.116
L6
15.25
15.75
0.600
0.620
L7
6.2
6.6
0.244
0.260
L9
3.5
3.93
0.137
0.154
DIA.
3.75
3.85
0.147
0.151
D1
C
D
A
E
L5
H2
G
G1
F1
L2
F2
F
Dia.
L5
L9
L7
L6
10/11
L4
P011C
VNP10N06
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
 1997 SGS-THOMSON Microelectronics - Printed in Italy - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
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11/11