STMICROELECTRONICS VNP35N07FI

VNP35N07FI
VNB35N07/VNV35N07

”OMNIFET”:
FULLY AUTOPROTECTED POWER MOSFET
TYPE
V clamp
R DS( on)
I lim
VNP35N07FI
VNB35N07
VNV35N07
70 V
70 V
70 V
0.028 Ω
0.028 Ω
0.028 Ω
35 A
35 A
35 A
■
■
■
■
■
■
■
■
■
LINEAR CURRENT LIMITATION
THERMAL SHUT DOWN
SHORT CIRCUIT PROTECTION
INTEGRATED CLAMP
LOW CURRENT DRAWN FROM INPUT PIN
DIAGNOSTIC FEEDBACK THROUGH INPUT
PIN
ESD PROTECTION
DIRECT ACCESS TO THE GATE OF THE
POWER MOSFET (ANALOG DRIVING)
COMPATIBLE WITH STANDARD POWER
MOSFET
DESCRIPTION
The VNP35N07FI, VNB35N07 and VNV35N07
are
monolithic
devices
made
using
STMicroelectronics VIPower M0 Technology,
intended for replacement of standard power
MOSFETS in DC to 50 KHz applications. Built-in
thermal shut-down, linear current limitation and
overvoltage clamp protect the chip in harsh
ISOWATT220
3
1
2
10
3
1
D2PAK
TO-263
1
PowerSO-10
enviroments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
BLOCK DIAGRAM (∗)
(∗) PowerSO-10 Pin Configuration : INPUT = 6,7,8,9,10; SOURCE = 1,2,4,5; DRAIN = TAB
June 1998
1/13
VNP35N07FI-VNB35N07-VNV35N07
ABSOLUTE MAXIMUM RATING
Symbol
Parameter
Value
Po werSO-10
D2PAK
V DS
Drain-source Voltage (V in = 0)
V in
Unit
ISOW AT T220
Internally Clamped
V
Input Voltage
18
V
ID
Drain Current
Internally Limited
A
IR
Reverse DC O utput Current
-50
A
2000
V
V esd
P to t
Tj
Tc
T st g
Electrostatic Discharge (C= 100 pF , R=1.5 KΩ)
o
Total Dissipation at T c = 25 C
125
Operating Junction T emperature
Case Operating T emperature
Storage Temperature
40
W
Internally Limited
o
C
Internally Limited
o
C
-55 to 150
o
C
THERMAL DATA
ISOW ATT 220 Pow erSO -10
R t hj-ca se Thermal Resistance Junction-case
R t hj-a mb Thermal Resistance Junction-ambient
Max
Max
3.12
62.5
1
50
D2PAK
1
62.5
o
o
C/W
C/W
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symb ol
Parameter
Test Cond ition s
V CLAMP
Drain-source Clamp
Voltage
I D = 200 mA
V CL TH
Drain-source Clamp
Threshold Voltage
I D = 2 mA
V I NCL
Input-Source Reverse
Clamp Voltage
I in = -1 mA
I DSS
Zero Input Voltage
Drain Current (V in = 0)
V DS = 13 V
V DS = 25 V
V in = 0
V in = 0
I I SS
Supply Current from
Input Pin
V DS = 0 V
Vin = 10 V
V in = 0
V in = 0
Min.
Typ .
Max.
Un it
60
70
80
V
55
V
-1
-0.3
V
50
200
µA
µA
250
500
µA
Typ .
Max.
Un it
3
V
0.028
0.035
Ω
Ω
Max.
Un it
ON (∗)
Symb ol
Parameter
Test Cond ition s
Min.
0.8
V IN(th)
Input Threshold
Voltage
V DS = Vin
ID + Ii n = 1 mA
R DS( on)
Static Drain-source On
Resistance
V i n = 10 V
Vi n = 5 V
I D = 18 A
ID = 18 A
DYNAMIC
Symb ol
g fs (∗)
C oss
2/13
Parameter
Test Cond ition s
Forward
Transconductance
V DS = 13 V
I D = 18 A
Output Capacitance
V DS = 13 V
f = 1 MHz
Vin = 0
Min.
Typ .
20
25
980
S
1400
pF
VNP35N07FI-VNB35N07-VNV35N07
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING (∗∗)
Symb ol
Typ .
Max.
Un it
t d(on)
tr
t d(of f)
tf
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall T ime
V DD = 28 V
V gen = 10 V
(see figure 3)
Id = 18 A
R gen = 10 Ω
100
350
650
200
200
600
1000
350
ns
ns
ns
ns
t d(on)
tr
t d(of f)
tf
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall T ime
V DD = 28 V
V gen = 10 V
(see figure 3)
Id = 18 A
R gen = 1000 Ω
500
2.7
10
4.3
800
4.2
16
6.5
ns
µs
µs
µs
Turn-on Current Slope
V DD = 28 V
V i n = 10 V
Total Input Charge
V DD = 12 V
(di/dt) on
Qi
Parameter
Test Cond ition s
Min.
ID = 18 A
R gen = 10 Ω
ID = 18 A
V i n = 10 V
60
A/µs
100
nC
SOURCE DRAIN DIODE
Symb ol
V SD (∗)
t r r(∗∗)
Q r r(∗∗)
I RRM (∗∗)
Parameter
Test Cond ition s
Forward O n Voltage
I SD = 18 A
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I SD = 18 A
di/dt = 100 A/µs
V DD = 30 V
Tj = 25 oC
(see test circuit, figure 5)
Min.
Typ .
V in = 0
Max.
Un it
1.6
V
250
ns
1
µC
8
A
PROTECTION
Symb ol
I lim
Parameter
Test Cond ition s
Min.
Typ .
Max.
Un it
VDS = 13 V
V DS = 13 V
25
25
35
35
45
45
A
A
35
70
60
140
µs
µs
Drain Current Limit
V i n = 10 V
Vi n = 5 V
t dl im (∗∗)
Step Response
Current Limit
V i n = 10 V
Vi n = 5 V
T j sh(∗∗)
Overtemperature
Shutdown
150
o
C
T j rs(∗∗)
Overtemperature Reset
135
o
C
I gf (∗∗)
Fault Sink Current
V i n = 10 V
Vi n = 5 V
E as(∗∗)
Single Pulse
Avalanche Energy
starting T j = 25 o C
V DD = 20 V
V i n = 10 V R gen = 1 KΩ L = 10 mH
50
20
VDS = 13 V
V DS = 13 V
2.5
mA
mA
J
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(∗∗) Parameters guaranteed by design/characterization
3/13
VNP35N07FI-VNB35N07-VNV35N07
PROTECTION FEATURES
During normal operation, the Input pin is
electrically connected to the gate of the internal
power MOSFET. The device then behaves like a
standard power MOSFET and can be used as a
switch from DC to 50 KHz. The only difference
from the user’s standpoint is that a small DC
current (Iiss) flows into the Input pin in order to
supply the internal circuitry.
The device integrates:
- OVERVOLTAGE
CLAMP
PROTECTION:
internally set at 70V, along with the rugged
avalanche characteristics of the Power
MOSFET stage give this device unrivalled
ruggedness and energy handling capability.
This feature is mainly important when driving
inductive loads.
- LINEAR CURRENT LIMITER CIRCUIT: limits
the drain current Id to Ilim whatever the Input
pin voltage. When the current limiter is active,
the device operates in the linear region, so
power dissipation may exceed the capability of
the heatsink. Both case and junction
temperatures increase, and if this phase lasts
long enough, junction temperature may reach
the overtemperature threshold Tjsh.
4/13
- OVERTEMPERATURE AND SHORT CIRCUIT
PROTECTION: these are based on sensing
the chip temperature and are not dependent on
the input voltage. The location of the sensing
element on the chip in the power stage area
ensures fast, accurate detection of the junction
temperature. Overtemperature cutout occurs at
minimum 150oC. The device is automatically
restarted when the chip temperature falls
below 135oC.
- STATUS FEEDBACK: In the case of an
overtemperature fault condition, a Status
Feedback is provided through the Input pin.
The internal protection circuit disconnects the
input from the gate and connects it instead to
ground via an equivalent resistance of 100 Ω.
The failure can be detected by monitoring the
voltage at the Input pin, which will be close to
ground potential.
Additional features of this device are ESD
protection according to the Human Body model
and the ability to be driven from a TTL Logic
circuit (with a small increase in RDS(on)).
VNP35N07FI-VNB35N07-VNV35N07
Thermal Impedance For ISOWATT220
Thermal Impedance For D2PAK / PowerSO-10
Derating Curve
Output Characteristics
Transconductance
Static Drain-Source On Resistance vs Input
Voltage
5/13
VNP35N07FI-VNB35N07-VNV35N07
Static Drain-Source On Resistance
Static Drain-Source On Resistance
Input Charge vs Input Voltage
Capacitance Variations
Normalized Input Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
6/13
VNP35N07FI-VNB35N07-VNV35N07
Normalized On Resistance vs Temperature
Turn-on Current Slope
Turn-on Current Slope
Turn-off Drain-Source Voltage Slope
Turn-off Drain-Source Voltage Slope
Switching Time Resistive Load
7/13
VNP35N07FI-VNB35N07-VNV35N07
Switching Time Resistive Load
Switching Time Resistive Load
Current Limit vs Junction Temperature
Step Response Current Limit
Source Drain Diode Forward Characteristics
8/13
VNP35N07FI-VNB35N07-VNV35N07
Fig. 1: Unclamped Inductive Load Test Circuits
Fig. 2: Unclamped Inductive Waveforms
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Input Charge Test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 6: Waveforms
9/13
VNP35N07FI-VNB35N07-VNV35N07
ISOWATT220 MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.4
4.6
0.173
0.181
B
2.5
2.7
0.098
0.106
D
2.5
2.75
0.098
0.108
E
0.4
0.7
0.015
0.027
F
0.75
1
0.030
0.039
F1
1.15
1.7
0.045
0.067
F2
1.15
1.7
0.045
0.067
G
4.95
5.2
0.195
0.204
G1
2.4
2.7
0.094
0.106
H
10
10.4
0.393
0.409
L2
16
0.630
28.6
30.6
1.126
1.204
L4
9.8
10.6
0.385
0.417
L6
15.9
16.4
0.626
0.645
L7
9
9.3
0.354
0.366
Ø
3
3.2
0.118
0.126
B
D
A
E
L3
L3
L6
F
F1
L7
F2
H
G
G1
¯
1 2 3
L2
10/13
L4
P011G
VNP35N07FI-VNB35N07-VNV35N07
TO-263 (D2PAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.3
4.6
0.169
0.181
A1
2.49
2.69
0.098
0.106
B
0.7
0.93
0.027
0.036
B2
1.25
1.4
0.049
0.055
C
0.45
0.6
0.017
0.023
C2
1.21
1.36
0.047
0.053
D
8.95
9.35
0.352
0.368
E
10
10.28
0.393
0.404
G
4.88
5.28
0.192
0.208
L
15
15.85
0.590
0.624
L2
1.27
1.4
0.050
0.055
L3
1.4
1.75
0.055
0.068
E
A
C2
L2
D
L
L3
B2
B
A1
C
G
P011P6/C
11/13
VNP35N07FI-VNB35N07-VNV35N07
PowerSO-10 MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
3.35
3.65
0.132
0.144
A1
0.00
0.10
0.000
0.004
B
0.40
0.60
0.016
0.024
c
0.35
0.55
0.013
0.022
D
9.40
9.60
0.370
0.378
D1
7.40
7.60
0.291
0.300
E
9.30
9.50
0.366
0.374
E1
7.20
7.40
0.283
0.291
E2
7.20
7.60
0.283
0.300
E3
6.10
6.35
0.240
0.250
E4
5.90
6.10
0.232
e
1.27
0.240
0.050
F
1.25
1.35
0.049
0.053
H
13.80
14.40
0.543
0.567
1.80
0.047
h
0.50
L
0.002
1.20
q
1.70
0.067
o
α
0.071
8o
0
B
0.10 A B
10
5
e
0.25
B
=
=
=
E4
=
=
=
1
E1
=
E3
=
E2
=
E
=
=
=
H
6
SEATING
PLANE
DETAIL ”A”
A
C
M
Q
h
D
= D1 =
=
=
SEATING
PLANE
A
F
A1
A1
L
DETAIL ”A”
α
0068039-C
12/13
VNP35N07FI-VNB35N07-VNV35N07
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
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 1998 STMicroelectronics – Printed in Italy – All Rights Reserved
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13/13