VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 ® “OMNIFET II”: FULLY AUTOPROTECTED POWER MOSFET TYPE VNN7NV04 VNS7NV04 VND7NV04 RDS(on) Ilim Vclamp 60 mΩ 6A 40 V 2 1 2 3 SO-8 SOT-223 VND7NV04-1 n LINEAR CURRENT LIMITATION n THERMAL SHUT DOWN n SHORT CIRCUIT PROTECTION n INTEGRATED CLAMP n LOW CURRENT DRAWN FROM INPUT PIN n DIAGNOSTIC FEEDBACK THROUGH INPUT PIN n ESD PROTECTION n DIRECT ACCESS TO THE GATE OF THE POWER MOSFET (ANALOG DRIVING) n COMPATIBLE WITH STANDARD POWER MOSFET DESCRIPTION The VNN7NV04, VNS7NV04, VND7NV04 VND7NV04-1, are monolithic devices designed in STMicroelectronics VIPower M0-3 Technology, intended for replacement of standard Power 3 3 2 1 1 TO251 (IPAK) TO252 (DPAK) ORDER CODES PACKAGE SOT-223 TUBE VNN7NV04 SO-8 VNS7NV04 TO-252 (DPAK) VND7NV04 TO-251 (IPAK) T&R VNN7NV0413TR VNS7NV0413TR VND7NV0413TR VND7NV04-1 - MOSFETS from DC up to 50KHz applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protects the chip in harsh environments. Fault feedback can be detected by monitoring the voltage at the input pin. BLOCK DIAGRAM DRAIN 2 Overvoltage Clamp INPUT 1 Gate Control Over Temperature Linear Current Limiter 3 SOURCE February 2003 FC01000 1/29 1 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 ABSOLUTE MAXIMUM RATING Symbol Parameter VDS VIN IIN RIN MIN ID IR VESD1 Drain-source Voltage (VIN=0V) Input Voltage Input Current Minimum Input Series Impedance Drain Current Reverse DC Output Current Electrostatic Discharge (R=1.5KΩ, C=100pF) Electrostatic Discharge on output pin only (R=330Ω, C=150pF) Total Dissipation at Tc=25°C Maximum Switching Energy (L=0.7mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=9A) Maximum Switching Energy (L=0.6mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=9A) Operating Junction Temperature Case Operating Temperature Storage Temperature VESD2 Ptot EMAX EMAX Tj Tc Tstg SOT-223 Value SO-8 DPAK/IPAK Internally Clamped Internally Clamped +/-20 150 Internally Limited -10.5 4000 16500 7 4.6 40 37 1 8 DRAIN DRAIN 4 INPUT 5 DRAIN SO-8 Package (*) (*) For the pins configuration related to SOT-223, DPAK, IPAK see outlines at page 1. CURRENT AND VOLTAGE CONVENTIONS ID DRAIN IIN RIN INPUT SOURCE VIN 2/29 1 W 40 mJ °C °C °C DRAIN SOURCE 60 mJ Internally limited Internally limited -55 to 150 SOURCE V V mA Ω A A V V CONNECTION DIAGRAM (TOP VIEW) SOURCE Unit VDS VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 THERMAL DATA Symbol Rthj-case Rthj-lead Rthj-amb (*) When Value Parameter SOT-223 Thermal Resistance Junction-case}}} MAX 18 Thermal Resistance Junction-lead MAX Thermal Resistance Junction-ambient MAX 96 (*) SO-8 DPAK 2.1 IPAK 2.1 65 (*) 102 27 90 (*) Unit °C/W °C/W °C/W mounted on a standard single-sided FR4 board with 0.5cm2 of Cu (at least 35 µm thick) connected to all DRAIN pins. ELECTRICAL CHARACTERISTICS (-40°C < Tj < 150°C, unless otherwise specified) OFF Symbol VCLAMP VCLTH VINTH IISS Parameter Drain-source Clamp Voltage Drain-source Clamp Threshold Voltage Input Threshold Voltage Supply Current from Input Pin VINCL Input-Source Clamp Voltage IDSS Zero Input Voltage Drain Current (VIN=0V) Test Conditions Min Typ Max Unit VIN=0V; ID=3.5A 40 45 55 V VIN=0V; ID=2mA 36 VDS=VIN; ID=1mA 0.5 VDS=0V; VIN=5V IIN=1mA IIN=-1mA VDS=13V; VIN=0V; Tj=25°C 6 V 2.5 V 100 150 µA 6.8 8 -1.0 -0.3 30 VDS=25V; VIN=0V 75 V µA ON Symbol RDS(on) Parameter Static Drain-source On Resistance Test Conditions VIN=5V; ID=3.5A; Tj=25°C VIN=5V; ID=3.5A Min Typ Max 60 120 Unit mΩ 3/29 1 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 ELECTRICAL CHARACTERISTICS (continued) (Tj=25°C, unless otherwise specified) DYNAMIC Symbol gfs (*) COSS Parameter Forward Transconductance Output Capacitance Test Conditions Min VDD=13V; ID=3.5A VDS=13V; f=1MHz; VIN=0V Typ Max Unit 9 S 220 pF SWITCHING Symbol td(on) tr td(off) tf td(on) tr td(off) tf Parameter Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time (dI/dt)on Turn-on Current Slope Qi Total Input Charge Test Conditions Min VDD=15V; ID=3.5A Vgen=5V; Rgen=RIN MIN=150Ω (see figure 1) VDD=15V; ID=3.5A Vgen=5V; Rgen=2.2KΩ (see figure 1) VDD=15V; ID=3.5A Vgen=5V; Rgen=RIN MIN=150Ω VDD=12V; ID=3.5A; VIN=5V Igen=2.13mA (see figure 5) Typ 100 470 500 350 0.75 4.6 5.4 3.6 Max 300 1500 1500 1000 2.3 14.0 16.0 11.0 Unit ns ns ns ns µs µs µs µs 6.5 A/µs 18 nC SOURCE DRAIN DIODE Symbol VSD (*) trr Qrr IRRM Parameter Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Test Conditions ISD=3.5A; VIN=0V ISD=3.5A; dI/dt=20A/µs Min VDD=30V; L=200µH Reverse Recovery Current (see test circuit, figure 2) Typ 0.8 220 0.28 Max 2.5 Unit V ns µC A PROTECTIONS (-40°C < Tj < 150°C, unless otherwise specified) Symbol Ilim tdlim Tjsh Tjrs Igf Eas Parameter Drain Current Limit Step Response Current Limit Test Conditions VIN=5V; VDS=13V VIN=5V; VDS=13V Overtemperature Shutdown Overtemperature Reset Fault Sink Current Single Pulse Avalanche Energy 2 Typ 9 175 135 VIN= 5V; VDS=13V; Tj=Tjsh starting Tj=25°C; VDD=24V VIN=5V; Rgen=RIN MIN=150Ω; L=24mH (see figures 3 & 4) Max 12 15 200 Unit A µs 4.0 150 (*) Pulsed: Pulse duration = 300µs, duty cycle 1.5% 4/29 Min 6 200 °C °C mA mJ VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 PROTECTION FEATURES During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50KHz. The only difference from the user’s standpoint is that a small DC current IISS (typ. 100µA) flows into the INPUT pin in order to supply the internal circuitry. The device integrates: - OVERVOLTAGE CLAMP PROTECTION: internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. - LINEAR CURRENT LIMITER CIRCUIT: limits the drain current ID to Ilim whatever the INPUT pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. - OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cut-out occurs in the range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature falls of about 15°C below shut-down temperature. - STATUS FEEDBACK: in the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not able to supply the current Igf, the INPUT pin will fall to 0V. This will not however affect the device operation: no requirement is put on the current capability of the INPUT pin driver except to be able to supply the normal operation drive current IISS. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit. 5/29 1 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 Figure 1: Switching Time Test Circuit for Resistive Load VD Rgen Vgen ID 90% tr tf 10% t Vgen td(on) td(off) t Figure 2: Test Circuit for Diode Recovery Times A A D I FAST DIODE OMNIFET S L=100uH B B 150Ω D Rgen Vgen VDD I OMNIFET S 8.5 Ω 6/29 1 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 Figure 3: Unclamped Inductive Load Test Circuits Figure 4: Unclamped Inductive Waveforms RGEN VIN PW Figure 5: Input Charge Test Circuit VIN 7/29 1 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 Source-Drain Diode Forward Characteristics Static Drain Source On Resistance Vsd (mV) Rds(on) (mOhm) 1000 500 Tj= - 40ºC 950 450 Vin=0V Vin=2.5V 900 400 850 350 800 300 750 250 700 200 650 150 600 100 550 50 500 Tj=25ºC Tj=150ºC 0 0 2 4 6 8 10 12 14 0 0.25 0.5 Id(A) 0.75 1 1.25 Id(A) Static Drain-Source On resistance Vs. Input Voltage Derating Curve Rds(on) (mOhm) 120 110 Id=3.5A 100 90 Tj=150ºC 80 70 60 50 Tj=25ºC 40 30 Tj= - 40ºC 20 10 0 3 3.5 4 4.5 5 5.5 6 6.5 7 Vin(V) Static Drain-Source On resistance Vs. Input Voltage Transconductance Rds(on) (mOhm) Gfs (S) 140 20 18 120 Vds=13V Tj=150ºC 16 100 Tj=-40ºC Tj=25ºC 14 Id=6A Id=1A 80 Tj=150ºC 12 10 60 40 Tj=25ºC 8 Tj=-40ºC 20 Id=6A Id=1A 6 Id=6A Id=1A 4 2 0 0 3 3.5 4 4.5 Vin(V) 5 5.5 6 6.5 0 1 2 3 4 5 6 7 8 Id(A) 8/29 1 1 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 Static Drain-Source On Resistance Vs. Id Transfer Characteristics Rds(on) (mOhm) Idon(A) 140 10 Tj=25ºC 9 120 Tj=-40ºC Tj=150ºC Vds=13.5V 8 Vin=3.5V 100 7 Tj=150ºC Vin=5V 6 80 5 60 Vin=3.5V 4 Tj=25ºC Vin=5V Vin=3.5V 40 3 Tj=-40ºC 2 Vin=5V 20 1 0 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 1 1.5 2 2.5 3 Id(A) 3.5 4 4.5 5 5.5 Vin(V) Turn On Current Slope Turn On Current Slope di/dt(A/us) di/dt(A/us) 8 2.25 2 7 Vin=5V Vdd=15V Id=3.5A 6 Vin=3.5V Vdd=15V Id=3.5A 1.75 5 1.5 4 1.25 3 1 2 0.75 1 0.5 0.25 0 100 200 300 400 500 600 700 800 900 1000 1100 100 200 300 400 500 600 700 800 900 1000 1100 Rg(ohm) Rg(ohm) Turn off drain source voltage slope Input Voltage Vs. Input Charge dv/dt(V/us) Vin(V) 300 8 250 7 Vds=12V Id=3.5A 6 Vin=5V Vdd=15V Id=3.5A 200 5 150 4 100 3 2 50 1 0 100 0 0 5 10 15 Qg(nC) 20 25 200 300 400 500 600 700 800 900 1000 1100 Rg(ohm) 9/29 1 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 Turn Off Drain-Source Voltage Slope Capacitance Variations C(pF) dv/dt(v/us) 600 300 250 500 f=1MHz Vin=0V Vin=3.5V Vdd=15V Id=3.5A 200 400 150 300 100 200 50 0 200 100 400 300 500 600 700 800 900 1000 1100 100 0 5 10 15 20 25 30 35 Vds(V) Rg(ohm) Switching Time Resistive Load Switching Time Resistive Load t(us) t(ns) 5.5 1600 tr 5 Vdd=15V Id=3.5A Vin=5V 4.5 4 1400 tr Vdd=15V Id=3.5A Rg=150ohm td(off) 1200 tf 3.5 1000 3 800 2.5 2 600 1.5 td(off) 400 1 tf td(on) 0.5 200 0 td(on) 250 0 500 750 1000 1250 1500 1750 2000 2250 2500 0 3.25 3.5 3.75 4 Rg(ohm) 4.25 4.5 4.75 5 5.25 Vin(V) Normalized On Resistance Vs. Temperature Output Characteristics ID(A) Rds(on) 12 2.25 11 2 10 9 Vin=5V Vin=4.5V 8 Vin=4V Vin=5V Id=3.5A 1.75 7 1.5 Vin=3V 6 1.25 5 4 1 3 Vin=2.5V 2 0.75 1 Vin=2V 0.5 0 0 1 2 3 4 5 6 7 VDS(V) 8 9 10 11 12 13 -50 -25 0 25 50 75 100 125 150 175 T(ºC) 10/29 1 1 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 Normalized Input Temperature Threshold Voltage Vs. Current Limit Vs. Junction Temperature Vin(th) Ilim (A) 1.15 15 14 1.1 Vds=Vin Id=1mA 1.05 Vds=13V Vin=5V 13 12 1 11 0.95 10 0.9 9 0.85 8 0.8 7 0.75 6 5 0.7 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tj (ºC) T(ºC) Step Response Current Limit Tdlim(us) 7 6.5 Vin=5V Rg=150ohm 6 5.5 5 4.5 4 3.5 5 10 15 20 25 30 35 Vdd(V) 11/29 1 1 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 SO-8 Maximum turn off current versus load inductance ILMAX (A) 100 10 A B C 1 0.01 0.1 1 L(mH) 10 100 A = Single Pulse at TJstart=150ºC B= Repetitive pulse at TJstart=100ºC C= Repetitive Pulse at TJstart=125ºC Conditions: VCC=13.5V Values are generated with RL=0Ω In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization t 12/29 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 DPAK Maximum turn off current versus load inductance ILMAX (A) 100 10 A B C 1 0.01 0.1 1 L(mH) 10 100 A = Single Pulse at TJstart=150ºC B= Repetitive pulse at TJstart=100ºC C= Repetitive Pulse at TJstart=125ºC Conditions: VCC=13.5V Values are generated with RL=0Ω In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization t 13/29 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 SOT-223 Maximum turn off current versus load inductance ILMAX (A) 100 10 A B C 1 0.01 0.1 1 10 L(mH) A = Single Pulse at TJstart=150ºC B= Repetitive pulse at TJstart=100ºC C= Repetitive Pulse at TJstart=125ºC Conditions: VCC=13.5V Values are generated with RL=0Ω In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization t 14/29 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 SO-8 THERMAL DATA SO-8 PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35µm, Copper areas: 0.14cm2, 0.6cm2, 1.6cm2). Rthj-amb Vs PCB copper area in open box free air condition SO-8 at 4 pins connected to TAB RTHj_amb (ºC/W) 110 105 100 95 90 85 80 75 70 0 0.5 1 1.5 2 2.5 PCB CU heatsink area (cm^2) 15/29 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 SOT-223 THERMAL DATA SOT-223 PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35µm, Copper areas: 0.11cm2, 1cm2, 2cm2). Rthj-amb Vs PCB copper area in open box free air condition RTH j-amb (°C/W) 140 130 120 110 100 90 80 70 60 0 0.5 1 1.5 Cu area (cm^2) 16/29 2 2.5 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 DPAK THERMAL DATA DPAK PC Board Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2mm, Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8cm2). Rthj-amb Vs PCB copper area in open box free air condition RTH j_amb (ºC/W) 90 80 70 60 50 40 30 0 2 4 6 8 10 PCB CU heatsink area (cm^2) 17/29 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 DPAK Thermal Impedance Junction Ambient Single Pulse ZT H (°C/W) 1000 100 Footprint 6 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 Time (s) Thermal fitting model of an OMNIFET II in DPAK 10 100 1000 Pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = tp ⁄ T Thermal Parameter Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb 18/29 Area/island (cm2) R1 (°C/W) R2 (°C/W) R3 ( °C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1 (W.s/°C) C2 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) Footprint 0.1 0.35 1.20 2 15 61 0.0006 0.0021 0.05 0.3 0.45 0.8 6 24 5 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 SO-8 Thermal Impedance Junction Ambient Single Pulse ZT H (°C/W) 1000 Footprint 100 2 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 T ime (s) Thermal fitting model of an OMNIFET II in SO-8 10 100 1000 Pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = tp ⁄ T Thermal Parameter Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb Area/island (cm2) R1 (°C/W) R2 (°C/W) R3 ( °C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1 (W.s/°C) C2 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) Footprint 0.2 0.9 3.5 21 16 58 3.00E-04 9.00E-04 7.50E-03 0.045 0.35 1.05 2 28 2 19/29 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 SOT-223 Thermal Impedance Junction Ambient Single Pulse ZT H (°C /W) 1000 Footprint 100 2 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 T ime (s) Thermal fitting model of an OMNIFET II in SOT-223 10 100 1000 Pulse calculation formula Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = tp ⁄ T Thermal Parameter Tj C1 C2 C3 C4 C5 C6 R1 R2 R3 R4 R5 R6 Pd T_amb 20/29 Area/island (cm2) R1 (°C/W) R2 (°C/W) R3 ( °C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1 (W.s/°C) C2 (W.s/°C) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) Footprint 0.2 1.1 4.5 24 0.1 100 3.00E-04 9.00E-04 3.00E-02 0.16 1000 0.5 2 45 2 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 TO-251 (IPAK) MECHANICAL DATA mm. DIM. MIN. inch TYP MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 B3 0.212 0.85 B5 0.033 0.3 0.012 B6 0.95 0.037 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 0.047 L2 0.8 1 0.031 0.039 A1 C2 A3 A C H B B6 = 1 = 2 G = = = E B2 = 3 B5 L D B3 L2 L1 21/29 11 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 TO-252 (DPAK) MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.9 0.025 0.035 B2 5.2 5.4 0.204 0.212 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 9.35 10.1 0.368 0.397 L2 L4 0.8 1 0.023 0.039 0.2 0° 0.008 8° 0° 8° H L4 = = = = G E B2 = = = 0.60 MIN. FLAT ZONE = B L2 A2 V2 A1 C2 A C R D V2 0.031 0.6 R 22/29 MAX. VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 SOT-223 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.8 0.071 B 0.6 0.7 0.85 0.024 0.027 0.033 B1 2.9 3 3.15 0.114 0.118 0.124 c 0.24 0.26 0.35 0.009 0.01 0.014 D 6.3 6.5 6.7 0.248 0.256 0.264 e 2.3 0.09 e1 4.6 0.181 E 3.3 3.5 3.7 0.13 0.138 0.146 H 6.7 7 7.3 0.264 0.276 0.287 V A1 10 (max) 0.02 0.1 0.0008 0.004 0046067 23/29 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 SO-8 MECHANICAL DATA mm. inch DIM. MIN. TYP A a1 MAX. MIN. TYP. 1.75 0.1 0.068 0.25 a2 MAX. 0.003 0.009 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 c1 45 (typ.) D 4.8 5.0 0.188 0.196 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 F 3.8 4.0 0.14 0.157 L 0.4 1.27 0.015 0.050 M F 0.6 0.023 8 (max.) 24/29 1 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 SOT-223 TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 12.4 60 18.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 All dimensions are in mm. End Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed 25/29 1 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 SO-8 TUBE SHIPMENT (no suffix) B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) C A 100 2000 532 3.2 6 0.6 All dimensions are in mm. TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 12 4 8 1.5 1.5 5.5 4.5 2 End Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed 26/29 1 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 DPAK FOOTPRINT TUBE SHIPMENT (no suffix) A 6 .7 1 .8 3 .0 1 .6 C 2 .3 6 .7 2 .3 B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) 75 3000 532 6 21.3 0.6 All dimensions are in mm. TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 16.4 60 22.4 TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 16 4 8 1.5 1.5 7.5 6.5 2 End Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed 27/29 1 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 IPAK TUBE SHIPMENT (no suffix) A C B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) 75 3000 532 6 21.3 0.6 All dimensions are in mm. 28/29 1 VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2003 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 29/29