CIMD6A SURFACE MOUNT DUAL COMPLEMENTARY SILICON DIGITAL TRANSISTORS 50V, 100mA w w w. c e n t r a l s e m i . c o m DESCRIPTION: The CENTRAL SEMICONDUCTOR CIMD6A is a Dual Complementary Digital Transistor in a SUPERmini™ SOT-26R surface mount package, designed for switching applications, interface circuit and driver circuit applications. MARKING CODE: CD6 SOT-26R CASE MAXIMUM RATINGS PER TRANSISTOR: (TA=25°C) Collector-Emitter Voltage Collector-Base Voltage Emitter-Base Voltage Continuous Collector Current Power Dissipation Operating and Storage Junction Temperature Thermal Resistance SYMBOL VEBO IC PD TJ, Tstg ΘJA ELECTRICAL CHARACTERISTICS PER TRANSISTOR: (TA=25°C) SYMBOL TEST CONDITIONS MIN ICBO UNITS VCEO VCBO 50 V 50 V 5.0 V 100 mA 350 mW -55 to +150 °C 357 °C/W TYP MAX UNITS IEBO VCB=50V VEB=4.0V 500 nA 500 nA BVCBO IC=50μA 50 V BVCEO IC=1.0mA 50 V BVEBO IE=50μA 5.0 VCE(SAT) hFE IC=5.0mA, IB=250μA VCE=5.0V, IC=1.0mA * fT R1=R2 VCE=10V, IC=5.0mA, f=100MHz - V 0.3 100 250 3.3 V 600 4.7 MHz 6.1 KΩ * Characteristic of transistor only R3 (4-January 2010) CIMD6A SURFACE MOUNT DUAL COMPLEMENTARY SILICON DIGITAL TRANSISTORS 50V, 100mA SOT-26R CASE - MECHANICAL OUTLINE with Reverse Pin Configuration Note: The R suffix added to case type indicates reverse pin configuration as compared with a standard SOT-26 case. All other package specifications are equivalent to SOT-26 package. Please refer to SOT-26 Package Details datasheet for Mounting Pad Geometry, Tape Dimensions & Orientation, Packaging Base, Reel Labeling & Packing Information, and Ordering information. LEAD CODE: 1) COLLECTOR Q1 2) BASE Q2 3) EMITTER Q2 4) COLLECTOR Q2 5) BASE Q1 6) EMITTER Q1 MARKING CODE: CD6 R3 (4-January 2010) w w w. c e n t r a l s e m i . c o m