FDD6630A 30V N-Channel PowerTrench MOSFET General Description Features This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low RDS( ON) and fast switching speed. • 21 A, 30 V RDS(ON) = 35 mΩ @ V GS = 10 V RDS(ON) = 50 mΩ @ V GS = 4.5 V • Low gate charge (5nC typical) • Fast switching Applications • High performance trench technology for extremely low RDS(ON) • DC/DC converter • Motor drives . D D G G S TO-252 S Absolute Maximum Ratings Symbol TA=25oC unless otherwise noted Parameter V DSS Drain-Source Voltage V GSS Gate-Source Voltage ID Drain Current PD V ±20 V 21 A (Note 1a) 100 Power Dissipation (Note 1) 28 (Note 1a) 3.2 (Note 1b) TJ , TSTG Units 30 (Note 3) – Continuous – Pulsed Ratings Operating and Storage Junction Temperature Range W 1.3 –55 to +175 °C Thermal Characteristics RθJ C Thermal Resistance, Junction-to-Case (Note 1) 4.5 °C/W RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 40 °C/W RθJA Thermal Resistance, Junction-to-Ambient (Note 1b) 96 °C/W Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDD6630A FDD6630A 13’’ 16mm 2500 units 2011 Fairchild Semiconductor Corporation FDD6630A Rev D1 FDD6630A November 2011 Symbol TA = 25°C unless otherwise noted Parameter Drain-Source Avalanche Ratings Test Conditions Min Typ Max Units (Note 2) WDSS Drain-Source Avalanche Energy IAR Drain-Source Avalanche Current Single Pulse, V DD = 15 V 55 mJ 7.6 A Off Characteristics BV DSS ∆BV DSS ∆TJ IDSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient V GS = 0 V, ID = 250 µA Zero Gate Voltage Drain Current IGSSF Gate–Body Leakage, Forward V DS = 24 V, V GS = 20 V, V GS = 0 V V DS = 0 V 1 100 µA nA IGSSR Gate–Body Leakage, Reverse V GS = –20 V, V DS = 0 V –100 nA 1.7 –4 3 V mV/°C 28 40 44 35 50 58 mΩ On Characteristics 30 ID = 250 µA, Referenced to 25°C V 23 mV/°C (Note 2) V DS = V GS , ID = 250 µA ID = 250 µA, Referenced to 25°C V GS(th) ∆V GS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance ID(on) On–State Drain Current V GS V GS V GS V GS gFS Forward Transconductance V DS = 5 V, ID = 7.6 A 13 S V DS = 15 V, f = 1.0 MHz V GS = 0 V, 462 pF 113 pF 40 pF = 10 V, ID = 7.6 A = 4.5 V, ID = 6.3 A = 10 V, ID = 7.6 A, TJ = 125°C = 10 V, V DS = 5 V 1 20 A Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) tf (Note 2) V DD = 15 V, V GS = 10 V, ID = 1 A, RGEN = 6 Ω 5 11 ns 8 17 ns Turn–Off Delay Time 17 28 ns Turn–Off Fall Time 13 24 ns 5 7 nC Qg Total Gate Charge Qgs Gate–Source Charge Qgd Gate–Drain Charge V DS = 15 V, V GS = 5 V ID = 7.6 A, 2 nC 1.4 nC Drain–Source Diode Characteristics and Maximum Ratings IS V SD Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward V GS = 0 V, IS = 2.7 A Voltage 0.8 (Note 2) 2.7 1.2 A V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) RθJA = 40°C/W when mounted on a 1in2 pad of 2 oz copper b) RθJA = 96°C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 3. Maximum current is calculated as: PD RDS ( ON ) where PD is maximum power dissipation at TC = 25°C and RDS(on) is at TJ(max) and VGS = 10V. Package current limitation is 21A FDD6630A Rev. D1 FDD6630A Electrical Characteristics FDD6630A Typical Characteristics 3 40 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE V GS = 10V ID, DRAIN CURRENT (A) 6.0V 5.0V 30 4.5V 4.0V 20 3.5V 10 3.0V V GS = 3.0V 2.5 3.5V 2 4.0V 4.5V 1.5 5.0V 6.0V 10V 1 0.5 0 0 1 2 3 4 0 5 5 10 Figure 1. On-Region Characteristics. 20 25 30 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.8 0.18 ID = 3.8 A I D = 7.6A V GS = 10V 1.6 R DS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 15 ID , DRAIN CURRENT (A) V DS , DRAIN-SOURCE VOLTAGE (V) 1.4 1.2 1 0.8 0.15 0.12 T A = 125o C 0.09 0.06 T A = 25o C 0.03 0.6 -50 -25 0 25 50 75 100 125 150 0 175 2.5 T J, JUNCTION TEMPERATURE ( oC) Figure 3. On-Resistance Variation with Temperature. 3.5 4 4.5 V GS, GATE TO SOURCE VOLTAGE (V) 5 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 25 IS , REVERSE DRAIN CURRENT (A) T A = -55oC V DS = 5V 25oC 20 ID, DRAIN CURRENT (A) 3 125o C 15 10 5 V GS = 0V 10 TA = 125o C 1 25oC 0.1 -55o C 0.01 0.001 0 1 2 3 4 V GS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 5 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VSD , BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDD6630A Rev. D1 FDD6630A Typical Characteristics 10 700 V DS = 5V 10V 8 f = 1MHz V GS = 0 V 600 15V CISS CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) ID = 7.6A 6 4 500 400 300 200 COSS 2 100 CRSS 0 0 0 2 4 6 8 10 0 5 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 15 20 25 30 Figure 8. Capacitance Characteristics. 40 P(pk), PEAK TRANSIENT POWER (W) 1000 100µµs 100 ID, DRAIN CURRENT (A) 10 V DS, DRAIN TO SOURCE VOLTAGE (V) RDS(ON) LIMIT 1ms 10ms 100ms 10 1s 10s 1 DC V GS = 10V SINGLE PULSE R θJA = 96o C/W 0.1 TA = 25 oC 0.01 SINGLE PULSE RθJA = 96°C/W T A = 25°C 30 20 10 0 0.1 1 10 100 0.1 1 V DS, DRAIN-SOURCE VOLTAGE (V) 10 100 1000 t1 , TIME (sec) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 RθJA(t) = r(t) x RθJA R θJA = 96 °C/W 0.2 0.1 0.1 0.05 P(pk) 0.02 t1 0.01 t2 0.01 TJ - TA = P x RθJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1 , TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDD6630A Rev. D1 TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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