FREESCALE MCM63D736TQ100

Freescale Semiconductor
Order this document
by MCM63D736/D
MCM63D736
Freescale Semiconductor, Inc...
128K x 36 Bit Synchronous
Dual I/O, Dual Address SRAM
The MCM63D736 is a 4M–bit static random access memory, organized as
128K words of 36 bits. It features common data input and data output buffers and
incorporates input and output registers on–board with high speed SRAM.
The MCM63D736 allows the user to concurrently perform reads, writes, or
pass–through cycles in combination on the two data ports. The two address ports
(AX, AY) determine the read or write locations for their respective data ports
(DQX, DQY).
The synchronous design allows for precise cycle control with the use of an
external single clock (K). All signal pins except output enables (GX, GY) are
registered on the rising edge of clock (K).
The pass–through feature allows data to be passed from one port to the other,
in either direction. The PTX input must be asserted to pass data from port X to
port Y. The PTY will likewise pass data from port Y to port X. A pass–through
operation takes precedence over a read operation.
For the case when AX and AY are the same, certain protocols are followed. If
both ports are read, the reads occur normally. If one port is written and the other
is read, the read from the array will occur before the data is written. If both ports
are written, only the data on DQY will be written to the array.
•
•
•
•
•
•
•
•
•
•
•
•
TQ PACKAGE
176 LEAD TQFP
CASE 1101–01
Single 3.3 V ±5% Power Supply
133 MHz Maximum Clock Frequency
Throughput of 4.8 Gigabits/Second
Single Clock Operation
Self–Timed Write
Two Bi–Directional Data Buses
Can be Configured as Separate I/O
Pass–Through Feature
Asynchronous Output Enables (GX, GY)
LVTTL Compatible I/O
Concurrent Reads and Writes
176–Pin TQFP Package
Suggested Applications
— ATM
— Cell/Frame Buffers
— Ethernet Switches
— SNA Switches
— Routers
— Shared Memory
— Cellular Base Stations
— RAID Systems
© Freescale Semiconductor, Inc., 2004. All rights reserved.
REV 4
7/6/00
For More Information On This Product,
Go to: www.freescale.com
MCM63D736
1
Freescale Semiconductor, Inc.
BLOCK DIAGRAM
Freescale Semiconductor, Inc...
AX
17
ADDRESS
REGISTER
WX
WRITE X
REGISTER
PTX
PTX
REGISTER
WRITE
DRIVER
SENSE
AMPS
SENSE
AMPS
WRITE
DRIVER
PASS–THROUGH
DATA IN
REGISTER
K
ADDRESS
REGISTER
128K x 36 ARRAY
OUTPUT
REGISTER
OUTPUT
REGISTER
ENABLE X
REG 2
WRITE Y
REGISTER
WY
PTY
REGISTER
PTY
ENABLE Y
REG 1
DQX
DQY
GX
MCM63D736
2
AY
DATA IN
REGISTER
ENABLE X
REG 1
E1X
E2X
17
E1Y
E2Y
ENABLE Y
REG 2
GY
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
VSS
DQX20
DQY20
VDD
VSS
DQX21
DQY21
DQX22
DQY22
VDD
VSS
DQX23
DQY23
DQX24
DQY24
VDD
VSS
DQX25
DQY25
DQX26
DQY26
VDD
VSS
DQY27
DQX27
DQY28
DQX28
VDD
VSS
DQY29
DQX29
DQY30
DQX30
VDD
VSS
DQY31
DQX31
DQY32
DQX32
VDD
VSS
DQY33
DQX33
VSS
132
1
2
131
130
3
129
4
128
5
127
6
126
7
125
8
124
9
123
10
122
11
121
12
120
13
119
14
118
15
16
117
116
17
115
18
114
19
113
20
112
21
111
22
110
23
109
24
108
25
107
26
106
27
105
28
104
29
103
30
102
31
101
32
100
33
99
34
98
35
97
36
96
37
38
95
94
39
93
40
92
41
91
42
90
43
89
44
45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88
VSS
DQX15
DQY15
VSS
VDD
DQX14
DQY14
DQX13
DQY13
VSS
VDD
DQX12
DQY12
DQX11
DQY11
VSS
VDD
DQX10
DQY10
DQX9
DQY9
VSS
VDD
DQY8
DQX8
DQY7
DQX7
VSS
VDD
DQY6
DQX6
DQY5
DQX5
VSS
VDD
DQY4
DQX4
DQY3
DQX3
VSS
VDD
DQY2
DQX2
VSS
VSS
DQY34
DQX34
VSS
VDD
DQY35
DQX35
VSS
VSS
AY5
AX5
AY4
AX4
AY3
AX3
AY2
AX2
AY1
AX1
AY0
AX0
VSS
VDD
AX10
AY10
AX11
AY11
AX12
AY12
AX13
AY13
AX14
AY14
AX15
AY15
AX16
AY16
DQX0
DQY0
VDD
V SS
DQX1
DQY1
VSS
Freescale Semiconductor, Inc...
VSS
DQY19
DQX19
VSS
VDD
DQY18
DQX18
AX6
AY6
AX7
AY7
VSS
NC
NC
NC
VSS
NC
NC
E2Y
E1Y
K
VDD
VSS
GY
GX
E2X
E1X
WY
WX
PTY
PTX
AX8
AY8
AX9
AY9
VSS
VSS
DQX17
DQY17
VDD
VSS
DQX16
DQY16
VSS
PIN ASSIGNMENT
For More Information On This Product,
Go to: www.freescale.com
MCM63D736
3
Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc...
PIN DESCRIPTIONS
Pin Locations
Symbol
Type
Description
65, 63, 61, 59, 57, 55, 169, 167, 145,
143, 68, 70, 72, 74, 76, 78, 80
AX0 –
AX16
Input
Address Port X: Never allow floating addresses for inputs AX0 – AX16.
A pullup resistor is needed.
64, 62, 60, 58, 56, 54, 168, 166, 144,
142, 69, 71, 73, 75, 77, 79, 81
AY0 –
AY16
Input
Address Port Y: Never allow floating addresses for inputs AY0 – AY16.
A pullup resistor is needed.
82, 86, 90, 94, 96, 100, 102, 106, 108,
113. 115, 119, 121, 125, 127, 131, 135,
139, 170, 174, 2, 6, 8, 12, 14, 18, 20, 25,
27, 31, 33, 37, 39, 43, 47, 51
DQX0 –
DQX35
I/O
Data Input/Output Port X.
83, 87, 91, 95, 97, 101, 103, 107, 109,
112, 114, 118, 120, 124, 126, 130, 134,
138, 171, 175, 3, 7, 9, 13, 15, 19, 21, 24,
26, 30, 32, 36, 38, 42, 46, 50
DQY0 –
DQY35
I/O
Data Input/Output Port Y.
150
E1X
Input
Synchronous Chip Enable Port X: Active low.
151
E2X
Input
Synchronous Chip Enable Port X: Active high.
157
E1Y
Input
Synchronous Chip Enable Port Y: Active low.
158
E2Y
Input
Synchronous Chip Enable Port Y: Active high.
152
GX
Input
Asynchronous Output Enable Port X Input:
Low — enables output buffers (DQXx pins).
High — DQXx pins are high impedance.
153
GY
Input
Asynchronous Output Enable Port Y Input:
Low — enables output buffers (DQYx pins).
High — DQYx pins are high impedance.
156
K
Input
Clock: This signal registers the address, data in, and all control signals
except G.
146
PTX
Input
Pass–Through Port X.
147
PTY
Input
Pass–Through Port Y.
148
WX
Input
Synchronous Write Enable Port X.
149
WY
Input
Synchronous Write Enable Port Y.
4, 10, 16, 22, 28, 34, 40, 49, 67, 84,
92, 98, 104, 110, 116, 122, 128, 137,
155, 172
VDD
Supply
3.3 V Power Supply.
1, 5, 11, 17, 23, 29, 35, 41, 44, 45, 48,
52, 53, 66, 85, 88, 89, 93, 99, 105, 111,
117, 123, 129, 132, 133, 136, 140, 141,
154, 161, 165, 173, 176
VSS
Supply
Ground.
159, 159, 160, 162, 163, 164
NC
—
MCM63D736
4
No Connection: There is no connection to the chip.
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc...
TRUTH TABLE (See Notes 1 through 6)
Input at tn Clock
Operation
No.
E1X
E2X
E1Y
E2Y
WX
WY
PTX
PTY
Operation
1
H
X
H
X
X
X
X
X
Deselected
2
X
L
X
L
X
X
X
X
Deselected
3
L
H
X
X
L
X
X
X
Write X Port
4
X
X
L
H
X
L
X
X
Write Y Port
5
L
H
L
H
X
X
L
X
Pass–Through X to Y
6
L
H
L
H
X
X
X
L
Pass–Through Y to X
7
L
H
X
X
H
X
H
H
Read X
8
X
X
L
H
X
H
H
H
Read Y
NOTES:
1. L = Logic Low; H = Logic High; X = Don’t Care.
2. GX/GY must be negated during write and pass–through cycles.
3. Operation numbers 3 – 6 can be used in any combination.
4. Operation numbers 4 and 7, 3 and 8, 7 and 8 can be combined.
5. Operation number 5 can not be combined with operation number 7 or 8 because pass–through takes precedence over a read operation.
6. Operation number 6 can not be combined with operation number 7 or 8 because pass–through takes precedence over a read operation.
tn
tn + 1
K
ADDRESS & CONTROL
VALID
PIPELINED READ ACCESS
DATA INPUT D
DATA OUTPUT Q
VALID
PASS–THROUGH
VALID
ABSOLUTE MAXIMUM RATINGS (See Notes)
Rating
Symbol
Value
Unit
VDD
–0.5 to 4.6
V
Vin, Vout
–0.5 to VDD + 0.5
V
Output Current
Iout
±20
mA
Package Power Dissipation
PD
1.6
W
Tbias
–10 to 85
°C
Tstg
–55 to 125
°C
Power Supply Voltage
Voltage Relative to VSS for Any Pin
Except VDD
Temperature Under Bias
Storage Temperature — Plastic
NOTES:
1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED
OPERATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.
2. Power dissipation capability is dependent upon package characteristics and use
environment. See Package Thermal Characteristics.
This is a synchronous device. All synchronous inputs must meet specified setup and
hold times with stable logic levels for ALL
rising edges of clock (K) while the device is
selected.
This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to these high–impedance
circuits.
For More Information On This Product,
Go to: www.freescale.com
MCM63D736
5
Freescale Semiconductor, Inc.
PACKAGE THERMAL CHARACTERISTICS (See Note 1)
Rating
Symbol
TQFP
Unit
Notes
RθJA
35
30
°C/W
2
Junction to Board (Bottom)
RθJB
23
°C/W
3
Junction to Case (Top)
RθJC
9
°C/W
4
Junction to Ambient (@ 200 lfm)
Single–Layer Board
Four–Layer Board
NOTES:
1. Junction temperature is a function of on–chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient
temperature, air flow, board population, and board thermal resistance.
2. Per SEMI G38–87.
3. Indicates the average thermal resistance between the die and the printed circuit board.
4. Indicates the average thermal resistance between the die and the case top surface via the cold plate method (MIL SPEC–883 Method 1012.1).
DC OPERATING CONDITIONS AND CHARACTERISTICS
Freescale Semiconductor, Inc...
(VDD = 3.3 V ±5%, TA = 0° to 70°C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS AND SUPPLY CURRENTS
Parameter
Symbol
Min
Max
Unit
Supply Voltage (Operating Voltage Range)
VDD
3.135
3.465
V
Input High Voltage
VIH
2.0
VDD + 0.5**
V
Input Low Voltage
VIL
–0.5*
0.8
V
Ilkg(I)
—
±1.0
µA
Input Leakage Current (All Inputs, Vin = 0 to VDD)
Ilkg(O)
—
±1.0
µA
IDDA–133
IDDA–100
IDDA–83
—
400
350
325
mA
CMOS Standby Supply Current (Deselected, Clock (K)
Cycle Time ≥ tKHKH, All Inputs Toggling at CMOS Levels
Vin ≤ VSS + 0.2 V or ≥ VDD – 0.2 V)
ISB1
—
100
mA
Output Low Voltage (IOL = 8.0 mA)
VOL
—
0.4
V
Output High Voltage (IOH = –4.0 mA)
VOH
2.4
VDD
V
Symbol
Max
Unit
Address and Data Input Capacitance
Cin
6
pF
Control Pin Input Capacitance
Cin
6
pF
Cout
8
pF
Output Leakage Current (E = VIH, Vout = 0 to VDD)
AC Supply Current (Iout = 0 mA) (VDD = Max, f = fmax)
* VIL ≥ –1.5 V for t ≤ tKHKH/2.
** VIH ≤ VDD + 1.0 V (not to exceed 4.6 V) for t ≤ tKHKH/2.
CAPACITANCE (f = 1.0 MHz, TA = 0° to 70°C, Periodically Sampled Rather Than 100% Tested)
Parameter
Output Capacitance
MCM63D736
6
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
AC OPERATING CONDITIONS AND CHARACTERISTICS
(VDD = 3.3 V ±5%, TA = 0° to 70°C, Unless Otherwise Noted)
Input Timing Measurement Reference Level . . . . . . . . . . . . . . . 1.5 V
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 3.0 V
Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . 1 V/ns (20% to 80%)
Output Timing Reference Level . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 V
Output Load . . . . . . . . . . . . . . . . . . Figure 1 Unless Otherwise Noted
READ/WRITE CYCLE TIMING (See Notes 1, 2, and 3)
MCM63D736–133
Parameter
MCM63D736–83
Symbol
Min
Max
Min
Max
Min
Max
Unit
Notes
Cycle Time
tKHKH
7.5
—
10
—
12
—
ns
1
Clock Access Time
tKHQV
—
4
—
5
—
6
ns
Clock Low Pulse Width
tKLKH
3
—
4
—
4
—
ns
Clock High Pulse Width
Freescale Semiconductor, Inc...
MCM63D736–100
tKHKL
3
—
4
—
4
—
ns
Clock High to Data Output Active
tKHQX1
0
—
0
—
0
—
ns
Clock High to Data Output Invalid
tKHQX2
1
—
1
—
1
—
ns
Clock High to Data Output High–Z
tKHQZ
—
3
—
3
—
4
ns
Output Enable Low to Data Output
Valid
tGLQV
—
4
—
5
—
6
ns
Output Enable Low to Data Output
Low–Z
tGLQX
0
—
0
—
0
—
ns
Output Enable High to Data Output
High–Z
tGHQZ
—
3
—
3
—
5
ns
2
Setup Times:
AWR0 – AWR16
ARD0 – ARD16
W
PT
E1X, E2X, E1Y, E2Y
D0 – D35
tAVKH
tAVKH
tWVKH
tPTVKH
tEVKH
tDVKH
1.5
—
1.5
—
2.5
—
ns
3
Hold Times:
AWR0 – AWR16
ARD0 – ARD16
W
PT
E1X, E2X, E1Y, E2Y
D0 – D35
tKHAX
tKHAX
tKHWX
tKHPTX
tKHEX
tKHDX
0.5
—
0.5
—
0.5
—
ns
3
2
NOTES:
1. All read and write cycles are referenced from K.
2. This parameter is sampled and not 100% tested.
3. This is a synchronous device. All synchronous inputs must meet the specified setup and hold times with stable logic levels for ALL rising
edges of clock (K) while the device is selected.
RL = 50 Ω
OUTPUT
Z0 = 50 Ω
VL = 1.5 V
Figure 1. AC Test Load
For More Information On This Product,
Go to: www.freescale.com
MCM63D736
7
Freescale Semiconductor, Inc.
READ CYCLE TIMING FROM BOTH PORTS (WX, WY, PTX, PTY HIGH)
tKHKH
tKLKH
tKHKL
K
tAVKH
AX
PORT X
1
tKHAX
2
3
4
5
6
8
9
GX
tKHQV
tGLQV
tGHQZ
tKHQX1
Freescale Semiconductor, Inc...
7
Q(1)
DQX
Q(2)
Q(3)
Q(5)
Q(6)
Q(7)
tGLQX
tEVKH
Ex
tKHEX
AY
PORT Y
12
13
14
15
16
6
7
19
20
Q(16)
Q(6)
Q(7)
GY
tKHQZ
DQY
Q(12)
Q(13)
Q(14)
tKHQV
NOTE: Ex Low = E1x Low and E2x High. Ex High = E1x High or E2x Low.
MCM63D736
8
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
WRITE CYCLE TIMING TO BOTH PORTS (PTX, PTY HIGH)
tKHKH
tKLKH
tKHKL
K
AX
1
2
3
4
5
6
7
8
9
D(8)
D(9)
19
20
tKHWX
tWVKH
WX
PORT X
Freescale Semiconductor, Inc...
GX
tDVKH
DQX
tKHDX
D(2)
D(3)
D(4)
13
14
15
5
6
18
D(14)
D(15)
D(5)
D(6)
D(18)
Ex
AY
12
WY
PORT Y
GY
DQY
D(19)
PORT Y TAKES PRECEDENCE
OVER PORT X WHEN AX = AY
AND WRITING BOTH PORTS.
NOTE: Ex Low = E1x Low and E2x High. Ex High = E1x High or E2x Low.
For More Information On This Product,
Go to: www.freescale.com
MCM63D736
9
Freescale Semiconductor, Inc.
WRITE TO PORT X AND PASS–THROUGH TO PORT Y (SEE NOTES)
tKHKH
tKLKH
tKHKL
K
AX
1
2
3
4
5
6
7
8
9
18
19
20
WX
PORT X
GX
Freescale Semiconductor, Inc...
tKHPTX
tPTVKH
PTX
tDVKH
DQX
tKHDX
D(2)
D(3)
D(X)
D(Y)
D(6)
13
14
15
16
17
Ex
AY
12
WY
PORT Y
GY
PTY
tKHQV
tKHQX2
DQY
tKHQZ
D(3)
D(X)
D(Y)
D(17)
NOTES: Ex Low = E1x Low and E2x High. Ex High = E1x High or E2x Low.
The timing diagram is valid for the opposite case as well, i.e., writing to Port Y and passing through to Port X.
MCM63D736
10
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
COMBINATION READ/WRITE WITH SAME ADDRESS ON EACH PORT
tKLKH
tKHKH
tKHKL
K
AX
TRY TO
WRITE
TRY TO
WRITE
READ
1
2
1
READ
READ
READ
READ
2
READ
3
WX
PORT X
Freescale Semiconductor, Inc...
GX
DQX
AY
D(ABC)
D(DEF)
Q(PQR)
WRITE
WRITE
READ
1
2
1
READ
READ
WRITE
2
Q(XYZ)
READ
Q(JKL)
READ
3
WY
PORT Y
GY
DQY
D(PQR)
D(XYZ)
Q(PQR)
D(JKL)
Q(JKL)
PORT Y TAKES PRECEDENCE
OVER PORT X WHEN AX = AY
AND WRITING BOTH PORTS.
NOTES: PTX = PTY = high.
D(Value) = Value is the input to the data port.
Q(Value) = Value is the output from the data port.
For More Information On This Product,
Go to: www.freescale.com
MCM63D736
11
Freescale Semiconductor, Inc.
ORDERING INFORMATION
(Order by Full Part Number)
MCM 63D736 XX XXX X
Freescale Memory Prefix
Shipping Method (Blank = Trays)
Part Number
Speed (133 = 133 MHz, 100 = 100 MHz,
83 = 83 MHz)
Package (TQ = TQFP)
MCM63D736TQ100
MCM63D736TQ83
Freescale Semiconductor, Inc...
Full Part Numbers — MCM63D736TQ133
MCM63D736
12
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS
TQFP PACKAGE
176–LEAD
CASE 1101–01
G
0.20 H L–M N
4X
P
0.20 T L–M N
4X 44 TIPS
CL
PIN 1
IDENT
CL
176
133
AB
–X–
X=L, M, N
AB
132
1
VIEW Y
3X
VIEW Y
B
Freescale Semiconductor, Inc...
CL
–L–
F
PLATING
–M–
V
U
V1
B1
ÇÇÇ
ÉÉÉÉ
ÉÉÉÉ
ÇÇÇ
ÉÉÉÉ
ÇÇÇ
BASE
METAL
J
D
44
0.08
89
45
–N–
S1
A
S
VIEW AA
C
–H–
–T–
0.05
2
W
C2
2X R R1
0.25
GAGE
PLANE
C1
K
E
Z
VIEW AA
N
S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DATUM PLANE –H– IS LOCATED AT BOTTOM OF LEAD AND IS
COINCIDENT WITH THE LEAD WHERE THE THE LEAD EXITS THE
PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE.
4. DATUMS –L–, –M–, AND –N– TO BE DETERMINED AT DATUM PLANE
–H–.
5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE –T–.
6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.
ALLOWABLE PROTRUSION IS 0.25 (0.010) PER SIDE. DIMENSIONS A
AND B DO INLCUDE MOLD MISMATCH AND ARE DETERMINED AT
DATUM PLANE –H–.
7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR
PROTRUSION SHALL NOT CAUSE THE LEAD WIDTH TO EXCEED 0.35
(0.014) MINIMUM SPACE BETWEEN PROTRUSION AND ADJACENT
LEAD 0.07 (0.003).
0.08 T
S
1
S
ROTATED 90 CLOCKWISE
A1
4X
T L–M
SECTION AB–AB
88
SEATING
PLANE
M
DIM
A
A1
B
B1
C
C1
C2
D
E
F
G
J
K
P
R1
S
S1
U
V
V1
W
Z
1
2
MILLIMETERS
MIN
MAX
24.00 BSC
12.00 BSC
24.00 BSC
12.00 BSC
–––
1.60
0.05
–––
1.35
1.45
0.17
0.23
0.45
0.75
0.17
0.27
0.50 BSC
0.09
0.20
0.50 REF
0.25 BSC
0.10
0.20
26.00 BSC
13.00 BSC
0.09
0.16
26.00 BSC
13.00 BSC
0.20 REF
1,00 REF
0
7
0
–––
12 REF
For More Information On This Product,
Go to: www.freescale.com
MCM63D736
13
Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc...
NOTES
MCM63D736
14
For More Information On This Product,
Go to: www.freescale.com
Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc...
NOTES
For More Information On This Product,
Go to: www.freescale.com
MCM63D736
15
Freescale Semiconductor, Inc.
How to Reach Us:
Home Page:
www.freescale.com
Freescale Semiconductor, Inc...
E-mail:
[email protected]
USA/Europe or Locations Not Listed:
Freescale Semiconductor
Technical Information Center, CH370
1300 N. Alma School Road
Chandler, Arizona 85224
+1-800-521-6274 or +1-480-768-2130
[email protected]
Europe, Middle East, and Africa:
Freescale Halbleiter Deutschland GmbH
Technical Information Center
Schatzbogen 7
81829 Muenchen, Germany
+44 1296 380 456 (English)
+46 8 52200080 (English)
+49 89 92103 559 (German)
+33 1 69 35 48 48 (French)
[email protected]
Japan:
Freescale Semiconductor Japan Ltd.
Headquarters
ARCO Tower 15F
1-8-1, Shimo-Meguro, Meguro-ku,
Tokyo 153-0064
Japan
0120 191014 or +81 3 5437 9125
[email protected]
Information in this document is provided solely to enable system and software
implementers to use Freescale Semiconductor products. There are no express or
implied copyright licenses granted hereunder to design or fabricate any integrated
circuits or integrated circuits based on the information in this document.
Freescale Semiconductor reserves the right to make changes without further notice to
any products herein. Freescale Semiconductor makes no warranty, representation or
guarantee regarding the suitability of its products for any particular purpose, nor does
Freescale Semiconductor assume any liability arising out of the application or use of
Asia/Pacific:
any product or circuit, and specifically disclaims any and all liability, including without
Freescale Semiconductor Hong Kong Ltd.
limitation consequential or incidental damages. “Typical” parameters which may be
provided in Freescale Semiconductor data sheets and/or specifications can and do
Technical Information Center
vary in different applications and actual performance may vary over time. All operating
2 Dai King Street
parameters, including “Typicals” must be validated for each customer application by
Tai Po Industrial Estate
customer’s technical experts. Freescale Semiconductor does not convey any license
Tai Po, N.T., Hong Kong
under its patent rights nor the rights of others. Freescale Semiconductor products are
+800 2666 8080
not designed, intended, or authorized for use as components in systems intended for
[email protected]
surgical implant into the body, or other applications intended to support or sustain life,
or for any other application in which the failure of the Freescale Semiconductor product
could create a situation where personal injury or death may occur. Should Buyer
For Literature Requests Only:
Freescale Semiconductor Literature Distribution Center purchase or use Freescale Semiconductor products for any such unintended or
unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor
P.O. Box 5405
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all
Denver, Colorado 80217
claims, costs, damages, and expenses, and reasonable attorney fees arising out of,
1-800-441-2447 or 303-675-2140
directly or indirectly, any claim of personal injury or death associated with such
Fax: 303-675-2150
unintended or unauthorized use, even if such claim alleges that Freescale
[email protected] Semiconductor was negligent regarding the design or manufacture of the part.