FUJITSU MB85R1002PFTN

FUJITSU SEMICONDUCTOR
DATA SHEET
DS05-13104-1E
Memory FRAM
CMOS
1 M Bit (64 K×16)
MB85R1002
■ DESCRIPTIONS
The MB85R1002 is an FRAM (Ferroelectric Random Access Memory) chip in a configuration of 65,536 words x
16 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile
memory cells.
Unlike SRAM, MB85R1002 is able to retain data without back-up battery.
The memory cells used for the MB85R1002 has improved at least 1010 times of read/write access, significantly
outperforming FLASH memory and E2PROM in endurance.
The MB85R1002 uses a pseudo - SRAM interface compatible with conventional asynchronous SRAM.
■ FEATURES
•
•
•
•
•
•
Bit configuration : 65,536 words x 16 bits
Read/write endurance : 1010 times
Operating power supply voltage : 3.0 V to 3.6 V
Operating temperature range : -20 °C to +85 °C
LB and UB data byte control
48-pin, TSOP(1) plastic package
■ PACKAGE
48-pin plastic TSOP(1)
(FPT-48P-M25)
MB85R1002
■ PIN ASSIGNMENT
(TOP VIEW)
A15
A14
A13
A12
A11
A10
A9
A8
N.C.
N.C.
WE
CE2
GND
UB
LB
VCC
N.C.
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
N.C.
N.C.
GND
I/O16
I/O8
I/O15
I/O7
I/O14
I/O6
I/O13
I/O5
VCC
I/O12
I/O4
I/O11
I/O3
I/O10
I/O2
I/O9
I/O1
OE
GND
CE1
A0
(FPT-48P-M25)
■ PIN DESCRIPTION
Pin name
A0 to A15
Adderss In
I/O1 to I/O16
Data Input/Output
CE1
Chip Enable 1 in
CE2
Chip Enable 2 in
WE
Write Enable in
OE
Output Enable in
LB, UB
2
Function
Data Byte Control in
VCC
Power Supply
GND
Ground
MB85R1002
■ BLOCK DIAGRAM
to
·
·
·
Address Latch.
A0
Row Dec.
Ferro Capacitor Cell
A15
Column Dec.
intCE2
S/A
intCE2
CE2
intCEB
LB
intOE
intWE
intCE2
I/O1 to I/O8 I/O9 to I/O16
I/O16
UB
·
·
WE
I/O9
OE
CE1
to
intCEB
I/O8
·
·
to
I/O1
3
MB85R1002
■ FUNCTION TRUTH TABLE
Mode
Standby Pre-charge
Read
Read
(Pseudo-SRAM,
OE control)
Write
CE1
CE2
WE
OE
LB
UB
H
X
X
X
X
X
X
L
X
X
X
X
X
X
H
H
X
X
X
X
X
X
H
H
L
H
L
L
H
H
L
Write
(Pseudo-SRAM,
WE control)
L
Output Disable
L
H
H
L
H
H
L
X
H
H
H
I/O1 to I/O8
I/O9 to I/O16
Supply Current
High-Z
High-Z
Standby
(ISB)
L
Dout
Dout
L
H
Dout
High-Z
H
L
High-Z
Dout
L
L
Dout
Dout
L
H
Dout
High-Z
H
L
High-Z
Dout
L
L
Din
Din
L
H
Din
High-Z
H
L
High-Z
Din
L
L
Din
Din
L
H
Din
High-Z
H
L
High-Z
Din
X
X
High-Z
High-Z
Notes : L = VIL, H = VIH, X can be either VIL or VIH, High-Z = High Impedance
: Latch address at falling edge,
: Latch address at rising edge
4
Operation
(ICC)
MB85R1002
■ ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
Min
Max
Unit
Supply Voltage
VCC
−0.5
+4.0
V
Input Voltage
VIN
−0.5
VCC + 0.5
V
VOUT
−0.5
VCC + 0.5
V
Ambient Operating Temperature
TA
−20
+85
o
C
Storage Temperature
Tstg
−40
+125
o
C
Output Voltage
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
(VCC = 3.0 V to 3.6 V, TA = −20 oC to +85 oC)
Value
Unit
Typ
Max
Supply Voltage
VCC
3.0
3.3
3.6
V
Input Voltage (high)
VIH
VCC x 0.8
⎯
VCC + 0.5
V
Input Voltage (low)
VIL
−0.5
⎯
+0.6
TA
− 20
⎯
+85
Ambient Operating Temperature
V
o
C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
5
MB85R1002
■ ELECTRICAL CHARACTERISTICS
1. DC CHARACTERISTICS
Parameter
(VCC = 3.0 V to 3.6 V, TA = −20 oC to +85 oC)
Value
Test Conditions
Unit
Min
Typ Max
Symbol
Input Leakage Current
|ILI|
VIN = 0 V to VCC
Output Leakage Current
|ILO|
VOUT = 0 V to VCC, CE1 = VIH or OE = VIH
ICC
CE1 = 0.2 V, CE2 = VCC−0.2 V, Iout = 0 mA*
Supply Current
1
⎯
⎯
10
µA
⎯
⎯
10
µA
⎯
⎯
10
mA
⎯
10
100
µA
VCC x 0.8
⎯
⎯
V
⎯
⎯
0.4
V
CE1 ≥ VCC−0.2 V
Standby Current
ISB
CE2 ≤ 0.2 V*2
OE ≥ VCC−0.2 V, WE ≥ VCC−0.2 V*2
LB ≥ VCC−0.2 V, UB ≥ VCC−0.2 V*2
Output Voltage (high)
VOH
IOH = −2.0 mA
Output Voltage (low)
VOL
IOL = 2.0 mA
*1 : Iout : Output current
*2 : All other inputs (CE1, CE2, OE, WE, LB, UB) should be at CMOS levels, i.e., H ≥ VCC − 0.2 V, L ≤ 0.2 V.
2. AC TEST CONDITIONS
Supply Voltage : 3.0 V to 3.6 V
Operating Temperature : −20 oC to +85 oC
Input Voltage Amplitude : 0.3 V to 2.7 V
Input Rising Time : 10 ns
Input Falling Time : 10 ns
Input Evaluation Level : 2.0 V / 0.8 V
Output Evaluation Level : 2.0 V / 0.8 V
Output Impedance : 50 pF
(1) Read Operation
(VCC = 3.0 V to 3.6 V, TA = −20 oC to +85 oC)
Parametere
6
symbol
Value
Min
Max
unit
Read Cycle time
tRC
250
⎯
ns
CE1 Active Time
tCA1
210
2,000
ns
CE2 Active Time
tCA2
210
2,000
ns
OE Active Time
tRP
210
2,000
ns
LB, UB Active Time
tBP
210
2,000
ns
Pre-charge Time
tPC
40
⎯
ns
Address Setup Time
tAS
10
⎯
ns
Address Hold Time
tAH
50
⎯
ns
OE Setup Time
tES
10
⎯
ns
LB, UB Setup Time
tBS
10
⎯
ns
CE1 Access Time
tCE1
⎯
100
ns
CE2 Access Time
tCE2
⎯
100
ns
OE Access Time
tOE
⎯
100
ns
OE Output Floating Time
tOHZ
⎯
25
ns
MB85R1002
(2) Write Operation
(VCC = 3.0 V to 3.6 V, TA = −20 oC to +85 oC)
Parameter
Symbol
Value
Min
Max
Notes
Write Cycle Time
tWC
250
⎯
ns
CE1 Active Time
tCA1
210
2,000
ns
CE2 Active Time
tCA2
210
2,000
ns
LB, UB Active Time
tBP
210
2,000
ns
Pre-Charge Time
tPC
40
⎯
ns
Address Setup Time
tAS
10
⎯
ns
Address Hold Time
tAH
50
⎯
ns
LB, UB Setup Time
tBS
10
⎯
ns
Write Pulse Width
tWP
210
⎯
ns
Data Setup Time
tDS
10
⎯
ns
Data Hold Time
tDH
50
⎯
ns
Write Setup Time
tWS
0
⎯
ns
(3) Power ON/OFF Sequence
Value
Symbol
Min
Typ
Max
CE1 LEVEL holding time in Power OFF
tpd
85
⎯
⎯
ns
CE1 LEVEL holding time in Power ON
tpu
85
⎯
⎯
ns
Power interval *
tpi
0.5
⎯
⎯
s
Parameter
Units
* : Condition for power detection circuit to function
3. Pin Capacitance
(f = 1 MHz, TA = +25 oC)
Parameter
Input Capacitance
Output Capacitance
Symbol
CIN
COUT
Test Condition
Value
Unit
Min
Typ
Max
VIN = GND
⎯
⎯
10
pF
VOUT = GND
⎯
⎯
10
pF
4. Reliability
Data retention 10 years (TA = 0 °C to +55 °C)
Access endurance 1010 times (TA = −20 °C to +85 °C)
7
MB85R1002
■ TIMING DIAGRAMS
1. Read Cycle Timing 1 (CE1, CE2 Control)
tRC
tCA1
tCE1
tPC
CE1
CE2
tCE2
tBS
tBP
LB, UB
tAS
A0 to A15
tAH
Valid
tES
tRP
OE
tOHZ
tOE
I/O1 to I/O16
High-Z
Valid
2. Read Cycle Timing (OE Control)
tRC
tCA1
tPC
CE1
CE2
tCA2
tBP
tBS
LB, UB
tAS
A0 to A15
tAH
Valid
tRP
OE
tOHZ
tOE
I/O1 to I/O16
8
High-Z
Valid
MB85R1002
3. Write Cycle Timing 1 (CE1, CE2 Control)
tWC
tCA1
tPC
CE1
CE2
tCA2
tBP
tBS
LB, UB
tAS
A0 to A15
tAH
Valid
tWS
tWP
WE
OE
tDS
tDH
Valid
Data In
4. Write Cycle Timing 1 (WE Control)
tWC
tCA1
tPC
CE1
CE2
tCA2
tBP
tBS
LB, UB
tAS
A0 to A15
tAH
Valid
WE
OE
tWP
tDS
tDH
Data In
Valid
9
MB85R1002
■ POWER ON/OFF SEQUENCE
tpd
tpi
tpu
VCC
VCC
CE2
CE2
3.0 V
3.0 V
VIH (Min)
VIH (Min)
1.0 V
1.0 V
VIL (Max)
VIL (Max)
CE2 ≤ 0.2 V
GND
GND
CE1 > VCC × 0.8*
CE1 : Don't Care
CE1 > VCC × 0.8*
CE1
CE1
* : CE1 (Max) < VCC + 0.5 V
■ NOTES ON USE
After IR reflow, the hold of data that was written before IR reflow is not guaranteed.
■ ORDERING INFOMATION
Part number
MB85R1002PFTN
10
Package
48-pin plastic TSOP(1)
(FPT-48P-M25)
Remarks
MB85R1002
■ PACKAGE DIMENTION
Note 1)
Note 2)
Note 3)
Note 4)
48-pin plastic TSOP(1)
(FPT-48P-M25)
*1 : Resin protrusion. (Each side : +0.15 (.006) Max).
*2 : These dimensions do not include resin protrusion.
Pins width and pins thickness include plating thickness.
Pins width do not include tie bar cutting remainder.
0.10±0.05
(Stand off)
(.004±.002)
LEAD No.
1
48
0.50(.020)
INDEX
+0.05
0.22 –0.04
+.002
.009 –.002
*1 12.00±0.10
(.472±.004)
24
0.10(.004)
M
25
1.13±0.07
(Mounting height)
(.044±.003)
14.00±0.20(.551±.008)
Details of "A" part
*2 12.40±0.10(.488±.004)
"A"
0˚~8˚
+0.05
0.08(.003)
C
0.145 –0.03
+.002
.006 –.001
0.25(.010)
0.60±0.15
(.024±.006)
2003 FUJITSU LIMITED F48043S-c-2-2
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
11
MB85R1002
FUJITSU LIMITED
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representatives before ordering.
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circuit examples, in this document are presented solely for the
purpose of reference to show examples of operations and uses of
Fujitsu semiconductor device; Fujitsu does not warrant proper
operation of the device with respect to use based on such
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device based on such information, you must assume any
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assumes no liability for any damages whatsoever arising out of
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function and schematic diagrams, shall not be construed as license
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from the use of information contained herein.
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and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
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and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
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reaction control in nuclear facility, aircraft flight control, air traffic
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satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
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must protect against injury, damage or loss from such failures by
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F0501
© 2005 FUJITSU LIMITED Printed in Japan