FUJITSU MICROELECTRONICS DATA SHEET DS04-29132-3E ASSP Spread Spectrum Clock Generator MB88R157 ■ DESCRIPTION MB88R157 is a clock generator for EMI (Electro Magnetic Interference) reduction. The peak of unnecessary radiation noise (EMI) can be attenuated by making the oscillation frequency slightly modulate periodically with the internal modulator. This product has a built-in non-volatile memory, so its frequency setting can memorize each system or application. Also the product has a built-in oscillation stabilization circuit, so it is not necessary to use the external oscillation stabilization capacitance. ■ FEATURES • Input frequency • Output frequency • • • • • • • • • : 10 MHz to 40 MHz : 1 MHz to 134 MHz Programmable of the parameter of N divider, M divider, K divider (N divider : 11-bit, M divider : 12-bit, K divider : 7-bit) Modulation rate : no modulation, ±0.25%, ±0.5%, ±0.75%, ±1.0%, ±1.25%, ±1.5%, ±1.75% Equipped with a crystal oscillation circuit Built-in oscillation stabilization capacitance : 5 pF to 10 pF (0.039 pF step range) Clock output Duty : 45% to 55% Clock Cycle-Cycle Jitter : Less than 100 ps (Output frequency is over 2 MHz) Low power consumption by CMOS process 5.5 mA (24 MHz, Typ-sample, no load) (Input frequency : 24 MHz, N divider parameter : 1000, M divider parameter : 1000, K divider parameter : 1) Power supply voltage : 3.3 V ± 0.3 V Operating temperature −20 °C to + 85 °C Package : 8-pin plastic SOP Copyright©2008-2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved 2009.8 MB88R157 ■ PIN ASSIGNMENT TOP VIEW XOUT 1 8 XIN OE 2 7 NC PEX 3 6 VDD VSS 4 5 OUT (FPT-8P-M02) ■ PIN DESCRIPTION 2 Pin name Pin no. I/O Description XOUT 1 O Resonator connection pin OE 2 I/O Clock output enable pin L : output disable, H : output enable Serial input/output pin (only program mode) PEX 3 I VSS 4 ⎯ GND pin OUT 5 O Modulation clock output pin VDD 6 ⎯ Power supply voltage pin NC 7 ⎯ Non-connection pin (do not connect anything) XIN 8 I Programmable enable setting pin L : program mode, H : normal operation Resonator connection pin/clock input pin DS04-29132-3E MB88R157 ■ I/O CIRCUIT TYPE Pin name Circuit type Remarks PEX • CMOS hysteresis input • With pull-up resistor (50 kΩ) 50 kΩ OE 50 kΩ OUT With pull-up resistor (50 kΩ) • CMOS hysteresis input (Input) In serial output mode • CMOS output • IOL = 3 mA • CMOS output • IOL = 3 mA/7 mA selectable (Selectable by Output driver setting bit) • Hi-Z or “L” output at OE = “L” (Selectable by OUT pin setting bit) Note : About XIN and XOUT pins, please refer to the chapter of “■ CRYSTAL OSCILLATION CIRCUIT”. DS04-29132-3E 3 MB88R157 ■ HANDLING DEVICES • Preventing Latch-up A latch-up can occur if, on this device, (a) a voltage higher than power supply voltage or a voltage lower than GND is applied to an input or output pin or (b) a voltage higher than the rating is applied between power supply and GND. The latch-up, if it occurs, significantly increases the power supply current and may cause thermal destruction of an element. When you use this device, be very careful not to exceed the maximum rating. • Handling unused pins Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or pulldown resistor. • To use external clock input To use an external clock signal, input the clock signal to the XIN pin with the XOUT pin connected to nothing. • Power supply pins Please design connecting the power supply pin of this device by as low impedance as possible from the current supply source. We recommend connecting electrolytic capacitor (about 10 μF) and the ceramic capacitor (about 0.01 μF) in parallel between power supply and GND near the device, as a bypass capacitor. • Oscillation circuit Noise near the XIN pin and XOUT pin may cause the device to malfunction. Design printed circuit boards so that electric wiring of XIN pin or XOUT pin and the resonator do not intersect other wiring. Design the printed circuit board that surrounds the XIN pin and XOUT pin with ground in order to stabilize operation. 4 DS04-29132-3E MB88R157 ■ BLOCK DIAGRAM VDD Output control OE XOUT N div. OSC XIN Frequency phase compare Charge Pump Loop Filter VCO K div. OUT M div PLL block Non-volatile memory Serial-I/F Modulation logic Serial data PEX VSS A glitch-less IDAC (current output D/A converter) provides precise modulation, thereby dramatically reducing EMI. DS04-29132-3E 5 MB88R157 ■ MEMORY MAP Address Function bit0-bit11 M divider setting (12-bit) Selectable in the range of 1 to 4096 bit12-bit22 N divider setting (11-bit) Selectable in the range of 1 to 2048 bit23-bit29 K divider setting (7-bit) Selectable in the range of 1 to 128 bit30-bit32 L divider setting (3-bit) Modulation frequency setting (the value is due to the input frequency) bit33-bit36 Charge Pump setting (4-bit) bit37-bit41 VCO Gain setting (5-bit) bit42-bit44 Modulation rate setting (3-bit) bit45 OUT pin setting (1bit) bit46 Output drive setting (1bit) bit47 Source clock dividing mode (1bit) bit48 PLL mode setting (1bit) bit49-bit55 XIN oscillation stabilization capacitance setting (7-bit) Capacitance is selectable from 5 pF to 10 pF by 0.039 pF Step bit56-bit62 XOUT oscillation stabilization capacitance setting (7-bit) Capacitance is selectable from 5 pF to 10 pF by 0.039 pF Step bit63 Reserve 6 Remarks Charge pump current setting due to VCO oscillation frequency VCO gain setting due to VCO oscillation frequency No modulation, ±0.25%, ±0.50%, ±0.75%, ±1.00%, ±1.25%, ±1.50%, ±1.75% are selectable Selectable OUT pin situation at OE pin = L 0 : L output 1 : Hi-Z output OUT pin driving ability setting 0 : Ability small 1 : Ability large Source clock selectable to K divider 0 : VCO output 1 : Source clock 0 : Normal mode 1 : PLL mode ⎯ DS04-29132-3E MB88R157 ■ OPERATION SETTING • Frequency setting Output frequency can be set by writing the internal memory to each divider parameter in the PLL block. Internal oscillation frequency and output frequency can be calculated following expressions : Internal oscillation frequency (fvco*) = Input frequency (fin) × (M+1) / (N+1) * : Please set the fvco range from 20 MHz to 134 MHz. Output frequency (fOUT*) = Input frequency (fin) × (M+1) / ( (N+1) × K) * : Please set the fOUT range from 1 MHz to 134 MHz. (Setting example) fin = 27 MHz, fOUT = 60 MHz M divider parameter : 1999 ( = 7CFH) , N divider parameter : 899 ( = 383H) , K divider parameter : 1 ( = 01H) 27 × (1999+1) / ( (899+1) × 1) = 60 [MHz] (fvco = 27 × (1999+1) / (899+1) = 60 [MHz]) Note: Recommended value of each divider parameter is different at PLL mode and normal mode. Please refer and confirm the recommended value by our support tool. Contact the sales representatives for details on the support tools. • Modulation frequency setting Modulation frequency can be set by writing the internal memory to L divider parameter. The average of modulation frequency can be calculated following expressions : Input frequency 266 × (L+1) (L = 1, 2, 3, 4, 5, 6, 7) Note: Please refer and confirm the recommended value by our support tool. Contact the sales representatives for details on the support tools. • Modulation rate setting Modulation rate can be selectable from no modulation, ±0.25%, ±0.50%, ±0.75%, ±1.00%, ±1.25%, ±1.50%, ±1.75%. bit44 bit43 bit42 Modulation rate setting 0 0 0 No modulation 0 0 1 ±0.25% 0 1 0 ±0.50% 0 1 1 ±0.75% 1 0 0 ±1.00% 1 0 1 ±1.25% 1 1 0 ±1.50% 1 1 1 ±1.75% DS04-29132-3E 7 MB88R157 • Charge Pump setting, VCO gain setting Note: Please refer and confirm the recommended value by our support tool. Contact the sales representatives for details on the support tools. • OUT pin setting OUT pin situation can be selected at OE pin “L” input. bit45 OUT pin situation 0 “L” output 1 “Hi-Z” output Note : Internal oscillation circuit has been operating when OE pin is input “L”. • Output drive ability setting Output drive ability of OUT pin can be selected. bit46 OUT pin drive ability 0 Small (IOL = 3 mA) 1 Large (IOL = 7 mA) • Source clock dividing setting Source clock to K divider can be selected. When “input frequency” is selected, source clock or its divided clock can be output. But modulation setting is not enable. bit47 Source clock to K divider 0 VCO output clock 1 Input clock (Source clock) Note: When “input frequency ” is selected, internal oscillation circuit has been operating. About M and N divider parameter setting, please refer and confirm the recommended value by our support tool. Contact the sales representatives for details on the support tools. • PLL mode setting It can be selected normal mode and PLL mode by bit48 setting in the memory map. PLL mode is good jitter specification at non modulation. When the mode is selected, it becomes non modulation setting, the resistance and capacitance value of the loop filter is changed, so oscillation specification is change. bit48 Operation mode 0 SSCG mode 1 PLL mode Note: When PLL mode is selected, recommended value of M, N, K divider is changed. Please refer and confirm the recommended value by our support tool. Contact the sales representatives for details on the support tools. 8 DS04-29132-3E MB88R157 • Oscillation stabilization capacitance setting The capacitance connected XIN and XOUT pin can change each from 5 pF to 10 pF by writing to bit49 to bit55 and bit56 to bit62 in the memory map. XIN XOUT Capacitance [pF] bit49 bit56 0.039 bit50 bit57 0.079 bit51 bit58 0.157 bit52 bit59 0.315 bit53 bit60 0.630 bit54 bit61 1.260 bit55 bit62 2.520 XIN XOUT 5pF 5pF bit55 bit53 bit54 bit51 bit52 bit49 bit50 bit56 bit58 bit57 bit60 bit59 bit62 bit61 (Setting example) bit49 to bit55 : “0000000” bit56 to bit62 : “0100001” XIN pin Oscillation stabilization capacitance : 5.000 pF XOUT pin Oscillation stabilization capacitance : 7.599 pF DS04-29132-3E 9 MB88R157 ■ MEMORY ACCESS pa Read/write to the built-in non-volatile memory is enabled through the serial communication with the OE pin functioned as the I/O pin. Set for the communication protocol. Also, set the transfer speed as 1/512 of the source clock. • Asynchronous transfer mode of UART • LSB fast • NRZ format • Bit length: 8 bits • No parity • Stop bit: 1 bit • Transfer sequence 30 ms 2.5 V VDD OE PEX Memory access mode signal (internal) OUT Source clock output 1. Set the PEX pin to “L” more than 30 ms after this device is turned on, input a command from the OE pin set MB88R157 into memory access mode.(When a command is input by serial communication, data of “FDH” is sent.) Note: When memory access is available, source clock can be output from the OUT pin. Fix the PEX pin to “H”, or fix the OE pin to “H” or “L” until command input. 2. At writing, “00H” is sent serially, and at reading, “40H” is sent. Note: This device needs to stop outputting to the OE pin of the transferred device within 15 μs after transferring “40H” serially at the reading state and place it to a receivable state. 3. At writing : Send 8-byte data blocks from the lower address of the memory map in turn with more than 100 μs between each data block. At read : This device outputs 8-byte data blocks from the lower address of the memory map in turn. 4. Repeat the operations of 2. and 3. for re-writing and re-reading. To operate the device using the written data, turn on the power again. However, the oscillation stabilization capacitance is set simultaneously with writing to memory. When the oscillation stabilization capacitance and the crystal oscillation frequency are adjusted, change the oscillation stabilization capacitance value so that the clock output from the OUT pin is set to the desired frequency. 10 DS04-29132-3E MB88R157 • Interconnection example *1 UO OE UI MB88R157 UCK Microcontroller with built-in UART etc. *2 Clock Generator * 1 : Set the UO pin to Hi-z to read from memory, as the UO pin serves for serial I/O. UO : UART serial data output pin UI : UART serial data input pin UCK : UART serial synchronous clock I/O pin *2 : Because the transfer rate is set to 1/512 of source oscillation in MB88R157, the clock generator is used as shown in above figure, so that the transfer speed is set to 1/512 of source clock in MB88R157. However, the clock generator is not needed if the transfer speed can be maintained from an internal clock of the baud rate generator of the UART. DS04-29132-3E 11 MB88R157 ■ ABSOLUTE MAXIMUM RATINGS Parameter Rating Symbol Unit Min Max VDD − 0.5 + 4.0 V Input voltage* VI VSS − 0.5 VDD + 0.5 V Output voltage* VO VSS − 0.5 VDD + 0.5 V Storage temperature TST − 55 + 125 °C Operation junction temperature TJ − 40 + 125 °C Output current IO − 14 + 14 mA Overshoot VIOVER ⎯ VDD + 1.0 (tOVER ≤ 50 ns) V Undershoot VIUNDER VSS − 1.0 (tUNDER ≤ 50 ns) ⎯ V Power supply voltage* * : This parameter is based on VSS = 0.0 V WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. Overshoot/Undershoot tUNDER ≤ 50 ns VIOVER ≤ VDD + 1.0 V VDD Input pin VSS tOVER ≤ 50 ns 12 VIUNDER ≤ VSS − 1.0 V DS04-29132-3E MB88R157 ■ RECOMMENDED OPERATING CONDITONS (VSS = 0.0 V) Parameter Symbol Pin name Conditions Power supply voltage VDD VDD “H” level input voltage VIH “L” level input voltage Input clock duty cycle Unit Min Typ Max ⎯ 3.0 3.3 3.6 V Input slew rate for XIN pin only 3 V/ns VDD × 0.80 ⎯ VDD + 0.3 V VIL OE, PEX, XIN VSS ⎯ VDD × 0.20 V tDCI XIN 10 MHz to 50 MHz 40 50 60 % + 20 ⎯ + 50 °C −20 ⎯ + 85 °C Write to the internal non-volatile memory Operating temperature Value Ta Operating test after the re-flow ⎯ Other than those above WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. Input clock duty cycle (tDCI = tb / ta) ta tb 1.5 V XIN DS04-29132-3E 13 MB88R157 ■ ELECTRICAL CHARACTERISTICS • DC Characteristics (Ta = − 20 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V) Parameter Symbol Pin name Value Unit Min Typ Max 24 MHz input (Crystal) , 24 MHz internal oscillation, 24 MHz output no load capacitance ⎯ 5.5 7.0 mA ICC2 50 MHz input clock, 134 MHz internal oscillation, 134 MHz output 15 pF load capacitance ⎯ ⎯ 26 mA VOH “H” level output Driving voltage (low) IOH = −3 mA, Driving voltage (high) IOH = −7 mA VDD − 0.5 ⎯ VDD V “L” level output Driving voltage (low) IOL = 3 mA, Driving voltage (high) IOL = 7 mA VSS ⎯ 0.4 V ⎯ 25 50 200 kΩ ⎯ ⎯ 16 pF ICC VDD Power supply current Output voltage OUT VOL Pull-up resistance RPU OE, PEX Load capacitance CIN XIN, OE, PEX 14 Conditions Ta = + 25 °C, VDD = VI = 0.0 V, f = 1 MHz DS04-29132-3E MB88R157 • AC characteristics (1) (Ta = − 20 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V) Parameter Sym- Pin bol name Conditions XIN, Fundamental oscillation XOUT Value Unit Min Typ Max 10 ⎯ 40 MHz Crystal oscillation frequency fx Input frequency fin XIN ⎯ 10 ⎯ 40 MHz fVCO ⎯ ⎯ 20 ⎯ 134 MHz Operation in PLL mode and at non modulation 1 ⎯ 134 Operation at modulation 16 ⎯ 134 0.4 V to 2.4 V load capacitance 15 pF Driving ability small: at 1 MHz to 60 MHz output Driving ability large: at 60 MHz to 134 MHz OUT output 0.3 ⎯ ⎯ Driving ability small ⎯ 75 ⎯ Driving ability large ⎯ 38 ⎯ tDCC VCO clock output 45 ⎯ 55 tDCR At reference clock output tDCI−10* ⎯ tDCI+10* Internal oscillation frequency Output frequency fOUT Output slewing rate SR Output impedance ZO Output clock duty cycle Modulation frequency (number of clocks par one modulation) fMOD (nMOD) Power supply time tR VDD 0.2 V to 3.0 V Lock-up time tLK ⎯ tJC No load capacitance, Ta = + 25 °C V DD = 3.3 V OUT Cycle-cycle jitter MHz V/ns Ω % fin/ (224 × fin/ (266 × fin/ (308 × kHz (L+1) ) (L+1) ) (L+1) ) (clks) (224 × (L+1) ) (266 × (L+1) ) (308 × (L+1) ) ⎯ 0.05 ⎯ 20 ms ⎯ 270/fin+5 270/fin+10 ms fOUT ≥ 2 MHz ⎯ ⎯ 100 fOUT< 2 MHz ⎯ ⎯ 150 psrms Output stop time from OE exit. tOD ta = 1 / fOUT ⎯ ⎯ 2 × ta ns Output start time after OE entry tOE ta = 1 / fOUT ⎯ ⎯ 2 × ta ns * : The duty cycle value (tDCR) of the source clock output depends on the duty cycle of input clock tDCI. Either case of A or B will be guaranteed. A. Resonator : Oscillating with the resonator connected with XIN, XOUT B. External clock input : The input level is Full - swing (VSS - VDD). DS04-29132-3E 15 MB88R157 ■ DEFINITION of MODULATION FREQUENCY and NUMBER of INPUT CLOCKS PER MODULATION f (Output frequency) Modulation wave form t FMOD(Min) FMOD(Max) V Input clock Clock count Clock count NMOD(Max) NMOD(Min) t This product contains the modulation period to realize the efficient EMI reduction. The modulation period FMOD depends on the input frequency and changes between FMOD (Min) and FMOD (Max). Furthermore, the typical value of the electrical characteristics is equivalent to the average value of the modulation period FMOD. ■ TURNING ON POWER SUPPLY AND LOCK-UP TIME tR 3.0 V VDD 0.2 V clock stabilization wait time tLK XIN OUT 16 DS04-29132-3E MB88R157 ■ OUTPUT CLOCK DUTY CYCLE (tDCC = tb / ta) ta tb OUT VDD/2 ■ INPUT FREQUENCY (fin = 1 / tin) tin 0.8 VDD XIN ■ OUTPUT SLEW RATE (SR) 2.4 V OUT 0.4 V tr tf Note: SR = (2.4 − 0.4) /tr, SR = (2.4 − 0.4) /tf ■ CYCLE-CYCLE JITTER (tJC = | tn − tn+1 | ) OUT tn DS04-29132-3E tn+1 17 MB88R157 ■ OUTPUT TIMING AT OE CHANGE • Output stop time from OE exit VDD × 0.2[V] OE ta tOD “Hi-z” or “L” (depend on setting of bit 45) OUT • Output start time after OE entry OE VDD × 0.8[V] tOE OUT 18 “Hi-z” or “L” (depend on setting of bit 45) DS04-29132-3E MB88R157 • AC characteristics (2) (Serial interface timing) (Ta = − 20 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V) Parameter Symbol Pin name Conditions Cycle time of transfer and receiver tSCYC Read operation Read command receive → OE in read data output tRDO Read operation Final read data output → OE pin input mode exchanged tOTI OE Value Unit Min Typ Max ⎯ (tin × 512) × 0.93 tin × 512 (tin × 512) × 1.025 μs ⎯ 15 ⎯ ⎯ μs ⎯ ⎯ ⎯ 65 μs • Command / write data transfer VDD*0.8 OE D0 VDD*0.2 D1 D2 D3 D4 D5 D6 D7 tSCYC • Read operation Output read data OE D7 Stop bit Read command received Hi-z Start bit tRDO OE pin output OE D7 D0 Received data Hi-z Stop bit tOTI DS04-29132-3E 19 MB88R157 ■ INTERCONNECTION CIRCUIT EXAMPLE Xtal 1 8 2 7 3 MB88R157 4 6 5 R1 C1 C2 C1 : Capacitor of 10 μF or higher C2 : Capacitor of about 0.01 μF (connect a capacitor of good high frequency property (ex. laminated ceramic capacitor) to close to this device) R1 : Impedance matching resistor for board pattern ■ CRYSTAL OSCILLATION CIRCUIT The figure below shows the connection example about general resonator. The oscillation circuit has the built-in feedback resistor (500 kΩ) and oscillation stabilization capacitance (C1 and C2). C1 and C2 value can be changeable by setting bit49 to bit55 and bit56 to bit62 in memory. It is necessary to set suitable parameter for each resonator. To use an external clock signal (without using the resonator), input the clock signal to the XIN pin with the XOUT pin connected to nothing. Rf (500 kΩ) C1 C2 XIN pin LSI internal XOUT pin LSI external Fundamental resonator 20 DS04-29132-3E MB88R157 ■ ORDERING INFORMATION Part number MB88R157PNF-G-JNE1 MB88R157PNF-G-JN-ERE1 MB88R157PNF-G-JN-EFE1 DS04-29132-3E Package 8-pin plastic SOP (FPT-8P-M02) 21 MB88R157 ■ PACKAGE DIMENSION 8-pin plastic SOP Lead pitch 1.27 mm Package width × package length 3.9 × 5.05 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.75 mm MAX Weight 0.06 g (FPT-8P-M02) 8-pin plastic SOP (FPT-8P-M02) +0.25 Note 1) *1 : These dimensions include resin protrusion. Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. +.010 +0.03 *1 5.05 –0.20 .199 –.008 0.22 –0.07 +.001 .009 –.003 8 5 *2 3.90±0.30 6.00±0.40 (.154±.012) (.236±.016) Details of "A" part 45˚ 1.55±0.20 (Mounting height) (.061±.008) 0.25(.010) 0.40(.016) 1 "A" 4 1.27(.050) 0.44±0.08 (.017±.003) 0.13(.005) 0~8˚ M 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.15±0.10 (.006±.004) (Stand off) 0.10(.004) ©2002-2008 FUJITSU MICROELECTRONICS LIMITED F08004S-c-4-8 C 2002 FUJITSU LIMITED F08004S-c-4-7 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/package/en-search/ 22 DS04-29132-3E MB88R157 MEMO DS04-29132-3E 23 MB88R157 FUJITSU MICROELECTRONICS LIMITED Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3329 http://jp.fujitsu.com/fml/en/ For further information please contact: North and South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://www.fma.fujitsu.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LTD. 151 Lorong Chuan, #05-08 New Tech Park 556741 Singapore Tel : +65-6281-0770 Fax : +65-6281-0220 http://www.fmal.fujitsu.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Pittlerstrasse 47, 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/microelectronics/ FUJITSU MICROELECTRONICS SHANGHAI CO., LTD. Rm. 3102, Bund Center, No.222 Yan An Road (E), Shanghai 200002, China Tel : +86-21-6146-3688 Fax : +86-21-6335-1605 http://cn.fujitsu.com/fmc/ Korea FUJITSU MICROELECTRONICS KOREA LTD. 206 Kosmo Tower Building, 1002 Daechi-Dong, Gangnam-Gu, Seoul 135-280, Republic of Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://kr.fujitsu.com/fmk/ FUJITSU MICROELECTRONICS PACIFIC ASIA LTD. 10/F., World Commerce Centre, 11 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel : +852-2377-0226 Fax : +852-2376-3269 http://cn.fujitsu.com/fmc/en/ Specifications are subject to change without notice. For further information please contact each office. All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information. 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The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws. The company names and brand names herein are the trademarks or registered trademarks of their respective owners. Edited: Sales Promotion Department