74LVQ157 LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 7 ns (TYP.) at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.2V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE OUTPUT DRIVE CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0 V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 157 IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74LVQ157 is a low voltage CMOS QUAD 2-CHANNEL MULTIPLEXER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. SOP TSSOP Table 1: Order Codes PACKAGE T&R SOP TSSOP 74LVQ157MTR 74LVQ157TTR It consists of four 2-input digital multiplexers with common select and strobe inputs. When STROBE input is held high selection of data is inhibit and all the outputs become low. The SELECT decoding determines whether the A or B inputs get routed to their corresponding Y outputs. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. Figure 1: Pin Connection And IEC Logic Symbols July 2004 Rev. 5 1/12 74LVQ157 Figure 2: Input And Output Equivalent Circuit Table 2: Pin Description PIN N° SYMBOL NAME AND FUNCTION 1 SELECT 2, 5, 11, 14 1A to 4A 3, 6, 10, 13 1B to 4B 4, 7, 9, 12 15 8 16 1Y to 4Y STROBE GND VCC Common Data Select Input Data Inputs From Source A Data Inputs From Source B Multiplexer Outputs Strobe Input Ground (0V) Positive Supply Voltage Table 3: Truth Table INPUTS STROBE SELECT A B Y H L L L L X L L H H X L H X X X X X L H L L H L H X : Don’t Care Figure 3: Logic Diagram 2/12 OUTPUT 74LVQ157 Table 4: Absolute Maximum Ratings Symbol VCC Parameter Supply Voltage Value Unit -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5 to VCC + 0.5 ± 20 V mA ± 20 mA IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Current ICC or IGND DC VCC or Ground Current Storage Temperature Tstg TL ± 50 mA ± 200 mA -65 to +150 °C 300 °C Lead Temperature (10 sec) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied Table 5: Recommended Operating Conditions Symbol VCC Parameter Value Unit Supply Voltage (note 1) 2 to 3.6 V VI Input Voltage 0 to VCC V VO Output Voltage Top Operating Temperature dt/dv Input Rise and Fall Time VCC = 3.0V (note 2) 0 to VCC V -55 to 125 °C 0 to 10 ns/V 1) Truth Table guaranteed: 1.2V to 3.6V 2) VIN from 0.8V to 2V Table 6: DC Specifications Test Condition Symbol VIH VIL VOH Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage TA = 25°C VCC (V) Min. Typ. Max. 2.0 3.0 to 3.6 3.0 Value Low Level Output Voltage 3.0 -55 to 125°C Min. Min. 0.8 IO=-50 µA 2.9 IO=-12 mA 2.58 2.99 2.9 2.9 2.48 2.2 IO=50 µA 0.002 0.1 IO=12 mA 0 0.36 ICC IOLD IOHD Input Leakage Current Quiescent Supply Current Dynamic Output Current (note 1, 2) V 0.8 2.48 Unit Max. 2.0 0.8 IO=24 mA II Max. 2.0 IO=-24 mA VOL -40 to 85°C V V 2.2 0.1 0.1 0.44 0.44 0.55 0.55 V 3.6 VI = VCC or GND ± 0.1 ±1 ±1 µA 3.6 VI = VCC or GND 4 40 40 µA 3.6 VOLD = 0.8 V max 36 25 mA VOHD = 2 V min -25 -25 mA 1) Maximum test duration 2ms, one output loaded at time 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 75Ω 3/12 74LVQ157 Table 7: Dynamic Switching Characteristics Test Condition Symbol VOLP VOLV VIHD VILD Parameter Dynamic Low Voltage Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) Value TA = 25°C VCC (V) Min. 3.3 -0.8 3.3 Typ. Max. 0.2 0.8 -40 to 85°C -55 to 125°C Min. Min. Max. Unit Max. V -0.2 2 V CL = 50 pF 3.3 0.8 V 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f=1MHz. Table 8: AC Electrical Characteristics (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns) Test Condition Symbol Parameter tPLH tPHL Propagation Delay Time SELECT -Y tPLH tPHL Propagation Delay Time STROBE -Y tPLH tPHL Propagation Delay Time A, B -Y tOSLH tOSHL Output To Output Skew Time (note1, 2) Value TA = 25°C VCC (V) Min. 2.7 Typ. Max. -40 to 85°C -55 to 125°C Min. Min. Max. Max. 8.4 13.5 15.5 17.5 (*) 3.3 2.7 7.0 10.0 11.5 13.0 7.6 12.0 14.0 16.0 3.3(*) 2.7 7.0 10.0 11.5 13.0 6.8 10.5 12.0 13.5 (*) 5.5 8.0 9.0 10 (*) 0.5 0.5 1.0 1.0 1.0 1.0 1.0 1.0 3.3 2.7 3.3 Unit ns ns ns ns 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = |tPLHm - tPLHn|, tOSHL = |tPHLm - tPHLn|) 2) Parameter guaranteed by design (*) Voltage range is 3.3V ± 0.3V Table 9: Capacitive Characteristics Test Condition Symbol Parameter TA = 25°C VCC (V) CIN Input Capacitance 3.3 CPD Power Dissipation Capacitance (note 1) 3.3 Value Min. fIN = 10MHz Typ. Max. -40 to 85°C -55 to 125°C Min. Min. Max. Unit Max. 5 pF 32 pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per channel) 4/12 74LVQ157 Figure 4: Test Circuit CL = 50pF or equivalent (includes jig and probe capacitance) RL = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) Figure 5: Waveform - Propagation Delays For Non Inverting Conditions 5/12 74LVQ157 Figure 6: Waveform - Propagation Delays For Non-inverting Conditions 6/12 74LVQ157 SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.25 a2 MAX. 0.004 0.010 1.64 0.063 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 e3 0.050 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8° (max.) 0016020D 7/12 74LVQ157 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0079 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0˚ L 0.45 A 0.60 0.0256 BSC 8˚ 0˚ 0.75 0.018 8˚ 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 8/12 74LVQ157 Tape & Reel SO-16 MECHANICAL DATA mm. inch DIM. MIN. A TYP MAX. MIN. 330 MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 TYP. 0.504 22.4 0.519 0.882 Ao 6.45 6.65 0.254 0.262 Bo 10.3 10.5 0.406 0.414 Ko 2.1 2.3 0.082 0.090 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 9/12 74LVQ157 Tape & Reel TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. A MAX. MIN. 330 13.2 TYP. MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 10/12 TYP 0.504 22.4 0.519 0.882 Ao 6.7 6.9 0.264 0.272 Bo 5.3 5.5 0.209 0.217 Ko 1.6 1.8 0.063 0.071 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 74LVQ157 Table 10: Revision History Date Revision 29-Jul-2004 5 Description of Changes Ordering Codes Revision - pag. 1. 11/12 74LVQ157 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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