COMMUNICATIONS MODULES & SUBSYSTEMS RoHS-Compliant 4.25 Gbps 850 nm eSFP Transceivers PLRXPL-VE-SG4-62-x Key Features • Compliant with industry-wide physical and optical specifications • Lead-free and RoHS-compliant • Superior EMI peformance • Cost effective SFP solution • Triple-rate FC performance • Enables higher port densities • Enables greater bandwidth • Proven high reliability • In-house precision alignment Applications • High-speed storage area networks - Switch and hub interconnect - Mass storage systems interconnect - Host adapter interconnect • Computer cluster cross-connect • Custom high-speed data pipes This lead-free and RoHS-compliant multi-rate Small Form Factor Pluggable (SFP) transceiver provides superior performance for Fibre Channel applications, and is another in JDSU’s family of products customized for high speed, short reach SAN, and intra-POP applications. The multi-rate feature enables its use in a wider range of system applications. It is fully compliant with FC-PI 100-M5/M6-SN-I, 200M5/M6-SN-I, and 400-M5/M6-SN-I specifications. The rate select pin (pin 7) provides receiver bandwidth switching between 4.25G /2.125G and 2.125/1.0625G line rates for optmized link performance enabling hardware or software based rate-negotiation system architectures. Picolight’s improved housing provides improved EMI performance for demanding 4GFC applications. This transceiver features a highly reliable 850 nm oxide vertical-cavity surface-emitting laser (VCSEL) coupled to a LC optical connector. Its small size allows for high-density board designs that, in turn, enable greater total aggregate bandwidth. Highlights • 4GFC, 2GFC, and 1GFC and 1GBE multiple rate performance enables flexible system design, and configuration, while maximizing bandwidth • Lead-free and RoHS-compliant per Directive 2002/95/EC • Enhanced digital diagnostic feature set allows real-time monitoring of transceiver performance and system stability. • Bail mechanism enables superior ergonomics and functionality in all port configurations • Extended voltage and extended temperature • MSA-compliant small form factor footprint enables high port density and keeps overall system cost low • Serial ID allows customer and vendor system specific information to be placed in transceiver • All-metal housing provides superior EMI performance NORTH AMERICA: 800 498-JDSU (5378) WORLDWIDE: +800 5378-JDSU WEBSITE: www.jdsu.com ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 2 PLRXPL-VE-SG4-62-x Features • Utilizes a highly reliable, high-speed, 850nm, oxide VCSEL • Lead-free and RoHS-compliant • All-metal housing for superior EMI performance • Hot pluggable • Digital diagnostics, SFF-8472 rev 9.5 compliant • Compliant with Fibre Channel 400M5/M6-SN-I, 200-M5/M6-SN-I, and 100-M5/M6-SN-I • Selectable 4G/2G/1G receiver bandwidth with rate select pin 7 or through digital diagnostics interface • Low nominal power consumption (400 mW) • -20˚C to 85˚C operating temperature range • Single +3.3 V power supply • ±10% extended operating voltage range • Bit error rate < 1 x 10-12 • OC Transmit disable, loss of signal and transmitter fault functions • CDRH and IEC 60825-1 Class 1 laser eye safe • FCC Class B compliant • ESD Class 2 per MIL-STD 883 Method 3015 • UL-94 V-0 certified • Internal AC coupling on both transmit and receive data signals An eye-safe, cost effective serial transceiver, the PLRXPL-VE-SG4-62 features a small, low power, pluggable package that manufacturers can upgrade in the field, adding bandwidth incrementally. The robust mechanical design features a unique all-metal housing that provides superior EMI shielding. ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 3 Section 1 Functional Description The PLRXPL-VE-SG4-62-x 850 nm VCSEL Gigabit Transceiver is designed to transmit and receive 8B/10B encoded serial optical data over 50/125 µm or 62.5/125 µm multimode optical fiber. Transmitter The transmitter converts 8B/10B encoded serial PECL or CML electrical data into serial optical data meeting the requirements of 100-M5/M6-SN-I, 200-M5/M6SN-I, and 400-M5/M6-SN-I Fibre Channel specifications. Transmit data lines (TD+ & TD-) are internally AC coupled with 100 Ω differential termination. An open collector compatible Transmit Disable (Tx_Dis) is provided. This pin is internally terminated with a 10 kΩ resistor to VccT. A logic “1,” or no connection on this pin will disable the laser from transmitting. A logic “0” on this pin provides normal operation. The transmitter has an internal PIN monitor diode that is used to ensure constant optical power output across supply voltage and temperature variations. An open collector compatible Transmit Fault (TFault) is provided. The Transmit Fault signal must be pulled high on the host board for proper operation. A logic “1” output from this pin indicates that a transmitter fault has occurred, or the part is not fully seated and the transmitter is disabled. A logic “0” on this pin indicates normal operation. Receiver The receiver converts 8B/10B encoded serial optical data into serial PECL/CML electrical data. Receive data lines (RD+ & RD-) are internally AC coupled with 100 Ω differential source impedance, and must be terminated with a 100 Ω differential load. Rate select, pin 7, switches the receiver bandwith enabling superior performance at 4.25 Gbps, 2.125 Gbps, and 1.0625 Gbps line rates. With non rate-select part numbers or when rate-select is set “high” (4.25/2.125 Gbps mode) on rate-select part numbers, the receiver bandwidth is not compliant to the maximum receiver bandwidth specified under 100-M5/M6-SN-I. Table 1 FC Compliance with Rate Select Parameter 100-M5/M6-SN-I 200-M5/M6-SN-I 400-M5/M6-SN-I High and -N part numbers Low No1 Yes Yes Yes Yes No 1. Not compliant with CD lasers ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 4 An open collector compatible Loss of Signal is provided. The LOS must be pulled high on the host board for proper operation. A logic “0” indicates that light has been detected at the input to the receiver (see Section 2.5 Optical characteristics, Loss of Signal Assert/Deassert Time on page 10). A logic “1” output indicates that insufficient light has been detected for proper operation. Power supply filtering is recommended for both the transmitter and receiver. Filtering should be placed on the host assembly as close to the Vcc pins as possible for optimal performance. Recommended “Application Schematics” are shown in Figure 2 on page 5. 16 Transmitter Power Supply 10 kΩ 3 Transmitter Disable In VCC_TX TX_DIS TOSA 18 Transmitter Positive Data TD+ 100 Ω Laser Driver TX_GND TX_FAULT 19 Transmitter Negative Data TD - 2 Transmitter Fault Out 1, 17, 20 Transmitter Signal Ground 5 MOD_DEF(1) Serial ID Clock 4 MOD_DEF(2) Serial ID Data SCL Management Processor SDA EEPROM 6 MOD_DEF(0) 15 Receiver Power Supply VCC_RX ROSA VCC_RX RD - 50 Ω Receiver RD + RX_GND RX_GND Rate_Select LOS 50 Ω 12 Receiver Negative Data Out 13 Receiver Positive Data Out 8 Loss of Signal Out 7 Rate Select 30 kΩ 9, 10, 11, 14 Receiver Signal Ground Figure 1 Block diagram ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 5 Section 2 Application Schematics Recommended connections to the PLRXPL-VE-SG4-62-x transceiver are shown in Figure 2 below. Vcc R1* 50Ω Z* = 100Ω 10 kΩ 1 VeeT PECL Driver (TX DATA) Receiver (Tx Fault) VeeT 20 R2* 50Ω Open Collector Driver (Tx Disable) Vcc 10 kΩ Open Collector Bidirectional (Mod_Def(2)) TD- 19 3 Tx Disable TD+ 18 VeeT 17 4 MOD_DEF(2) L1 1 μH Vcc 2 Tx Fault C3 0.1μF 7 Rate Select VeeR 14 Receiver (Mod_Def(0)) C5 10 μF R3* 50Ω RD+ 13 Z* = 100Ω PECL Receiver (RX DATA) 8 LOS C1 10μF C4 0.1 μF 10 kΩ C2 0.1 μF VccR 15 6 MOD_DEF(0) Vcc +3.3V Input L2 1 μH Vcc VccT 16 Open Collector Bidirectional (Mod_Def(1)) 5 MOD_DEF(1) 10 kΩ Rate Select 9 VeeR RD- 12 10 VeeR VeeR 11 Vcc R4* 50Ω 10 kΩ Receiver (LOS) Notes Power supply filtering components should be placed as close to the Vcc pins of the host connector as possible for optimal performance. PECL driver and receiver will require biasing networks. Please consult application notes from suppliers of these components. CML I/O on the PHY are supported. MOD_DEF(2) and MOD_DEF(1) should be bi-directional open collector connections in order to implement serial ID (MOD_DEF[0,1,1]) PLRXPL-VE-S64-62-x transceiver. R1 and R2 may be included in the output of the PHY. Check application notes of the IC in use. * Transmission lines should be 100 Ω differential traces. It is recommended that the termination resistor for the PECL Receiver (R3 + R4) be placed beyond the input pins of the PECL Receiver. Series Source Termination Resistors on the PECL Driver (R1+R2) should be placed as close to the driver output pins as possible Figure 2 Recommended application schematic for the PLRXPL-VE-SG4-62-x transceiver ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 6 2.1 Technical data Technical data related to the RoHS-Compliant 4.25 Gbps 850 nm eSFP Transceivers includes: • Section 2.2 Pin function definitions below • Section 2.3 Absolute maximum ratings on page 8 • Section 2.4 Electrical characteristics on page 8 • Section 2.5 Optical characteristic on page 10 • Section 2.6 Link length on page 11 • Section 2.7 Regulatory compliance on page 12 • Section 2.8 PCB layout on page 13 • Section 2.9 Front panel opening on page 14 • Section 2.10 Module outline on page 14 • Section 2.11 Transceiver belly-to-belly mounting on page 15 2.2 Pin function definitions Figure 3 Transceiver pin descriptions ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 7 Table 2 Transceiver pin descriptions Pin Number Symbol Name Description Receiver 8 LOS Loss of Signal Out (OC) 9, 10, 11, 14 12 VeeR RD- Receiver Signal Ground Receiver Negative DATA Out (PECL) 13 RD+ Receiver Positive DATA Out (PECL) 15 VccR Receiver Power Supply 7 Rate Rate Select (LVTTL) Sufficient optical signal for potential BER < 1x10-12 = Logic “0” Insufficient optical signal for potential BER < 1x10-12 = Logic “1” This pin is open collector compatible, and should be pulled up to Host Vcc with a 10 kΩ resistor. These pins should be connected to signal ground on the host board. Light on = Logic “0” Output Receiver DATA output is internally AC coupled and series terminated with a 50 Ω resistor. Light on = Logic “1” Output Receiver DATA output is internally AC coupled and series terminated with a 50 Ω resistor. This pin should be connected to a filtered +3.3V power supply on the host board. See Application schematics on page 5 for filtering suggestions. This pin should be connected to the auto-negotiation rate select function Logic “1” and -N part numbers = 4.25Gbps/2.125Gbps Logic “0” = 2.125Gbps/1.25Gbps Transmitter 3 TX Disable Transmitter Disable In (LVTTL) 1, 17, 20 2 VeeT TX Fault Transmitter Signal Ground Transmitter Fault Out (OC) 16 VccT Transmitter Power Supply 18 TD+ Transmitter Positive DATA In (PECL) 19 TD- Transmitter Negative DATA In (PECL) Module Definition 6, 5, 4 MOD_DEF(0:2) Module Definition Identifiers Logic “1” Input (or no connection) = Laser off Logic “0” Input = Laser on This pin is internally pulled up to VccT with a 10 kΩ resistor. These pins should be connected to signal ground on the host board. Logic “1” Output = Laser Fault (Laser off before t_fault) Logic “0” Output = Normal Operation This pin is open collector compatible, and should be pulled up to Host Vcc with a 10 kΩ resistor. This pin should be connected to a filtered +3.3V power supply on the host board. See Application schematics on page 5 for filtering suggestions. Logic “1” Input = Light on Transmitter DATA inputs are internally AC coupled and terminated with a differential 100 Ω resistor. Logic “0” Input = Light on Transmitter DATA inputs are internally AC coupled and terminated with a differential 100 Ω resistor. Serial ID with SFF 8472 Diagnostics (See section 3.1) Module Definition pins should be pulled up to Host Vcc with 10 kΩ resistors. ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 8 2.3 Absolute maximum ratings Parameter Symbol Ratings Unit Storage temperature Operating case temperature Power supply voltage Transmitter differential input voltage Relative humidity Tst Tc Vcc VD RH -40 to +95 -20 to +85 0 to +4.0 2.5 5 to 95 ˚C ˚C VP-P V % 2.4 Electrical characteristics Parameter Symbol Min Typical Max Unit Notes Supply voltage Data rate Transmitter Supply current Data input voltage swing Data input rise/fall time Vcc 2.97 1.0 3.3 2.125 3.63 4.25 V Gbps BER < 1x10-12 40 800 70 2200 80 mA mVp-p ps ICCT VTDp-p 250 40 Data input rise/fall time 40 175 ps Data input rise/fall time 40 350 ps Data input skew Data input deterministic jitter Data input deterministic jitter Data input deterministic jitter Data input total jitter DJ DJ DJ TJ 20 0.12 0.14 0.14 0.25 ps UI UI UI UI Data input total jitter TJ 0.26 UI Data input total jitter TJ 0.26 UI Transmit disable voltage level VIH VIL Vcc 0.8 V V Transmit disable/enable assert time TTD TTEN 10 1 µs ms Transmit fault output voltage level Transmit fault assert and reset times VOH VOL TFault TReset Vcc 0.5 100 V V µs µs Initialization time TINI 300 ms Vcc -1.0 0 Vcc -0.5 0 10 Differential, peak to peak 20% - 80%, differential 4 GBd operation 3 20% - 80%, differential 2 GBd operation 3 20% - 80%, differential 1 GBd operation only 3 ±K28.5 pattern, δT, @ 1.062 Gbps 1, 5 ±K28.5 pattern, δT, @ 2.125 Gbps 1, 5 ±K28.5 pattern, δT, @ 4.25 Gbps 1, 5 27-1 pattern, δT, BER < 1x10-12, @ 1.062 Gbps 1, 5 27-1 pattern, δT, BER < 1x10-12, @ 2.125Gbps 1, 5 27-1 pattern, δT, BER < 1x10-12, @ 4.25 Gbps 1, 5 Laser output disabled after TTD if input level is VIH; laser output enabled after TTEN if input level is VIL Laser output disabled after TTD if input level is VIH; laser output enabled after TTEN if input level is VIL Transmit fault level is VOH and Laser output disabled TFault after laser fault. Transmitter fault is VOL and Laser output restored TINI after transmitter disable is asserted for TReset, then disabled. After hot plug or Vcc ≥ 2.97V ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 9 2.4 Electrical characteristics Parameter Symbol (continued) Min Typical Max Unit 600 85 720 80 mA mVp-p ps ps UI UI UI UI Receiver Supply current Data output voltage swing Data output rise/fall time Data output skew Data output deterministic jitter Data output deterministic jitter Data output deterministic jitter Total jitter DJ DJ DJ TJ 120 1300 120 40 0.36 0.39 0.39 0.61 Total jitter Total jitter Loss of signal voltage level TJ TJ VOH Vcc -0.5 0.64 0.64 Vcc UI UI V VOL 0 0.5 V TLOSA 100 µs TLOSD 100 µs Loss of signal assert/deassert time ICCR Notes RLOAD = 100 Ω, differential 20% - 80%, differential RLOAD = 100 Ω, differential ±K28.5 pattern, δR, @ 1.062 Gbps 1, 9 ±K28.5 pattern, δR, @ 2.125 Gbps 1, 5 ±K28.5 pattern, δR, @ 4.25 Gbps 1, 5 27-1 pattern, δR , BER < 1x10-12 @ 1.062 Gbps 1, 5 27-1 pattern, δR , @ 2.125 Gbps 1, 5 27-1 pattern, δR , @ 4.25 Gbps 1, 5 LOS output level VOL TLOSD after light input > LOSD 2 LOS output level VOH TLOSA after light input < LOSA 2 LOS output level VOL TLOSD after light input > LOSD 2 LOS output level VOH TLOSA after light input < LOSA 2 ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 10 2.5 Optical characteristics Parameter Transmitter Wavelength RMS spectral width Average optical power Optical output rise/fall time Optical modulation amplitude Deterministic jitter Deterministic jitter Deterministic jitter Total jitter Total jitter Total jitter Relative intensity noise Receiver Wavelength Maximum input power Sensitivity (OMA) Stressed Sensitivity (OMA) SS1 Stressed Sensitivity (OMA) SS2 Stressed Sensitivity (OMA) SS4 Loss of signal assert/deassert level Low frequency cutoff Symbol Min Typical Max Unit λp Δλ PAVG trise/fall OMA DJ DJ DJ TJ TJ TJ RIN 840 850 0.5 -125 860 0.85 -2.5 90 1125 0.21 0.26 0.26 0.43 0.44 0.44 -118 nm nm dBm ps µW UI UI UI UI UI UI dB/Hz 850 860 18 31 nm dBm µWp-p 25 49 61 λ Pm S1 S2 S4 ISI = 0.96dB ISI = 2.18dB ISI = 1.26dB ISI = 2.03dB ISI = 1.67dB ISI = 2.14dB LOSD LOSA FC -9 250 770 0 55 67 96 109 138 148 -17 -30 0.2 0.3 µWp-p µWp-p µWp-p µWp-p µWp-p µWp-p µWp-p µWp-p dBm dBm MHz Notes 20% - 80% ±K28.5 pattern, γT, @ 1.062 Gbps 1, 5 ±K28.5 pattern, γT, @ 2.125 Gbps 1, 5 ±K28.5 pattern, γT, @ 4.25 Gbps 1, 5 27-1 pattern, γT, @ 1.062 Gbps 1, 5 27-1 pattern, γT, @ 2.125 Gbps 1, 5 27-1 pattern, γT, @ 4.25 Gbps 1, 5 12 dB reflection 1 Gbps operation, maximum is equivalent to -17dBm @9dB ER 2 Gbps operation 4 Gbps operation 1G operation 1G operation 2G operation 2G operation 4G operation 4G operation Chatter free operation Chatter free operation -3 dB, P<-16 dBm ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 11 2.6 Link length Data Rate / Standard Fiber Type Modal Bandwidth @ 850 nm (MHz*km) Distance Range (m) Notes 1.0625 GBd Fibre Channel 100-M5-SN-I 100-M6-SN-I 62.5/125 µm MMF 50/125 µm MMF 50/125 µm MMF 50/125 µm MMF 50/125 µm MMF 62.5/125 µm MMF 50/125 µm MMF 50/125 µm MMF 50/125 µm MMF 50/125 µm MMF 62.5/125 µm MMF 50/125 µm MMF 50/125 µm MMF 50/125 µm MMF 50/125 µm MMF 200 500 900 1500 2000 200 500 900 1500 2000 200 500 900 1500 2000 2 to 300 2 to 500 2 to 630 2 to 755 2 to 860 2 to 150 2 to 300 2 to 350 2 to 430 2 to 500 2 to 70 2 to 150 2 to 175 2 to 215 2 to 270 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 2.125 GBd Fibre Channel 200-M5-SN-I, 200-M6-SN-I 4.25 GBd Fibre Channel 200-M5-SN-I, 200-M6-SN-I Specification notes 1. UI (Unit Interval): one UI is equal to one bit time. For example, 2.125 Gbits/s corresponds to a UI of 470.588ps. 2. For LOSA and LOSD definitions see Loss of Signal Assert/Deassert Level in Section 2.5 Optical characteristics on page 10. 3. When operating the transceiver at 1.0 - 1.3 Gbaud only, a slower input rise and fall time is acceptable. If it is planned to operate the module in the 1.0 - 4.25 Gbaud range, faster input rise and fall times are required. 4. Measured with stressed eye pattern as per FC-PI (Fibre Channel) using the worst case specifications. 5. All jitter measurements performed with worst case input jitter according to FC-PI. 6. Distances, shown in the “Link Length” table, are the distances specified in the Fibre Channel standards. “Link Length” distances are calculated for worst case fiber and transceiver characteristics based on the optical and electrical specifications shown in this document using techniques utilized in IEEE 802.3 (Gigabit Ethernet). In the nominal case, longer distances are achievable. ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 12 2.7 Regulatory compliance The PLRXPL-VE-SG4-62-x complies with common ESD, EMI, Immunity, and Component recognition requirements and specification (see details in Table 3 on page 12). The PLRXPL-VE-SG4-62-x is lead-free and RoHS-compliant per Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003 on the restriction of the use of certain hazardous substances in electrical and electronic equipment. ESD, EMI, and Immunity are dependent on the overall system design. Information included herein is intended as a figure of merit for designers to use as a basis for design decisions. Table 3 Regulatory compliance Feature Test Method Performance Component safety UL 60950 UL94-V0 IEC 60950 Directive 2002/95/EC UL File E209897 TUV Report/Certificate (CB scheme) Lead-free and RoHS-compliant Laser eye safety Electromagnetic Compatibility (EMC) CE Electromagnetic emmissions U.S. 21CFR (J) 1040.10 EN 60825 ESD immunity EU Declaration of Conformity EMC Directive 89/336/EEC FCC CFR47 Part 15 IEC/CISPR 22 AS/NZS CISPR22 EN 55022 ICES-003, Issue 4 VCCI-03 EMC Directive 89/336/EEC IEC /CISPR/24 EN 55024 EN 61000-4-2 Radiated immunity EN 61000-4-3 Electromagnetic immunity Compliant per the Directive 2002/95/EC of the European Parliament and of the Council of 27 January 2003 on the restriction of the use of certain hazardous substances in electrical and electronic equipment CDRH compliant and Class 1 laser safety. TUV Certificate Compliant with European EMC and Safety Standards Noise frequency range: 30 MHz to 12 GHz. Good system EMC design practice required to achieve Class B margins. Exceeds requirements. Withstand discharges of; 8 kV contact, 15kV and 25kV Air Exceeds requirements. Field strength of 10 V/m RMS, from 10 MHz to 1 GHz. No effect on transceiver performance is detectable between these limits. ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 13 2.8 PCB layout NOTES: 34.50 1. DATUM AND BASIC DIMENSIONS ESTABLISHED BY CUSTOMER. 2X 30 A 2. PADS AND VIAS ARE CHASSIS GROUND 11 PLACES 20 3X 10 CROSS-HATCHED AREA DENOTES COMPONENT AND TRACE KEEPOUT (EXCEPT CHASSIS GROUND) 1 3. THRU HOLES, PLATING OPTIONAL 2X 7.20 B 0.85±0.05 2 (MARKED "S") 0.1 A B 2X 2.50 2X 2.50 11.9 1 5. ALL DIMENSIONS ARE IN MILLIMETERS C D 3.68 1.70 A 16.25 4. HOLES DENOTED WITH 'A' ARE NOT REQUIRED WITH PICOLIGHT CAGES (6 PLACES) 3X 7.10 14.25 TYP 11.08 8.48 A 5.68 8.58 11.93 A B 9.60 A 4.80 A A 1.70 2 TYP 2 2 10X 0.1 1.05±0.05 L A C 9X 0.95±0.05 3 (MARKED "G") 0.1 L A C 5 26.80 10 3 PLACES THIS AREA DENOTES COMPONENT KEEP-OUT (TRACES ALLOWED) 41.30 42.30 Figure 4 Board layout 10X 5 10X 3.20 G 2X 0.90 G S G G 10.93 10.53 11.93 9.60 G 9X 0.8 9X 0.8 G G G G 2X 1.55±0.05 0.1 L C D Figure 5 Detail layout ALL DIMENSIONS ARE IN MILLIMETERS 20X 0.50±0.03 0.06 C D 2±0.05 TYP 0.06 L C D ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 14 2.9 Front panel opening Figure 6 2.10 Figure 7 Module outline ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 15 2.11 Transceiver belly-to-belly mounting 6X .600±.004 4X .640±.004 .135 6X .41±.00 .074 All dimensions in inches Section 3 .138 Related Information Other information related to the RoHS-Compliant 4.25 Gbps 850 nm eSFP Transceivers includes: • Section 3.1 Digital Diagnostic Monitoring and Serial ID Operation below • Section 3.2 Package and handling instructions on page 21 • Section 3.3 ESD Discharge (ESD) on page 21 • Section 3.4 Eye safety on page 21 3.1 Digital Diagnostic Monitoring and Serial ID Operation The PLRXPL-VE-SG4-62-x is equipped with a 2-wire serial EEPROM that is used to store specific information about the type/identification of the transceiver as well as real-time digitized information relating to the transceiver’s performance. See the Small Form Factor Commitee’s document number SFF-8472 Rev 9.5, dated June 1, 2004 for memory/address organization of the identification and digital diagnostic data. The enhanced digital diagnostics feature monitors five key transceiver parameters which are Internally Calibrated and should be read as absolute values and interpreted as follows; Transceiver Temperature in degrees Celsius: Internally measured. Represented as a 16 bit signed two’s complement value in increments of 1/256 degrees Celsius from -40 to +125°C with LSB equal to 1/256 degrees C. Accuracy is ± 3 degrees Celsius over the specified operating temperature and voltage range. ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 16 Vcc/Supply Voltage in Volts: Internally measured. Represented as a 16 bit unsigned integer with the voltage defined as the full 16 bit value(0-65535) with LSB equal to 100μV with a measurement range of 0 to +6.55V. Accuracy is ± 3% of nominal value over the specified operating temperature and voltage ranges. TX Bias Current in μA: Represented as a 16 bit unsigned integer with current defined as the full 16 bit value(0-65535) with LSB equal to 2μA with a measurement range of 0 - 131μA. Accuracy is ± 10% of nominal value over the specified operating temperature and voltage ranges. TX Output Power in mW: Represented as a 16 bit unsigned integer with the power defined as the full 16 bit value (0-65535) with LSB equal to 0.1μW. Accuracy is ± 2dB over the specified temperature and voltage ranges over the range of 100μW to 800μW( -10dBm to -1dBm). Data is not valid when transmitter is disabled. RX Received Optical Power in mW: Represented as average power as a 16 bit unsigned integer with the power defined as the full 16 bit value(0-65535) with LSB equal to 0.1μW. Accuracy is ± 3dB over the specified temperature and voltage ranges over the power range of 30μW to 1000μW (-15dBm to 0dBm). Reading the data The information is accessed through the MOD_DEF(1), and MOD_DEF(2) connector pins of the module. The specification for this EEPROM (ATMEL AT24CO1A family) contains all the timing and addressing information required for accessing the data. The device address used to read the Serial ID data is 1010000X(A0h), and the address to read the diagnostic data is 1010001X(A2h). Any other device addresses will be ignored. Refer to Table 4, Table 5, and Table 6 for information regarding addresses and data field descriptions MOD_DEF(0), pin 6 on the transceiver, is connected to Logic 0 (Ground) on the transceiver. MOD_DEF(1), pin 5 on the transceiver, is connected to the SCL pin of the EEPROM. MOD_DEF(2), pin 4 on the transceiver, is connected to the SDA pin of the EEPROM. The EEPROM WP pin is internally tied to ground with no external access, allowing write access to the customer-writable field(bytes 128-247 of address 1010001X). Note: address bytes 0-127 are not write protected and may cause diagnostic malfunctions if written over. Decoding the data The information stored in the EEPROM including organization is defined in the Small Form-Factor document SFF-8472 draft rev 9.5, dated June 1, 2004. ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 17 Table 4 Data Field Descriptions Address(1010000X)(A0h) 0 Address(1010001X)(A2h) 0 Serial ID Information; Defined by SFP MSA 55 95 95 JDSU Specific Information 127 119 127 Alarm and Warning Limits Reserved for External Calibration Constants Real Time Diagnostic Information JDSU Specific Information Non-volatile, customerwriteable, field-writeable area Reserved for SFP MSA 247 255 255 JDSU Specific Information ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 18 Table 5 Serial ID Data and Map Memory Address Address (1010000X)(A0h) 0 1 2 3-10 11 12 13 14 15 16 17 18 19 20-35 36 37-39 40-55 56-59 60-61 62 63 64 65 Value Comments 03 04 07 0000000020400C15 01 2A 00 00 00 0F 07 00 00 JDSU 00 000485 SFP Transceiver SFP with Serial ID LC Connector 850nm multimode, 100/200/400 FC, Intermediate Distance 8B10B encoding mechanism Nominal Bit rate of 4Gbps Reserved Single mode fiber not supported Single mode fiber not supported 150 meters of 50/125 μm fiber 70 meters of 62.5/125 μm fiber Copper not supported Reserved Vendor Name (ASCII) Reserved IEEE Company ID (ASCII) Part Number (ASCII) Rev of part number (ASCII) Wavelength of laser in nm; 850 Reserved Check Code; Lower 8 bits of sum from byte 0 through 62 Reserved Rate Select, Tx_Disable, Tx Fault, Loss of Signal implemented; -62 part numbers Tx_Disable, Tx Fault, Loss of Signal implemented; 62-N part numbers 0352 00 3A 65 1A 66 67 68-83 84-91 92 00 00 68 93 FO F8 94 95 96-127 128-255 01 64_94 Serial Number (ASCII) Date Code (ASCII) Digital diagnostics monitoring implemented, interally calibrated, receiver power type is average Alarms & Warnings, TX_Fault and Rx_LOS monitoring implemented, TX_Disable Control & Monitoring. -62-N part number Alarms & Warnings, TX_Fault and Rx_LOS monitoring implemented, TX_Disable Control & Monitoring, Rate Select. -62 part number SFF-8472 Rev 9.4 compliant Check Code; Lower 8 bits of sum from byte 64 through 94 JDSU specific EEPROM Reserved ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 19 Table 6 Diagnostics Data Map Memory Address Value Comments Address (1010001X)(A2h) 00-01 02-03 04-05 06-07 08-09 10-11 12-13 14-15 16-17 18-19 20-21 22-23 24-25 26-27 28-29 30-31 32-33 34-35 36-37 38-39 40-55 56-59 60-63 64-67 68-71 72-75 76-77 78-79 80-81 82-83 84-85 86-87 88-89 90-91 92-94 95 96 97 98 99 100 Temp High Alarm Temp Low Alarm Temp High Warning Temp Low Warning Voltage High Alarm Voltage Low Alarm Voltage High Warning Voltage Low Warning Bias High Alarm Bias Low Alarm Bias High Warning Bias Low Warning TX Power High Alarm TX Power Low Alarm TX Power High Warning Tx Power Low Warning RX Power High Alarm RX Power Low Alarm RX Power High Warning RX Power Low Warning Reserved RP4 RP3 RP2 RP1 RP0 Islope Ioffset TPslope TPoffset Tslope Toffset Vslope Voffset Reserved Checksum Temperature MSB Temperature LSB Vcc MSB Vcc LSB TX Bias MSB MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address MSB at low address For future monitoring quantities External Calibration Constant External Calibration Constant External Calibration Constant External Calibration Constant External Calibration Constant External Calibration Constant External Calibration Constant External Calibration Constant External Calibration Constant External Calibration Constant External Calibration Constant External Calibration Constant External Calibration Constant Reserved Low order 8 bits of sum from 0-94 Internal temperature AD values Internally measured supply voltage AD values TX Bias Current AD values ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 20 Table 6 Diagnostics Data Map (continued) Memory Address Value Address (1010001X)(A2h) 101 102 103 104 105 106 107 108 109 110-7 110-6 110-5 110-4 110-3 TX Bias LSB TX Power MSB TX Power LSB RX Power MSB RX Power LSB Reserved MSB Reserved LSB Reserved MSB Reserved LSB Tx Disable State Soft Tx Disable Control Reserved Rate Select State Soft Rate Select Control 110-2 110-1 110-0 111 112-119 120-127 128-247 248-255 Tx Fault State LOS State Data Ready State Reserved Optional alarm & warning flag bits Vendor specific User/Customer EEPROM Vendor specific Comments Measured TX output power AD values Measured RX input power AD values For 1st future definition of digitized analog input For 2nd future definition of digitized analog input Digital State of Tx Disable Pin Writing “1” disables laser, this is OR’d with Tx_Disable pin Digital State of Rate Select Pin Writing “1” selects high bandwidth. This is OR’d with the hardware rate select pin.i Digital State Digital State Digital State; “1” until trasnceiver is ready Reserved Refer to SFF-8472 rev 9.5 Vendor specific Field writeable EEPROM Vendor specific * During Tx disable, Tx bias and Tx power will not be monitored. Alarm and warning are latched. The flag registers are cleared when the system (Reads) AND (the alarm/warning condition no longer exists) ROHS-COMPLIANT 4.25 GBPS 850 NM TRANSCEIVERS 21 3.2 Package and handling instructions Process plug The PLRXPL-VE-SG4-62-x is supplied with a dust cover. This plug protects the transceiver’s optics during standard manufacturing processes by preventing contamination from air borne particles. Note: It is recommended that the dust cover remain in the transceiver whenever an optical fiber connector is not inserted. Recommended cleaning and de-greasing chemicals JDSU recommends the use of methyl, isopropyl and isobutyl alcohols for cleaning. Do not use halogenated hydrocarbons (e.g. trichloroethane, ketones such as acetone, chloroform, ethyl acetate, MEK, methylene chloride, methylene dichloride, phenol, N-methylpyrolldone). Flammability The PLRXPL-VE-SG4-62-x housing is made of cast zinc and sheet metal. 3.3 ESD Discharge (ESD) Handling Normal ESD precautions are required during the handling of this module. This transceiver is shipped in ESD protective packaging. It should be removed from the packaging and handled only in an ESD protected environment utilizing standard grounded benches, floor mats, and wrist straps. Test and operation In most applications, the optical connector will protrude through the system chassis and be subjected to the same ESD environment as the system. Once properly installed in the system, this transceiver should meet and exceed common ESD testing practices and fulfill system ESD requirements. Typical of optical transceivers, this module’s receiver contains a highly sensitive optical detector and amplifier which may become temporarily saturated during an ESD strike. This could result in a short burst of bit errors. Such an event might require that the application re-acquire synchronization at the higher layers (e.g. Serializer/Deserializer chip). 3.4 Eye safety The PLRXPL-VE-SG4-62-x is an international Class 1 laser product per IEC 825, and per CDRH, 21 CFR 1040 Laser Safety Requirements. The PLRXPL-VE-SG462-x is an eye safe device when operated within the limits of this specification. Operating this product in a manner inconsistent with intended usage and specification may result in hazardous radiation exposure. ROHS-COMPLIANT 4.25 GBPS 1310NM TRANSCEIVERS Caution Tampering with this laser based product or operating this product outside the limits of this specification may be considered an act of “manufacturing,” and will require, under law, recertification of the modified product with the U.S. Food and Drug Administration (21 CFR 1040). Order Information For more information on this or other products and their availability, please contact your local JDSU account manager or JDSU directly at 1-800-498-JDSU (5378) in North America and +800-5378-JDSU worldwide or via e-mail at [email protected]. Sample: PLRXPL-VE-SG4-62 Part Number PLRXPL-VE-SG4-62 PLRXPL-VE-SG4-62-N Temp. Range -20 to 85˚C -20 to 85˚C NORTH AMERICA: 800 498-JDSU (5378) Power Supply Tolerance ±10% ±10% WORLDWIDE: +800 5378-JDSU Rate Select X Digital Diagnostics X X WEBSITE: www.jdsu.com Product specifications and descriptions in this document subject to change without notice. © 2007 JDS Uniphase Corporation 30149156 Rev. 000 08/07 PLRXPL-VE-SG4-62-x.DS.CMS.AE August 2007