MICREL SM802109UMG

SM802109
ClockWorks™ PCI-e Quad 100MHz
Ultra-Low Jitter, HCSL
Frequency Synthesizer
General Description
Features
The SM802109 is a member of the ClockWorks™ family of
devices from Micrel and provides an extremely low-noise
timing solution for PCI-Express clock signals. It is based
on a unique patented RotaryWave® architecture that
provides very-low phase noise.
The device operates from a 3.3V or 2.5V power supply
and synthesizes four HCSL output clocks at 100MHz. The
SM802109 accepts a 25MHz crystal or LVCMOS
reference clock.
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
• Generates four HCSL clock outputs at 100MHz
• 2.5V or 3.3V operating range
• Typical phase jitter @ 100MHz
(1.875MHz to 20MHz): 105fs
• Industrial temperature range (–40°C to +85°C)
• Green, RoHS, and PFOS compliant
• Available in 24-pin 4mm × 4mm QFN package
Applications
• PCI-Express
Block Diagram
ClockWorks is a trademark of Micrel, Inc
RotaryWave is a registered trademark of Multigig, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
September 2011
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SM802109
Ordering Information(1)
Part Number
Marking
Shipping
Temperature Range
Package
SM802109UMG
802109
Tube
–40°C to +85°C
24-Pin QFN
SM802109UMGTR
802109
Tape and Reel
–40°C to +85°C
24-Pin QFN
Note:
1. Devices are Green, RoHS, and PFOS compliant.
Pin Configuration
24-Pin QFN
(Top View)
Pin Description
Pin Number
Pin Name
16, 17
/Q0, Q0
Pin Type
Pin Level
Pin Function
20, 21
/Q1, Q1
O, (DIF)
HCSL
Differential Clock Outputs from Bank 1 100MHz
23, 24
/Q2, Q2
3, 4
/Q3, Q3
O, (DIF)
HCSL
Differential Clock Outputs from Bank 2 100MHz
1
VDDO2
PWR
Power Supply for Output Bank 2
2
VSSO2
PWR
Power Supply Ground for Output Bank 2
PLL Bypass, Selects Output Source
5
PLL_BYPASS
I, (SE)
LVCMOS
0 = Normal PLL Operation
1 = Output from Input Reference Clock or Crystal
45KΩ pulldown
6
September 2011
XTAL_SEL
I, (SE)
LVCMOS
2
Selects PLL Input Reference Source
0 = REF_IN, 1 = XTAL, 45KΩ pullup
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SM802109
Pin Description (Continued)
Pin Number
Pin Name
7, 12, 15, 19
TEST
8
VDD
13, 14
Pin Type
Pin Level
Pin Function
Factory Test pins, Do not connect anything to these
pins.
VSS
(Exposed Pad)
PWR
Core Power Supply
PWR
Core Power Supply Ground. The exposed pad must
be connected to the VSS ground plane.
18
VDDO1
PWR
Power Supply for Output Bank 1
22
VSSO1
PWR
Power Supply Ground for Output Bank 1
9
REF_IN
I, (SE)
LVCMOS
10
XTAL_IN
I, (SE)
Crystal
Crystal Reference Input, no load caps needed (see
Figure 5).
11
XTAL_OUT
O, (SE)
Crystal
Crystal Reference Output, no load caps needed (see
Figure 5).
Reference Clock Input
Truth Table
PLL_BYPASS
XTAL_SEL
INPUT
OUTPUT
0
−
−
PLL
1
−
−
XTAL/REF_IN
−
0
REF_IN
−
−
1
XTAL
−
September 2011
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SM802109
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VDD, VDDO1/2) ......................................+4.6V
Input Voltage (VIN) .............................. −0.50V to VDD + 0.5V
Lead Temperature (soldering, 20s)............................ 260°C
Case Temperature ..................................................... 115°C
Storage Temperature (Ts) ......................... −65°C to +150°C
Supply Voltage (VDD, VDDO1/2)............... +2.375V to +3.465V
Ambient Temperature (TA).......................... –40°C to +85°C
Junction Thermal Resistance(3)
QFN (θJA)
Still-Air......................................................... 50°C/W
QFN (ψJB)
Junction-to-Board ....................................... 30°C/W
DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C.
Symbol
Parameter
VDD, VDDO1/2
Condition
Min.
Typ.
Max.
Units
2.5V Operating Voltage
2.375
2.5
2.625
V
VDD, VDDO1/2
3.3V Operating Voltage
3.135
3.3
3.465
V
IDD
REF_IN
Supply current VDD + VDDO
XTAL_SEL = 0
Outputs 50Ω to VSS
140
175
mA
IDD
XTAL
Supply current VDD + VDDO
XTAL_SEL = 1
Outputs 50Ω to VSS
150
185
mA
Min
Typ.
Max.
Units
HCSL DC Electrical Characteristics(4)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C. RL = 50Ω to VSS
Symbol
Parameter
Condition
VOH
Output High Voltage
660
700
850
mV
VOL
Output Low Voltage
-150
0
27
mV
VCROSS
Crossing Point Voltage
250
350
550
mV
Notes:
1.
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
2.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3.
Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
4.
The circuit is designed to meet the AC and DC specifications shown in the above table(s) after thermal equilibrium has been established.
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SM802109
LVCMOS (PLL_BYPASS, XTAL_SEL) DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C.
Symbol
Parameter
Condition
VIH
Input High Voltage
VIL
Input Low Voltage
IIH
Input High Current
VDD = VIN = 3.465V
IIL
Input Low Current
VDD = 3.465V, VIN = 0V
Min.
Typ.
Max.
Units
2
VDD + 0.3
V
−0.3
0.8
V
150
μA
−150
μA
REF_IN DC Electrical Characteristics(4)
VDD = 3.3V ±5%, or 2.5V ±5%, TA = −40°C to +85°C.
Symbol
Parameter
VIH
Input High Voltage
VIL
Input Low Voltage
IIN
Input Current
Condition
Min.
XTAL_SEL = VIL, VIN = 0V to VDD
Max.
Units
1.1
VDD + 0.3
V
−0.3
0.6
V
−5
5
μA
XTAL_SEL = VIH, VIN = VDD
Typ.
20
µA
Crystal Characteristics
Parameter
Condition
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitor, C0
10pF to 12pF Load
Min.
Max.
Units
Fundamental, Parallel Resonant
25
Correlation Drive Level
September 2011
Typ.
5
1
50
5
MHz
Ω
pF
10
100
µW
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SM802109
AC Electrical Characteristics(4, 5)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = −40°C to +85°C. RL = 50Ω to VSS
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
FOUT
Output Frequency
100
MHz
FREF
Reference Input Frequency
25
MHz
TR/TF
LVPECL Output Rise/Fall Time
ODC
Output Duty Cycle
TSKEW
Output-to-Output Skew
TLOCK
PLL Lock Time
Tjit(∅)
RMS Phase Jitter
(7)
Spurious Noise Components
20% – 80%
150
300
450
ps
48
50
52
%
Note 6
45
ps
20
ms
100MHz
Integration Range (1.875MHz – 20MHz)
Integration Range (12kHz – 20MHz)
105
250
fs
25MHz
−95
dBc
Notes:
5.
All phase noise measurements were taken with an Agilent 5052B phase noise system.
6.
Defined as skew between outputs at the same supply voltage and with equal load conditions; measured at the output differential crossing points.
7.
Measured using 25MHz crystal as the input reference source. If using an external reference input, use a low phase noise source. With an external
reference, the phase noise will follow the input source phase noise up to about 1MHz.
September 2011
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SM802109
Application Information
HCSL Outputs
HCSL outputs are to be terminated with 50Ω to VSS. For
best performance load all outputs. If you want to ACcouple or change the termination, contact Micrel’s
application group: [email protected]
Input Reference
When operating with a crystal input reference, do not
apply a switching signal to REF_IN.
Crystal Layout
Keep the layers under the crystal as open as possible
and do not place switching signals or noisy supplies
under the crystal.
Crystal load capacitance is built inside the die so no
external capacitance is needed. See the Selecting a
Quartz crystal for the Clockworks Flex I Family of
Precision Synthesizers application note for further
details.
Contact Micrel’s HBW applications group if you need
assistance on selecting a suitable crystal for your
application at: [email protected]
September 2011
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SM802109
Phase Noise Plots
Phase Noise Plot: 100MHz, 1.875MHz − 20MHz 104fS
Phase Noise Plot: 100MHz, 12kHz − 20MHz 242fS
September 2011
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SM802109
Figure 1. Duty Cycle Timing
Figure 2. All Outputs Rise/Fall Time
Figure 3. RMS Phase/Noise Jitter
September 2011
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SM802109
Figure 4. HCSL Output Load and Test Circuit
Figure 5. Crystal Input Interface
September 2011
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SM802109
Package Information
24-Pin Package Type
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant
into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
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indemnify Micrel for any damages resulting from such use or sale.
© 2011 Micrel, Incorporated.
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