SM840001 106.25MHz Ultra-Low Jitter Clock Synthesizer General Description Features The SM840001 synthesizer series were designed for Fibre Channel applications. The device design is optimized for 106.25MHz or 212.5MHz using a 26.5625MHz fundamental parallel resonant crystal, with stability and accuracy over the full operating range. The SM840001 includes a unique power reduction methodology, along with a patented RotaryWaveTM architecture, that provides a stable clock with very low noise for optimized performance. This yields an overall improved Bit Error Rate (BER) and improved waveform integrity. Datasheets and support documentation can be found on Micrel’s web site at: www.micrel.com. • Generates a single LVCMOS/LVTTL output • Integrated loop filter components • RMS Phase Jitter: - 510 fs (typ) at 106.25MHz - 320 fs (typ) at 212.50MHz • Operates with either a 3.3V or 2.5V supply • Power consumption is <77mA @ 3.3 V • Fundamental crystal oscillator interface • Input frequency of 26.5625 MHz parallel resonant • Selectable output frequency: 106.25MHz or 212.5MHz • Temperature range: –40°C to +75°C • Available in 8-pin TSSOP package Applications • Fibre Channel • Storage ___________________________________________________________________________________________________________ Block Diagram RotaryWave is a trademark of Multigig, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com March 2010 M9999-031810-B [email protected] or (408) 955-1690 Micrel, Inc. SM840001 Ordering Information(1) Part Number SM840001KA (2) SM840001KA TR Package Type Operating Range Package Marking Lead Finish K-8 -40°C to +75°C 840001 NiPdAu K-8 -40°C to +75°C 840001 NiPdAu Note: 1. Devices are Green, RoHS-compliant and PFOS-compliant. 2. Tape and Reel. Pin Configuration 8-Pin TSSOP (K-8) Pin Description Pin Number Pin Name Type Level Pin Function 1 VDDA P 2 OE I Pull-up Output Enable: 1 = Enable, 0 = Disable. 3 XTAL OUT O 4 XTAL IN I 5 FSEL I 6 GND P Ground. 7 Q0 O Single Ended LVCMOS Clock Out. 8 VDD P Core Power. Analog Power. Crystal Out. Crystal Input. Pull-down Frequency Select Pin. Frequency Select Table FSEL Output (MHz) 0 106.25 (Default) 1 212.5 Output Enable March 2010 OE Output 0 Disable 1 Enable 2 M9999-031810-B [email protected] or (408) 955-1690 Micrel, Inc. SM840001 Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VDD)...................................................+4.6V Input Voltage (VIN) ................................ –0.50V to VDD+0.5V Output Voltage (VOUT) .......................... –0.50V to VDD+0.5V Lead Temperature (soldering, 20sec.)....................... 260°C Storage Temperature (Ts) .........................–65°C to +150°C Supply Voltage (VIN)............................. +2.375V to +3.465V Ambient Temperature (TA) .......................... –40°C to +75°C Junction Thermal Resistance TSSOP (θJA).....................................................150°C/W DC Electrical Characteristics VDD = 2.5V ±5%; TA = –40°C to +75°C, unless noted. Symbol Parameter Condition Min Typ Max Units VDD Core Supply Voltage 2.375 2.50 2.625 V VDDA Analog Supply Voltage 2.375 2.50 2.625 V IDD Core Supply Current IDDA Analog Supply Current No load 12 20 mA 48 55 mA Min Typ Max Units 3.135 3.30 3.465 V 3.135 3.30 3.465 V 15 22 mA 49 55 mA DC Electrical Characteristics VDD = 3.3V ±5%; TA = -40°C to +75°C, unless noted. Symbol Parameter VDD Core Supply Voltage VDDA Analog Supply Voltage IDD Core Supply Current IDDA Analog Supply Current Condition No load LVCMOS DC Characteristics VDD = 2.5V and 3.3V ±5%; TA = -40°C to +75°C, unless noted. Symbol Parameter VIH Input HIGH Voltage VIL Input LOW Voltage VOH Output HIGH Voltage Max Units VDD = 3.3V ±5% Condition 2 VDD +0.3 V VDD = 2.5V ±5% 1.7 VDD + 0.3 V VDD = 3.3V ±5% -0.30 0.80 V VDD = 2.5V ±5% -0.30 0.70 V VDD = 3.3V ±5% 2.6 V VDD = 2.5V ±5% 1.8 V VOL Output LOW Voltage IIH Input HIGH Current Output Enable input IIL Input LOW Current Output Enable input IIH Input HIGH Current FSEL input IIL Input LOW Current FSEL input Min Typ 0.5 V 5 µA -150 µA 150 -5 µA µA Notes: 1. Exceeding the absolute maximum rating may damage the device. 2. The device is not guaranteed to function outside its operating rating. March 2010 3 M9999-031810-B [email protected] or (408) 955-1690 Micrel, Inc. SM840001 AC Electrical Characteristics VDD = 2.5V and 3.3V ±5%; TA = -40°C to +75°C, unless noted. Symbol Parameter Condition FOUT Output Frequency Min Typ Max Units FSEL=1 186.66 212.5 226.66 MHz FSEL=0 93.33 106.25 113.33 MHz 106.25MHz, tJITTER Integration Range: 637kHz to 10MHz RMS Phase Jitter 212.50MHz Integration Range: 2.55MHz to 20MHz t R / tF Output Rise/Fall Time ODC Output Duty Cycle 510 fs 320 fs 20% to 80% 100 350 ps 106.25MHz 48 52 % 212.50MHz 45 55 % 3.3V Carrier Frequency, 106.25MHz 3.3V Carrier Frequency, 212.5MHz Offset from Carrier Measured Phase Noise Unit Offset from Carrier Measured Phase Noise Unit 100Hz -97 dBc/Hz 100Hz -92 dBc/Hz 1kHz -122 dBc/Hz 1kHz -116 dBc/Hz 10kHz -131 dBc/Hz 10kHz -124 dBc/Hz 100kHz -126 dBc/Hz 100kHz -120 dBc/Hz 1MHz -144 dBc/Hz 1MHz -138 dBc/Hz 10MHz -163 dBc/Hz 10MHz -161 dBc/Hz 40MHz -165 dBc/Hz 40MHz -163 dBc/Hz Crystal Characteristics Parameter Condition Min Mode of Oscillation Typ Max Units Fundamental Parallel Resonant Frequency 26.5625 MHz Equivalent Series Resistance (ESR) 50 Ω Shunt Capacitor 7 pF Drive Level 1 mW March 2010 4 M9999-031810-B [email protected] or (408) 955-1690 Micrel, Inc. SM840001 Functional Description ratios. Output Divider ratios are fixed at either ÷15 or ÷30 controlled via the FSEL pin, and the feedback divider also fixed at ÷120. Duty Cycle is inherently improved and guarantees tight control and stability on this critical specification. The provides improved specifications for Duty Cycle, Jitter, Phase Noise, Power Consumption, and noise sensitivity. Additionally, the SM840001 will operate at either 3.3V or 2.5V supplies. The SM840001 provides a high performance and high accuracy solution for a precision clock source at 106.25 or 212.50MHz derived from a low cost 26.5625MHz Xtal. A single 12mA LVCMOS output is provided with tri state capability, controlled via an external pin (OE). The design of the SM840001 consumes very low power in the PLL due to a patented technology in the VCO and the associated dividers. The VCO range is ~3.2GHz to 3.5GHz providing high resolution and easy integer divide Switching Waveforms RMS Phase Noise/Jitter Phase Noise Plot: 212.5MHz @ 3.3V Phase Noise Plot: 106.25MHz @ 3.3V March 2010 5 M9999-031810-B [email protected] or (408) 955-1690 Micrel, Inc. SM840001 Power Supply Filtering The SM840001 provides separate power supply pins to isolate any high switching noise from outputs to internal core blocks. VDD and VDDA should be individually connected to the power plane through vias. Bypass capacitors should be used for each pin. Figure 2 illustrates how the power supply filter for 3.3V and 2.5V is configured. Crystal Loading Crystal Recommendations This device requires a parallel resonance crystal. Substituting a series resonance crystal will cause this device to operate at the wrong frequency and violate the ppm specifications. To achieve low ppm error, the total capacitance of the crystal must be considered in order to calculate appropriate capacitive loading (CL). Load Capacitance at each side: Trim Capacitance = Ct = (2*CL-(Cb + Cd)) CL: Crystal load capacitance. Defined by manufacturer Ct: External trim capacitors. (Trimmed CL Load capacitance to get the right ppm) Cb: Board capacitance (vias, traces, etc.) Cd: Internal capacitance of the device (lead frame, bond wires, pin, etc.) Figure 2. Equivalent Series Resistance (ESR) Max. Cut Load Cap. Shunt Cap. Max. Drive Max. 50Ω AT 18pF 7pF 0.1m W Crystal Input Interface March 2010 6 M9999-031810-B [email protected] or (408) 955-1690 Micrel, Inc. SM840001 Total capacitance seen by crystal = CL = 1 1 (Ct1 + Cb1 + Cd1) + Example: CL = 18pF, Cb = 2pF, Cd = 4pF Trim Cap = Ct = 2 (18pF) - (2pF +4pF) = 30pF The SM843022 has been characterized with 25MHz, 18pF parallel resonant crystal. The trim capacitors Ct1 and Ct2 were optimized to minimize the ppm error. To minimize the board capacitance, a short trace from pin to crystal footprint without vias is desirable. It is preferable to have ground shielding or distance between the crystal traces and noisy signals on the board. 1 (Ct2 + Cb2 + Cd2) Board Layout March 2010 7 M9999-031810-B [email protected] or (408) 955-1690 Micrel, Inc. SM840001 Package Information 8-Pin TSSOP (K-8) MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2010 Micrel, Incorporated. March 2010 8 M9999-031810-B [email protected] or (408) 955-1690