MICREL SY10EP451LTGTR

SY10/100EP451L
3.3V ECL 6-Bit Differential Register
with Master Reset
General Description
Features
The SY10/100EP451L is a 6-bit fully differential register
with common clock and single-ended Master Reset (MR).
It is ideal for very high frequency applications where a
registered data path is necessary.
All inputs have an internal 75kΩ pull-down resistor.
Differential inputs have an override clamp. Unused
differential register inputs can be left open and will default
LOW. When the differential inputs are forced to a value
smaller than VEE +1.2V, the clamp will override and force
the output to a default state.
The positive transition of CLK (pin 4) will latch the
registers. Master Reset (MR) HIGH will asynchronously
reset all registers forcing Q outputs to go LOW.
Datasheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
•
•
•
•
•
•
•
•
•
450ps typical propagation delay
Maximum frequency > 3.0GHz typical
Asynchronous Master Reset
20ps skew within device, 35ps skew device-to-device
PECL mode operating range:
– VCC = 3.0V to 3.6V with VEE = 0V
NECL mode operating range:
– VCC = 0V with VEE = –3.0V to –3.6V
Open input default state
Safety clamp on inputs
Available in 32-pin TQFP
Applications
• High Speed Logic
• Wireless Communication Systems
• Data Communication Systems
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
May 2007
M9999-051807-B
[email protected] or (408) 955-1690
Micrel, Inc.
SY10/100EP451L
Logic Diagram
May 2007
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SY10/100EP451L
Ordering Information(1)
Part Number
SY10EP451LTG
SY10EP451LTGTR
(2)
SY100EP451LTG
(2)
SY100EP451LTGTR
Package
Type
Operating
Range
Package Marking
Lead
Finish
T32-1
Industrial
SY10EP451LTG with
Pb-Free bar-line indicator
Pb-Free
NiPdAu
T32-1
Industrial
SY10EP451LTG with
Pb-Free bar-line indicator
Pb-Free
NiPdAu
T32-1
Industrial
SY100EP451LTG with
Pb-Free bar-line indicator
Pb-Free
NiPdAu
T32-1
Industrial
SY100EP451LTG with
Pb-Free bar-line indicator
Pb-Free
NiPdAu
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only.
2. Tape and Reel.
Pin Configuration
32-Pin TQFP (T32-1)
May 2007
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SY10/100EP451L
Pin Description
Pin Number
Pin Name
2, 3
D0, /D0
Pin Function
32, 1
D1, /D1
30, 31
D2, /D2
26, 27
D3, /D3
24, 25
D4, /D4
22, 23
D5, /D5
29
MR
4, 5
CLK, /CLK
7, 8
Q0, /Q0
9, 10
Q1, /Q1
11, 12
Q2, /Q2
14, 15
Q3, /Q3
17, 18
Q4, /Q4
20, 21
Q5, /Q5
6, 13, 16
VCC
Positive Supply: Bypass with 0.1µF||0.01µF low ESR capacitors as close to the VCC pins
as possible.
19, 28
VEE
Negative Power Supply: VEE must be tied to most negative supply.
May 2007
ECL Differential Data Inputs: These input pairs are the different data signal inputs to the
device. Each input pin is connected to a 75kΩ pull-down resistor. Due to an internal
clamping circuit, D will default LOW and /D will default HIGH if left open.
ECL Master Reset Input pin. If input pin is left open, it will default to LOW.
ECL Differential Clock Input: This input pair is the clock signal input to the device. Each
input pin is connected to a 75kΩ pull-down resistor. Due to an internal clamping circuit,
CLK will default LOW and /CLK will default HIGH if left open.
ECL Differential Data Outputs: Q defaults to LOW and /Q defaults to HIGH if D inputs are
left open. See “LVPECL Output Interface Applications” section for recommendations on
terminations.
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SY10/100EP451L
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage
PECL Mode (VCC) ............................................................... +4V
NECL Mode (VEE) ............................................................... –4V
Input Voltage (VIN)
PECL Mode ..........................................................................VCC
NECL Mode ......................................................................... VEE
Output Current (IOUT)
Continuous........................................................................ 50mA
Surge............................................................................... 100mA
Lead Temperature (soldering, 20sec.) ....................................260°C
Storage Temperature (Ts)...................................... –65°C to +150°C
Supply Voltage (VCC)
PECL Mode (VEE = 0V) ..................................... +3.0V to +3.6V
Supply Voltage (VEE)
NECL Mode (VCC = 0V)....................................... -3.0V to -3.6V
Ambient Temperature (TA)....................................... –40°C to +85°C
(3)
Junction Thermal Resistance
TQFP
Junction-to-Ambient (θJA)
0lfpm......................................................................... 80°C/W
500lfpm .................................................................... 66°C/W
Junction-to-Case (θJC) .................................................. 20°C/W
PECL 10EP DC Electrical Characteristics(4)
(5)
VCC = 3.3V; VEE = 0V; TA = –40°C to +85°C, unless otherwise stated.
-40°C
Symbol
IEE
Parameter
Min
Typ
80
105
2165
2290
1490
Power Supply Current
(6)
25°C
Max
85°C
Min
Typ
Max
80
105
2415
2230
2355
1615
1430
1555
Max
Units
80
105
mA
2415
2540
mV
1740
mV
Min
Typ
2480
2290
1680
1470
1615
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
1365
VIH
Input HIGH Voltage (Single-Ended)
2090
2415
2155
2480
2215
2540
mV
VIL
Input LOW Voltage (Single-Ended)
1365
1690
1430
1755
1490
1815
mV
VIHCMR
Input HIGH Voltage Common Mode
(7)
Range (Differential Configuration)
2.0
3.3
2.0
3.3
2.0
3.3
V
IIH
Input HIGH Current
150
µA
IIL
Input LOW Current
(6)
150
0.5
150
0.5
0.5
µA
NECL 10EP DC Electrical Characteristics(4)
VCC = 0V; VEE = –3.0V to –3.6V; TA = –40°C to +85°C, unless otherwise stated.
-40°C
Symbol
Parameter
Typ
Max
80
105
-1135
-1010
-885
Output LOW Voltage
-1935
-1810
VIH
Input HIGH Voltage (Single-Ended)
-1210
VIL
Input LOW Voltage (Single-Ended)
-1935
VIHCMR
Input HIGH Voltage Common Mode
(7)
Range (Differential Configuration)
IIH
Input HIGH Current
IIL
Input LOW Current
IEE
Power Supply Current
VOH
Output HIGH Voltage
VOL
(6)
(6)
Min
25°C
Typ
Max
Units
80
105
mA
-1010
-885
-760
mV
-1620
-1830
-1685
-1560
mV
-820
-1085
-760
mV
-1545
-1810
-1485
mV
0.0
V
150
µA
Typ
Max
80
105
-1070
-945
-820
-1685
-1870
-1745
-885
-1145
-1610
-1870
VEE +2.0
0.0
Min
85°C
VEE +2.0
150
0.5
0.0
Min
VEE +2.0
150
0.5
0.5
µA
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guaranteed to function outside its operating rating.
3. θJA and θJC values are determined for a 4-layer board in still-air unless otherwise stated.
4.
5.
6.
7.
The device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse
airflow greater than 500lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding
these conditions is not implied. Device specifications limit values are applied individually under normal operating conditions and not valid simultaneously.
Input and output parameters vary 1:1 with VCC.
All loading with 50Ω to VCC–2.0V.
VIHCMR (min) varies 1:1 with VEE, VIHCMR (max) varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
May 2007
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Micrel, Inc.
SY10/100EP451L
PECL 100EP DC Electrical Characteristics(8)
(9)
VCC = 3.3V; VEE = 0V; TA = –40°C to +85°C, unless otherwise stated.
-40°C
Symbol
IEE
Parameter
Min
Typ
85
120
2155
2280
1480
Power Supply Current
(10)
25°C
Max
85°C
Min
Typ
Max
85
120
2405
2155
2280
1605
1355
1480
Max
Units
85
120
mA
2280
2405
mV
1605
mV
Min
Typ
2405
2155
1605
1355
1480
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
1355
VIH
Input HIGH Voltage (Single-Ended)
2075
2420
2075
2420
2075
2420
mV
VIL
Input LOW Voltage (Single-Ended)
1355
1675
1355
1675
1355
1675
mV
VIHCMR
Input HIGH Voltage Common Mode
(11)
Range (Differential Configuration)
2.0
3.3
2.0
3.3
2.0
3.3
V
IIH
Input HIGH Current
150
µA
IIL
Input LOW Current
(10)
150
0.5
150
0.5
0.5
µA
NECL 100EP DC Electrical Characteristics(8)
VCC = 0V; VEE = –3.0V to –3.6V; TA = –40°C to +85°C, unless otherwise stated.
-40°C
Symbol
IEE
Parameter
Min
Typ
85
120
-1145
-1020
-1820
Power Supply Current
(10)
25°C
Max
85°C
Min
Typ
Max
85
120
-895
-1145
-1020
-1695
-1945
-1820
Max
Units
85
120
mA
-1020
-895
mV
-1695
mV
Min
Typ
-895
-1145
-1695
-1945
-1820
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
-1945
VIH
Input HIGH Voltage (Single-Ended)
-1225
-880
-1225
-880
-1225
-880
mV
VIL
Input LOW Voltage (Single-Ended)
-1945
-1625
-1945
-1625
-1945
-1625
mV
0.0
V
150
µA
(10)
VIHCMR
Input HIGH Voltage Common Mode
(11)
Range (Differential Configuration)
IIH
Input HIGH Current
IIL
Input LOW Current
VEE +2.0
0.0
VEE +2.0
150
0.5
0.0
VEE +2.0
150
0.5
0.5
µA
Notes:
8. The device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with
maintained transverse airflow greater than 500lfpm. Electrical parameters are guaranteed only over the declared operating temperature range.
Functional operation of the device exceeding these conditions is not implied. Device specifications limit values are applied individually under normal
operating conditions and not valid simultaneously.
9. Input and output parameters vary 1:1 with VCC.
10. All loading with 50Ω to VCC–2.0V.
11. VIHCMR (min) varies 1:1 with VEE, VIHCMR (max) varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input
signal.
May 2007
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Micrel, Inc.
SY10/100EP451L
AC Electrical Characteristics(12)
VCC = 0V; VEE = –3.0V to –3.6V or VCC = 3.0V to 3.6V; VEE = 0V; TA = –40°C to +85°C; for 10EP and 100EP, unless
(13)
otherwise stated.
-40°C
Symbol
Parameter
VOUTpp
Output Voltage Amplitude at 3GHz
tPD
Propagation Delay to
Output Differential
tRR
Reset Recovery
tS
(14)
Min
Typ
25°C
Max
Min
Typ
520
650
350
400
450
550
85°C
Max
Min
Typ
450
580
390
440
490
590
Max
Units
540
670
CLK to Q, /Q
MR to Q, /Q
330
380
430
530
MR to CLK
240
100
250
100
260
100
ps
Set-Up Time
D to CLK
80
0
80
0
80
0
ps
tH
Hold Time
CLK to D
80
0
80
0
80
0
ps
tPW
Minimum Pulse Rate
MR
400
530
630
550
650
400
(15)
mV
590
690
400
ps
ps
tSKEW
Within-Device Skew
(16)
Device-to-Device Skew
10
35
40
100
10
35
40
100
10
35
40
100
ps
tJITTER
Clock Random Jitter (RMS)
at ≤3.0GHz
0.2
1
0.2
1
0.2
1
ps
tr, tf
Output Rise/Fall Times
(20% to 80%)
150
250
160
260
180
280
ps
Q, /Q
100
110
130
Notes:
12. The device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with
maintained transverse airflow greater than 500lfpm. Electrical parameters are guaranteed only over the declared operating temperature range.
Functional operation of the device exceeding these conditions is not implied. Device specifications limit values are applied individually under normal
operating conditions and not valid simultaneously.
13. Measured using a 750mV source, 50% duty cycle clock source, all loading with 50Ω to VCC–2V.
14. VOL and VOH specifications not guaranteed for fMAX testing
15. Skew is measured between outputs under identical transitions and conditions on any one device.
16. Device-to-device skew for identical transitions at identical VCC levels.
Input Stage
Figure 1. Simplified Differential Input Buffer
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SY10/100EP451L
Typical Characteristics
VCC = 3.3V, GND = 0V, VIN = 800mV, TA = 25°C; for 10EP and 100EP, unless otherwise stated.
Functional Characteristics
VCC = 3.3V, GND = 0V, VIN = 800mV, TA = 25°C; for 10EP and 100EP, unless otherwise stated.
May 2007
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SY10/100EP451L
LVPECL Output Interface Applications
LVPECL output has very low output impedance (open
emitter), and small signal swing which results in low EMI.
LVPECL is ideal for driving 50Ω and 100Ω controlled
impedance transmission lines. There are several
techniques in terminating the LVPECL output, as shown
in Figures 2 through 4.
Figure 4. Terminating Unused I/O
Notes:
1.
Unused output (/Q) must be terminated to balance the output.
2.
Unused output pairs (Q and /Q) may be left floating.
Figure 2. Parallel Termination-Thevenin Equivalent
Figure 3. Three-Resistor “Y-Termination”
Notes:
1.
Power-saving alternative to Thevenin termination.
2.
Place termination resistors as close to destination inputs as
possible.
3.
Rb resistor sets the DC bias voltage, equal to VCC-2V.
4.
C1 is an optional bypass capacitor intended to compensate for
any tr, tf mismatches.
May 2007
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Micrel, Inc.
SY10/100EP451L
Package Information
32-Pin TQFP (T32-1)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its
use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical
implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user.
A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to
fully indemnify Micrel for any damages resulting from such use or sale.
© 2007 Micrel, Incorporated.
May 2007
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