SY58051U Ultra-Precision CML AnyGate ® with Internal Input and Output Termination Precision Edge® General Description The SY58051U is an ultra-fast, low jitter universal logic gate with a guaranteed maximum data or clock throughput of 10.7Gbps or 7GHz, respectively. This AnyGate® differential logic device will produce many logic functions of two Boolean variables, such as AND, NAND, OR, NOR, DELAY, or NEGATION. The SY58051U differential inputs include a unique internal termination design that allows access to the termination network throughout a VT pin. This feature allows the device to easily interface to different logic standards, both AC- and DC-coupled without external resistor-bias and termination networks. The result is a clean, stub-free, low-jitter interface solution. The differential CML output is optimized for environments with internal 50Ω source termination and a 400mV output swing. The SY58051U operates from a 2.5 or 3.3V supply, and is guaranteed over the full industrial temperature range (-40°C to +85°C). The SY58051U is part of Micrel’s Precision Edge® product family. All support documentation can be found on Micrel’s web site at www.micrel.com. Typical Application Precision Edge® Features • Three matched-delay input pair provide any logic function: AND, NAND, OR, NOR • Guaranteed AC performance over temperature and • voltage: • DC to > 10.7Gbps data rate throughput • DC to > 7GHz clock fMAX • <190ps Any In-to-Out tpd • tr / tf < 60ps • Ultra low-jitter design: • <1psRMS random jitter • <10psPP deterministic jitter • <10psPP total jitter (clock) • Unique input termination and VT pin accepts DCcoupled and AC-coupled inputs (CML, PECL) • Internal 50Ω output source termination • Typical 400mV CML output swing (RIN = 50Ω) • • • • Internal 50Ω input termination Power supply 2.5V ±5% or 3.3V ±10% –40°C to 85°C temperature range Available in a 16-pin (3mm × 3mm) QFN® package Applications • • • • • Data communication systems OC-192, OC192+FEC All SONET OC-3—OC-768 applications All Fibre Channel applications All GigE applications AnyGate and Precision Edge are registered trademarks of Micrel, Inc. MLF and MicroLeadFrame are registered trademarks of Amkor Technology, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com July 2011 M9999-071311U-A [email protected] or (408) 955-1690 Micrel, Inc. SY58051U-A Ordering Information Package Type Operational Range SY58051UMG(3) Pb-free QFN-16 Industrial SY58051UMGTR(2, 3) Pb-free QFN-16 Industrial Part Number July 2011 2 Package Marking 051U with Pb-Free bar-line indicator 051U with Pb-Free bar-line indicator M9999-071311U-A [email protected] or (408) 955-1690 Micrel, Inc. SY58051U-A Pin Configuration 16-Pin QFN® (QFN-16) Pin Description Pin Number Pin Name 1 VT 15, 16 A, /A 2, 3 B, /B 4 VTB Input Termination Center Tap: Each of the two inputs, (B, /B) terminates to this pin through a 50Ω resistor. The VTB pin provides a center-tap to a termination network for maximum interface flexibility. 5, 6 S, /S Differential Input: This input pair is the select input to the device. Each pin of this pair internally terminates to the VTS pin to 50Ω. Note that this input will default to an indeterminate state if left open. See “Input Interface Applications” section for more details. 7 VTS Input Termination Center Tap: Each of the two inputs, S, /S terminates to this pin. The VTS pin provides a center-tap to a termination network for maximum interface flexibility. 8, 13 VCC Positive Power Supply. Bypass with 0.1µF 12, 9 Q, /Q Differential Output: This CML output pair is the output of the device. It is a logic function of the A, B, and S inputs. See “Truth Tables” for details. 10, 11, 14 GND Ground. Exposed pad must be connected to the same potential as GND pin. July 2011 Pin Function Input Termination Center Tap: Each of the two inputs, (A, /A) terminates to this pin through a50Ω resistor. The VTA pin provides a center-tap to a termination network for maximum interface flexibility. See “Input Interface Applications” section for more details. Differential Input: These input pairs are the two data inputs to the device. Each pin of a pair 2, 3 B, /B internally terminates to the VTA or VTB pin to 50Ω. Note that these inputs will default to an indeterminate state if left open. See “Input Interface Applications” section for more details. 3 0.01µF low ESR capacitors. M9999-071311U-A [email protected] or (408) 955-1690 Micrel, Inc. SY58051U-A Truth Tables A /A B /B S /S Q /Q 0 1 X X 0 1 0 1 1 0 X X 0 1 1 0 X X 0 1 1 0 0 1 X X 1 0 1 0 1 0 L L L L β B α•β Q L H L H L L H H L L L H ( • β A α B α AND/NAND ) /Q H H H L OR/NOR + B β B α•β Q H H H H L L H H L H H H H L L L S α Q /Q S S L H H L β B S β Q /Q L H H H L H H L β L H L H ( α α A ) /Q DELAY/NEGATION α A B L H α A β DELAY/NEGATION 2:1 MUX July 2011 S Q L H A B 4 /Q A B M9999-071311U-A [email protected] or (408) 955-1690 Micrel, Inc. SY58051U-A Absolute Maximum Ratings (1) Operating Ratings (2) Supply Voltage (VCC).......................................−0.5 to +4.0V Input Voltage (VIN) .............................................-0.5V to VCC CML Output Voltage (VOUT)......... VCC to -1.0V to VCC +0.5V Termination Current (3) Source or Sink Current on VTA, VTB, VTS ................±60mA Input Current Source or Sink Current on A, /A, B, /B, S, /S .........±30mA Lead Temperature (soldering, 20 sec.).................... +260°C Storage Temperature (TS.).........................-65°C to +150°C Supply Voltage (VCC)....................... +2.375V to +2.625V or +3.0°C to +85°C Ambient Temperature (TA)..................... −40°C to +85°C Package Thermal Resistance (4) PDIP (θJA) Still-Air.................................................... 61°C/W QFN (ψJB)............................................................ 38°C/W DC Electrical Characteristics (5) TA = —40°C to +85°C, unless otherwise noted. Symbol Parameter Condition Min. Typ. Max. Units VCC = 2.5V. 2.375 2.5 2.625 V VCC = 3.3V. 3.0 3.3 3.6 V 55 70 mA VCC Power Supply ICC Power Supply Current RDIFF_IN Differential Input Resistance (A-to/A, B-to-/B or S-to/S) 80 100 120 Ω RIN Input Resistance (A-to-VTA, B-to-VTB or S-to-VTS) 40 50 60 Ω VIH Input HIGH Voltage (A, /A or B, /B or S, /S) Note 6 1.2 VCC V VIL Input LOW Voltage (A, /A or B, /B or S, /S) Note 6 0 VIH-0.1 mV VIN Input Voltage Swing (A, /A or B, /B or S, /S) Note 6 See Figure 2a. 100 mV VDIFF_IN Differential Input Voltage Swing ІA-, /AІ or ІB-, /BІ or S-, /SІ Note 6 See Figure 2b. 200 mV Input Current (A, /A or B, /B or S, /S) Note 6 І І І IN No Load, max. VCC. 21 mA Notes: 1. Permanent device damage may occur if the ratings in the “Absolute Maximum Ratings” section are exceeded. This is a stress rating only and functional operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Due to the limited drive capability use for input of the same package only. 4. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. ΨJB uses 4-layer θJA n still-air, unless otherwise stated. 5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 6. Due to the internal termination (see Figure 1a) the input current depends on the applied voltages at A, /A and VTA inputs, the B, /B and VTB inputs or the S, /S and VTS inputs. Do not apply a combination of voltages that causes the input current to exceed the maximum limit. July 2011 5 M9999-071311U-A [email protected] or (408) 955-1690 Micrel, Inc. SY58051U-A CML Electrical Characteristics (5) VCC = 2.5V ±5% or 3.3V ±10%; RL =100Ω across output pair or equivalent; TA = -40°C to +85°C; unless otherwise noted. Symbol Parameter Condition Min. VCH Output HIGH Voltage Q, /Q VOUT Output Voltage Swing Q, /Q See Figure 2a. 325 VDIFF_OUT Differential Output Voltage Swing Q, /Q See Figure 2b. 650 ROUT Output Source Impedance Q, /Q 40 Typ Max Units VCC 3.6 V 400 500 mV 800 1000 mV 50 60 Ω VCC—0.020 AC Electrical Characteristics (8) VCC = 2.5V ±5% or 3.3V ±10%; RL =100Ω across output pair or equivalent; TA = -40°C to +85°C; unless otherwise noted. Symbol Parameter FMAX Maximum Operating Frequency tpd Propagation Delay Any Input (A, B, S)-to-Q tSKEW Condition Clock NRZ Data Min Typ 10.7 7 Units GHz Gbps 190 ps Note 9 100 ps Random Jitter (RJ) Note 10 1 psRMS Deterministic Jitter (DJ) Note 11 10 psPP Cycle-to-Cycle Jitter (RJ) Note 12 1 psRMS Total Jitter (TJ) Note 13 10 psPP 60 ps Part-to-Part Skew 70 Max Data tJITTER TR, tf Clock Output Rise/Fall Times (20% to 80%) 20 At full output swing. Notes: 7. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 8. Measured with 100mV input swing. See “Timing Diagrams” section for definition of parameters. High-frequency AC parameters are guaranteed by design and characterization. 9. Skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs. 10. Random jitter is measured with a K28.7 comma detect character pattern, measured at 2.5Gbps/3.2Gbps. 23 11. Deterministic jitter is measured at 2.5Gbps/3.2Gbps with both K28.5 and 2 –1 PRBS pattern. 12. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn–Tn–1 where T is the time between rising edges of the output signal. 13. Total jitter definition: with an ideal clock input of frequency ≤ fMAX, no more than one output edge in 10 output edges will deviate by more than the specified peak-to-peak jitter value. 12 July 2011 6 M9999-071311U-A [email protected] or (408) 955-1690 Micrel, Inc. SY58051U-A Functional Block Diagram July 2011 7 M9999-071311U-A [email protected] or (408) 955-1690 Micrel, Inc. SY58051U-A Timing Diagram Input and Output Stage Internal Termination Figure 1a. Simplified Differential Input Stage July 2011 Figure 1b. Simplified Differential Output Stage 8 M9999-071311U-A [email protected] or (408) 955-1690 Micrel, Inc. SY58051U-A Definition of Single-Ended and Differential Swings Figure 2a. Single-Ended Swing July 2011 Figure 2b. Differential Swing 9 M9999-071311U-A [email protected] or (408) 955-1690 Micrel, Inc. SY58051U-A Typical Operating Characteristics July 2011 10 M9999-071311U-A [email protected] or (408) 955-1690 Micrel, Inc. SY58051U-A Functional Characteristics July 2011 11 M9999-071311U-A [email protected] or (408) 955-1690 Micrel, Inc. SY58051U-A Input Interface Applications Figure 3a. Static Input Level Figure 3b. LVDS Interface (DC-Coupled) Figure 3c. CML Interface (DC-Coupled) Figure 3d. CML Interface (AC-Coupled) Figure 3e. PECL Interface (DC-Coupled) Figure 3f. PECL Interface (AC-Coupled) Related Product and Support Documentation Part Number Function Data Sheet Link SY58016L 3.3V 10Gbps Differential CML Line Driver/Receiver with Internal Termination http://www.micrel.com/product-info/products/sy58016I.shtml SY58052U 10Gbps Clock/Data Retimer with 50Ώ Input Termination www.micrel.com/product-info/products/sy58052u.shtml QFN® Application Note www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf New Products and Applications www.micrel.com/product-info/products/solutions.shtml HBW Solutions July 2011 12 M9999-071311U-A [email protected] or (408) 955-1690 Micrel, Inc. SY58051U-A 16-PIN MicroLeadFrame® (MLF-16) PCB Thermal Consideration for 16-Pin QFN® Package (Always solder, or equivalent, the exposed pad to the PCB) MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant M9999-071311U-A into the body or (b) support or sustain life, and whose failure to perform13 can be reasonably expected to result in a significant injury to the user. A July 2011 Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully or (408) 955-1690 [email protected] indemnify Micrel for any damages resulting from such use or sale. © 2011 Micrel, Incorporated.