MICREL SY58021U

SY58021U
4GHz, 1:4 LVPECL Fanout
Buffer/Translator with Internal Termination
Precision Edge®
General Description
The SY58021U is a 2.5V/3.3V precision, high-speed, fully
differential 1:4 LVPECL fanout buffer. Optimized to provide
four identical output copies with less than 15ps output
skew and only 70 fsRMS phase jitter, the SY58021U can
process clock signals as fast as 4GHz.
The differential input includes Micrel’s unique, 3-pin input
termination architecture interfaces to differential LVPECL,
CML, and LVDS signals (AC- or DC-coupled) as small as
100mV without any level-shifting or termination resistor
networks in the signal path. For AC-coupled input interface
applications, an on-board output reference voltage (VREFAC)
is provided to bias the VT pin. The outputs are 100k
LVPECL compatible, with extremely fast rise/fall times
guaranteed to 70fs.
The SY58021U operates from a 2.5V ±5% supply or 3.3V
±10% supply and is guaranteed over the full industrial
temperature range (–40°C to +85°C). For applications that
require faster rise/fall times, or greater bandwidth, consider
the SY58022U 1:4 fanout buffer with 400mV LVPECL
output swing, or the SY58020U 1:4 CML fanout buffer. The
®
SY58021U is part of Micrel’s high-speed, Precision Edge
product line.
Data sheets and support documentation can be found on
Micrel’s web site at www.micrel.com.
Precision Edge®
Features
• Precision 1:4 LVPECL fanout buffer
• Low jitter performance:
− 70fsRMS phase jitter (typical)
• Accepts an input signal as low as 100mV
• Unique input termination and VT pin accepts DCcoupled and AC-coupled differential inputs: LVPECL,
LVDS, and CML
• 100k LVPECL-compatible 800mV swing output
• Power supply 2.5V ±5% and 3.3V ±10%
• −40°C to +85°C temperature range
• Available in 16-pin (3mm × 3mm) QFN package
Applications
•
•
•
•
All SONET and GigE clock distribution
Fibre Channel clock and data distribution
Backplane distribution
High-end, low-skew, multiprocessor, synchronous clock
distribution
Block Diagram
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
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\Ordering
SY58021U
Information(1)
Part Number
Package Type
Operating Range
Package Marking
Lead Finish
SY58021UMI
QFN-16
Industrial
021U
Sn-Pb
SY58021UMITR
QFN-16
Industrial
021U
Sn-Pb
SY58021UMG(3)
QFN-16
Industrial
021U with Pb-Free bar-line indicator
Pb-Free
NiPdAu
SY58021UMGTR(2, 3)
QFN-16
Industrial
021U with Pb-Free bar-line indicator
Pb-Free
NiPdAu
(2)
Notes:
1.
Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC electrical only.
2.
Tape and Reel.
3.
Pb-Free package recommended for new designs.
Pin Configuration
16-Pin QFN
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Pin Description
Pin Number
Pin Name
Pin Function
1, 4
IN, /IN
Differential Input: This input pair receives the signal to be buffered. Each pin of this pair internally
terminates with 50Ω to the VT pin. Note that this input will default to an indeterminate state if left
open. See “Input Interface Applications” section.
2
VT
Input Termination Center-Tap: Each input terminates to this pin. The VT pin provides a center-tap
for each input (IN, /IN) to the termination network for maximum interface flexibility. See “Input
Interface Applications” section.
3
VREF-AC
Reference Output Voltage: This output biases to VCC –1.2V. It is used when AC-coupling to
differential inputs. Connect VREF-AC directly to the VT pin. Bypass with 0.01µF low ESR capacitor
to VCC. See “Input Interface Applications” section.
8, 13
VCC
5, 16
GND,
Exposed Pad
Ground. Exposed pad must be connected to a ground plane that is the same potential as the
ground pin.
14, 15, 11, 12,
9, 10, 6, 7
/Q0, Q0, /Q1,
Q1, /Q2, Q2,
/Q3, Q3
LVPECL Differential Output Pairs: Differential buffered output copy of the input signal. The output
swing is typically 800mV Proper termination is 50Ω to VCC–2V at the receiving end. Unused
output pairs may be left floating with no impact on jitter or skew. See “LVPECL Output
Termination” section.
September 2011
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to the VCC pins
as possible.
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SY58021U
Absolute Maximum Ratings(1)
Operating Ratings(2)
Power Supply Voltage (VCC)......................... −0.5V to +4.0V
Input Voltage (VIN) ............................................ −0.5V to VCC
LVPECL Output Current (IOUT)
Continuous............................................................50mA
Surge ..................................................................100mA
Source or Sink Current on VT Pin
VT Current .........................................................±100mA
Source or Sink Current on IN, /IN
Input Current.......................................................±50mA
Source or Sink Current on VREF-AC(4)
VREF Current.......................................................±1.5mA
Soldering (20s) ........................................................... 260°C
Storage Temperature (Ts) ......................... −65°C to +150°C
Power Supply Voltage (VCC) .................. +2.375V to +3.60V
Operating Temperature Range (TA)............ –40°C to +85°C
Package Thermal Resistance
QFN (θJA)
Still-Air.......................................................+60°C/W
500 lpfm ....................................................+54°C/W
QFN (ψJB)
Junction-to-Board Resistance(3) ................+33°C/W
Input DC Electrical Characteristics(5)
TA = –40°C to +85°C.
Symbol
Parameter
Condition
Min.
Typ.
Max.
VCC
Power Supply Voltage
VCC = 2.5V
VCC = 3.3V
ICC
Power Supply Current
No load, VCC = maximum
VIH
Input HIGH Voltage
IN, /IN (Note 6)
VIL
Input LOW Voltage
IN, /IN
VIN
Input Voltage Swing
IN, /IN (see Figure 1a)
VDIFF_IN
Differential Input Voltage Swing
IN, /IN (see Figure 1b)
0.2
RIN
IN-to-VT Resistance
VT_IN
IN-to-VT Voltage
VREF-AC
Output Reference Voltage
Units
2.375
2.5
2.625
3.0
3.3
3.60
125
160
mA
VCC − 1.6
VCC
V
0
VIH − 0.1
V
0.1
1.7
V
V
V
40
50
60
Ω
1.28
V
VCC − 1.30
VCC − 1.2
VCC − 1.1
V
Notes:
1.
Permanent device damage may occur if ratings in the “Absolute Maximum Ratings” section are exceeded. This is a stress rating only and functional
operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum
ratings conditions for extended periods may affect device reliability.
2.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3.
Thermal performance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB.
4.
Due to the limited drive capability, use for input of the same package only.
5.
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
6.
VIH (minimum) not lower than 1.2V.
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LVPECL Output DC Electrical Characteristics(5)
VCC = 3.3V ±10% or 2.5 ±5%; RL = 50Ω to VCC − 2V; TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
VOH
Output HIGH Voltage
VCC − 1.145
VCC − 0.895
V
VOL
Output LOW Voltage
VCC − 1.945
VCC − 1.695
V
VOUT
Output Voltage Differential Swing
(see Figure 1a)
550
780
1050
mV
VDIFF_OUT
Differential Output Voltage Swing
(see Figure 1b)
1100
1560
2100
mV
AC Electrical Characteristics
VCC = 2.5V ±5% or 3.3 ±10%; RL = 50Ω to VCC − 2V; TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min.
fMAX
Maximum Operating Frequency
tPD
Propagation Delay
tCHAN
Channel-to-Channel Skew
Note 7
tSKEW
Part-to-Part Skew
Note 8
tJITTER
RMS Phase Jitter
Integration Range:
12kHz − 20MHz
tr, tf
Output Rise/Fall Time (20% to 80%)
At full swing
VOUT ≥ 400mV
Clock
Typ.
Max.
4
NRZ Data
GHz
5
150
Units
Gbps
220
300
ps
4
15
ps
50
ps
Output: 622MHz
70
35
75
fs
110
ps
Notes:
7.
Skew is measured between outputs of the same bank under identical transitions.
8.
Skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs.
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SY58021U
Phase Noise Graph
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Timing Diagram
Single-Ended and Differential Swings
Figure 1a. Single-Ended Voltage Swing
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Figure 1b. Differential Voltage Swing
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SY58021U
Typical Characteristics
VCC = 2.5V, GND = 0, VIN = 100mV, TA = 25°C, unless otherwise stated.
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Functional Characteristics
VCC = 2.5V, GND = 0, VIN = 100mV, TA = 25°C, unless otherwise stated.
Input Stage
Figure 2. Simplified Differential Input Buffer
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SY58021U
Input Interface Applications
Figure 3a. LVPECL Input Interface
Figure 3b. AC-Coupled LVPECL Input
Interface
Figure 3d. DC-Coupled CML Input
Interface
Figure 3e. AC-Coupled CML Input
Interface
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Figure 3c. LVDS Input Interface
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SY58021U
LVPECL Output
LVPECL outputs have very-low output impedance (open
emitter), and small signal swing which results in low EMI.
LVPECL is ideal for driving 50Ω- and 100Ω-controlled
impedance transmission lines. There are several
techniques in terminating the LVPECL output (Figures 4
through 6).
Figure 4. Parallel Termination-Thevenin Equivalent
Figure 5. Parallel Termination (3-Resistor)
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SY58021U
Figure 6. Terminating Unused I/O
Related Micrel Products and Support Documentation
Part Number
Function
Data Sheet Link
SY58020U
6GHz, 1:4 CML Fanout Buffer/Translator
with Internal I/O Terminations
www.micrel.com/product-info/products/sy58020u.shtml
SY58021U
4GHz, 1:4 LVPECL Fanout Buffer/Translator
with Internal Termination
www.micrel.com/product-info/products/sy58021u.shmtl
SY58022U
5.5GHz, 1:4 Fanout Buffer/Translator with
400mV LVPECL Outputs and Internal
Terminations
www.micrel.com/product-info/products/sy58022u.shtml
M-0317
HBW Solutions
www.micrel.com/product-info/as/solutions.shtml
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SY58021U
Package Information
16-Pin QFN
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no
liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or
warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a
product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for
surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury
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Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.
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