Precision Edge® SY58027U ® ULTRA PRECISION DUAL 2:1 400mV LVPECL MUX WITH INTERNAL TERMINATION Micrel, Inc. Precision Edge SY58027U FEATURES Two independent differential 2:1 multiplexers Guaranteed AC performance over temperature and voltage: • DC-to >10.7Gbps data rate throughput • < 290ps IN-to-Out tpd • < 80ps tr / tf Unique, patent-pending input isolation design minimizes crosstalk Ultra-low jitter design: • <1psRMS random jitter • <10psPP deterministic jitter • <10psPP total jitter (clock) • <0.7psRMS crosstalk-induced jitter Unique, patent-pending 50ý input termination and VT pin accepts DC-coupled and AC-coupled inputs (CML, LVDS, PECL) 400mV LVPECL output swing Power supply 2.5V ±5% or 3.3V ±10% –40°C to +85°C temperature range Available in 32-pin (5mm ∞ 5mm) MLF® package Precision Edge® DESCRIPTION The SY58027U features two ultra-fast, low jitter 2:1 differential muxes with a guaranteed maximum data throughput of 10.7Gbps. The SY58027U differential inputs include a unique internal termination design that allows access to the termination network through a VT pin. The device easily interfaces to different logic standards, both AC- and DCcoupled, without external resistor-bias and termination networks. The result is a clean, stub-free, low jitter interface solution. The differential 400mV LVPECL outputs have extremely fast rise/fall times guaranteed to be less than 80ps. The SY58027U operates from a 2.5V or 3.3V supply and is guaranteed over the full industrial temperature range (–40°C to +85°C). The SY58027U is part of Micrel’s Precision Edge® product family. All support documentation can be found on Micrel’s web site at www.micrel.com. APPLICATIONS Data communication systems All SONET OC3-OC768 applications All Fibre Channel applications All GigE applications FUNCTIONAL BLOCK DIAGRAM INA0 INB0 50Ω VTA0 50Ω 50Ω VTB0 50Ω 0 /INA0 MUX A INA1 50Ω VTA1 50Ω /INB0 QA VREF-ACA0 1 0 QB VREF-ACB0 /QA MUX B /QB INB1 50Ω VTB1 50Ω S /INA1 1 S /INB1 VREF-ACA1 VREF-ACB1 SELA (TTL/CMOS) SELB (TTL/CMOS) AnyGate and Precision Edge are registered trademarks of Micrel, Inc. MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc. M9999-082707 [email protected] or (408) 955-1690 Rev.: D 1 Amendment: /0 Issue Date: August 2007 Precision Edge® SY58027U Micrel, Inc. PACKAGE/ORDERING INFORMATION INA1 VREF-ACA1 VTA1 INA1 /INA0 VREF-ACA0 VTA0 INA0 Ordering Information(1) 32 31 30 29 28 27 26 25 INB0 VTB0 VREF-ACB0 /INB0 INB1 VTB1 VREF-ACB1 /INB1 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 GND VCC QA /QA VCC NC SELA VCC GND VCC /QB QB VCC NC SELB VCC 9 10 11 12 13 14 15 16 Part Number Package Type Operating Range Package Marking Lead Finish SY58027UMI MLF-32 Industrial SY58027U Sn-Pb SY58027UMITR(2) MLF-32 Industrial SY58027U Sn-Pb SY58027UMG(3) MLF-32 Industrial SY58027U with Pb-Free bar-line indicator Pb-Free NiPdAu SY58027UMGTR(2, 3) MLF-32 Industrial SY58027U with Pb-Free bar-line indicator Pb-Free NiPdAu Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC electricals only. 2. Tape and Reel. 3. Pb-Free package recommended for new designs. 32-Pin MLF® (MLF-32) PIN DESCRIPTION Pin Number Pin Name 25, 28, 29, 32, 1, 4, 5, 8 INA0, /INA0, INA1, /INA1, INB0, /INB0, INB1, /INB1 Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs accept AC- or DC-coupled differential signals as small as 100mV. Each pin of a pair internally terminates to a VT pin through 50ý. Note that these inputs will default to an indeterminate state if left open. Unused differential input pairs can be terminated by connecting one input to VCC and the complementary input to GND through a 1ký resistor. The VT pin is to be left open in this configuration. Please refer to the “Input Interface Applications” section for more details. 26, 30, 2, 6 VTA0 , VTA1, VTB0, VTB1 Input Termination Center-Tap: Each side of the differential input pair, terminates to a VT pin. Each VT pin provides a center-tap to a termination network for maximum interface flexibility. See “Input Interface Applications” section for more details. 18, 15 SELA, SELB Bank A, Bank B Input Channel Select (TTL/CMOS): These TTL/CMOS-compatible inputs select the inputs to the multiplexers. These inputs are internally connected to a 25ký pull-up resistor and will default to a logic HIGH state if left open. Input switching threshold is VCC/2. 27, 31, 3, 7 VREF-ACA0, VREF-ACA1, VREF-ACB0, VREF-ACB1 Reference Output Voltage: These outputs bias to VCC –1.2V. Connect to VT pin when AC-coupling the data inputs. Bypass with 0.01µF low ESR capacitor to VCC. Maximum current source or sink is 0.5mA. See “Input Interface Applications” section. 10, 13, 16, 17, 20, 23 VCC 22, 21, 12, 11 QA, /QA, QB, /QB 9, 24 GND, Exposed pad 14, 19 NC M9999-082707 [email protected] or (408) 955-1690 Pin Function Positive Power Supply: Bypass with 0.1µF™ℑ0.01µF low ESR capacitors. Differential 100k LVPECL Outputs: MUX A and MUX B selected LVPECL outputs. See “Output Interface Applications” section for termination. Refer to the “Truth Table” for logic operation. Ground: Ground pins and exposed pad must be connected to the same ground plane. Not connected. 2 Precision Edge® SY58027U Micrel, Inc. Absolute Maximum Ratings(1) Operating Ratings(2) Power Supply Voltage (VCC ) ...................... –0.5V to +4.0V Input Voltage (VIN) .......................................... –0.5V to VCC LVPECL Output Current (IOUT) Continuous .............................................................. 50mA Surge ....................................................................100mA Termination Current(3) Source or sink current on VT ...................................... ±100mA Input Current Source or sink current on IN, /IN .......................... ±50mA Current (VREF-AC) Source or sink current on VREF-AC(3) ................... ±1.5mA Lead Temperature (soldering, 20 sec.) ..................... 260°C Storage Temperature Range (TS ) ........... –65°C to +150°C Power Supply Voltage (VCC) ............... +2.375V to +2.625V ............................................................. +3.0V to +3.6V Ambient Temperature Range (TA) .............. –40°C to +85°C Package Thermal Resistance MLF® (θJA) Still-Air ............................................................. 35°C/W 500lpfm ........................................................... 28°C/W MLF® (ψJB)(4) Junction-to-board ............................................ 20°C/W DC ELECTRICAL CHARACTERISTICS(5) TA= –40°C to +85°C; Unless otherwise stated. Symbol Parameter Condition Min Typ Max Units VCC Power Supply VCC = 2.5V VCC = 3.3V 2.375 3.0 2.5 3.3 2.625 3.6 V V ICC Power Supply Current No load, max. VCC. 100 140 mA RDIFF_IN Differential Input Resistance (IN-to-/IN) 80 100 120 ý RIN Input Resistance (IN-to-VT, /IN-to-VT) 40 50 60 ý VCC–1.6 VCC V 0 VIH –0.1 V 1.7 V VIH Input High Voltage (IN, /IN) Note 6 VIL Input Low Voltage (IN, /IN) VIN Input Voltage Swing (IN, /IN) See Figure 1a. 0.1 VDIFF_IN Differential Input Voltage Swing |IN – /IN| See Figure 1b. 0.2 VT IN In to VT (IN, /IN) VREF-AC Output Reference Voltage V 1.28 VCC–1.3 VCC–1.2 VCC–1.1 V V Notes: 1. Permanent device damage may occur if ratings in the “Absolute Maximum Ratings” section are exceeded. This is a stress rating only and functional operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Due to the limited drive capability, use for input of the same package only. 4. Junction-to-board resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential (GND) on the PCB. ΨJB uses 4layer θJA in still air unless otherwise stated. 5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 6. VIH (min) not lower than 1.2V. M9999-082707 [email protected] or (408) 955-1690 3 Precision Edge® SY58027U Micrel, Inc. LVPECL OUTPUTS DC ELECTRICAL CHARACTERISTICS(6) VCC = 2.5V ±5% or 3.3V ±10%; TA = –40°C to +85°C; RL = 50ý to VCC–2V, unless otherwise stated. Symbol Parameter VOH Condition Min Typ Max Units Output HIGH Voltage Q, /Q VCC–1.145 — VCC–0.895 V VOL Output LOW Voltage Q, /Q VCC–1.545 — VCC–1.295 V VOUT Output Voltage Swing Q, /Q See Figure 1a. 150 400 mV VDIFF-OUT Differential Output Voltage Swing |Q-/Q| See Figure 1b. 300 800 mV Min Typ LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS(6) VCC = 2.5V ±5% or 3.3V ±10%; TA= –40°C to 85°C unless otherwise stated. Symbol Parameter VIH Input HIGH Voltage VIL Input LOW Voltage IIH Input HIGH Current IIL Input LOW Current Condition 2.0 –175 VIL = 0V –300 Note: 6. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. M9999-082707 [email protected] or (408) 955-1690 Max 4 Units V 0.8 V 75 µA µA Precision Edge® SY58027U Micrel, Inc. AC ELECTRICAL CHARACTERISTICS(7) VCC = 2.5V ±5% or 3.3V ±10%; TA= –40°C to +85°C; RL = 50ý to VCC–2V, unless otherwise stated. Symbol Parameter Condition fMAX Maximum Operating Frequency Min NRZ Data Clock VOUT ž 200mV Typ Max Units 10.7 Gbps GHz 7 Propagation Delay tpd IN-to-Q VIN ž 300mV SEL-to-Q tSKEW tJITTER 215 290 ps 100 220 400 ps Input-to-Input Skew (Within-bank) Note 8 6 15 ps Bank-to-Bank Skew Note 9 8 20 ps Part-to-Part Skew Note 10 100 ps Data Random Jitter (RJ) Note 11 1 psRMS Deterministic Jitter (DJ) Note 12 10 psPP Clock tr, tf 140 Cycle-to-Cycle Jitter (RJ) Note 13 1 psRMS Total Jitter (TJ) Note 14 10 psPP Crosstalk-Induced Jitter Channel-to-Channel Note 15, Within-bank. 0.7 psRMS Output Rise/Fall Time 20% to 80% At full swing. 80 ps 20 55 Notes: 7. High-speed AC parameters are guaranteed by design and characterization. VIN swing ž 100mV unless otherwise noted. 8. Input-to-input skew is the difference in time between two inputs to the output within a bank. 9. Bank-to-bank skew is the difference in time from input to the output between bank. 10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs. 11. Random jitter is measured with a K28.7 comma detect character pattern, measured at 5Gbps and 2.5Gbps/3.2Gbps. 12. Deterministic jitter is measured at 2.5Gbps/3.2Gbps, with both K28.5 and 223–1 PRBS pattern. 13. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn–Tn–1 where T is the time between rising edges of the output signal. 14. Total jitter definition: with an ideal clock input of frequency - fMAX, no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value. 15. Crosstalk is measured at the output while applying two similar frequencies that are asynchronous with respect to each other at the inputs. TRUTH TABLES INA0 /INA0 INA1 /INA1 SELA QA /QA 0 1 X X 0 0 1 1 0 X X 0 1 0 X X 0 1 1 0 1 X X 1 0 1 1 0 INB0 /INB0 INB1 /INB1 SELB QB /QB 0 1 X X 0 0 1 1 0 X X 0 1 0 X X 0 1 1 0 1 X X 1 0 1 1 0 M9999-082707 [email protected] or (408) 955-1690 5 Precision Edge® SY58027U Micrel, Inc. SINGLE-ENDED AND DIFFERENTIAL SWINGS VDIFF_IN, VDIFF_OUT 800mV (Typ.) VIN, VOUT 400mV (Typ.) Figure 1a. Single-Ended Voltage Swing Figure 1b. Differential Voltage Swing TIMING DIAGRAM INA0, INA1 /INA0, /INA1 tpd QA /QA INB0, INB1 /INB0, /INB1 tpd QB /QB SELA SELA-to-QA tpd tpd SELB-to-QB tpd tpd QA /QA SELB QB /QB M9999-082707 [email protected] or (408) 955-1690 6 Precision Edge® SY58027U Micrel, Inc. TYPICAL OPERATING CHARACTERISTICS VCC = 3.3V, TA = 25°C, RL = 50ý to VCC – 2V, DC coupled, unless otherwise stated. 2GHz Output 200MHz Output TA = 25°C VCC = 3.3V Output Swing (100mV/div.) Output Swing (100mV/div.) TA = 25°C VCC = 3.3V /Q Q TIME (600ps/div.) TIME (70ps/div.) 2.5Gbps Output 3.2Gbps Output Output Swing (100mV/div.) TA = 25°C VCC = 3.3V Output Swing (100mV/div.) TA = 25°C VCC = 3.3V TIME (100ps/div.) TIME (100ps/div.) 5Gbps Output Output Swing (100mV/div.) TA = 25°C VCC = 3.3V /Q Q TIME (50ps/div.) 500 HSTL (1000mV) CML (200mV) 200 190 180 LVDS (400mV) PECL (800mV) 170 SEL (1.6V) 160 300 250 200 150 100 FREQUENCY (MHz) M9999-082707 [email protected] or (408) 955-1690 7 12000 10000 8000 0 100 6000 50 4000 -25 0 25 50 75 TEMPERATURE (°C) 350 0 150 -50 400 2000 210 Frequency vs. Output Swing 450 220 OUTPUT SWING (mV) PROPAGATION DELAY (ps) 230 Propagation Delay vs. Temperature Precision Edge® SY58027U Micrel, Inc. INPUT AND OUTPUT STAGE INTERNAL TERMINATION VCC VCC IN 50Ω VT GND /Q 50Ω Q /IN Figure 2b. Simplified LVPECL Output Stage Figure 2a. Simplified Differential Input Stage INPUT INTERFACE APPLICATIONS VCC VCC IN LVPECL /IN VCC /IN Rp NC Rp VCC VREF-AC VT VREF-AC GND 0.01µF For VCC=3.3V, Rp = 100Ω. For VCC=2.5V, Rp = 50Ω. GND For VCC = 3.3V, Rp = 50Ω. For VCC = 2.5V, Rp = 19Ω. Figure 3a. DC-Coupled PECL Interface SY58027U Figure 3b. AC-Coupled PECL Interface VCC VCC IN CML IN /IN CML SY58027U GND NC NC /IN SY58027U VT VREF-AC GND VCC VT VREF-AC Option: May connect VT to VCC. Figure 3d. DC-Coupled CML Interface M9999-082707 [email protected] or (408) 955-1690 LVDS /IN GND VT Rp IN SY58027U 0.01µF GND VCC IN LVPECL 0.01µF Figure 3e. AC-Coupled CML Interface 8 SY58027U GND NC VT NC VREF-AC Figure 3c. LVDS Interface Precision Edge® SY58027U Micrel, Inc. OUTPUT INTERFACE APPLICATIONS +3.3V +3.3V ZO = 50Ω R1 130Ω R1 130Ω +3.3V +3.3V +3.3V ZO = 50Ω ZO = 50Ω ZO = 50Ω R2 82Ω 50Ω R2 82Ω 50Ω Figure 4a. Parallel Thevenin-Equivalent Termination +3.3V +3.3V 50Ω VCC C (Optional) 0.01µF Figure 4b. Parallel Termination (3-Resistor) R1 130Ω Terminate unused output to VCC –2V to balance the differential output pair. R2 82Ω Figure 4c. Terminating Unused Output RELATED MICREL PRODUCTS AND SUPPORT DOCUMENTATION Part Number Function Data Sheet Link SY58016L 3.3V 10Gbps Differential CML Line Driver/Receiver with Internal Termination http://www.micrel.com/product-info/products/sy58016l.shtml SY58017U 10.7Gbps Differential CML 2:1 MUX with Internal Termination http://www.micrel.com/product-info/products/sy58017u.shtml SY58018U 5Gbps LVPECL 2:1 MUX with Internal Termination http://www.micrel.com/product-info/products/sy58018u.shtml SY58019U 10.7Gbps 400mV LVPECL 2:1 MUX with Internal Termination http://www.micrel.com/product-info/products/sy58019u.shtml SY58025U 10.7Gbps Dual 2:1 CML MUX with Internal Termination http://www.micrel.com/product-info/products/sy58025u.shtml SY58026U 5Gbps Dual 2:1 LVPECL MUX with Internal Termination http://www.micrel.com/product-info/products/sy58026u.shtml SY58051U 10.7Gbps AnyGate® with Internal Input and Output Termination http://www.micrel.com/product-info/products/sy58051u.shtml SY58052U 10Gbps Clock/Data Retimer with 50ý Input Termination http://www.micrel.com/product-info/products/sy58052u.shtml MLF™ Application Note www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf New Products and Applications www.micrel.com/product-info/products/solutions.shtml HBW Solutions M9999-082707 [email protected] or (408) 955-1690 9 Precision Edge® SY58027U Micrel, Inc. 32-PIN MicroLeadFrame® (MLF-32) Package EP- Exposed Pad Die CompSide Island Heat Dissipation Heat Dissipation VEE Heavy Copper Plane VEE Heavy Copper Plane PCB Thermal Consideration for 32-Pin MLF® Package (Always solder, or equivalent, the exposed pad to the PCB) Package Notes: 1. Package meets Level 2 Moisture Sensitivity Classification. 2. All parts are dry-packaged before shipment. 3. Exposed pads must be soldered to a ground for proper thermal management. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2005 Micrel, Incorporated. M9999-082707 [email protected] or (408) 955-1690 10