SY88149CL 3.3V, 1.25Gbps PECL Limiting Post Amplifier w/High Gain TTL Signal Detect General Description The SY88149CL is a high-sensitivity limiting post amplifier designed for use in fiber-optic receivers. These devices connect to typical transimpedance amplifiers (TIAs). The linear signal output from TIAs can contain significant amounts of noise and may vary in amplitude over time. The SY88149CL quantizes these signals and outputs PECL level waveforms. The SY88149CL operates from a single +3.3V power o o supply, over temperatures ranging from –40 C to +85 C. With its wide bandwidth and high gain, signals with data rates up to 1.25Gbps, and as small as 5mVpp, can be amplified to drive devices with PECL inputs. The SY88149CL generates a high-gain signal-detect (SD) open-collector TTL output. The SD function has a high gain input stage for increased sensitivity. A programmable Signal Detect level set pin (SDLVL) sets the sensitivity of the input amplitude detection. SD asserts high if the input amplitude rises above the threshold set by SDLVL and de-asserts low otherwise. The enable input (EN) de-asserts the true output signal without removing the input signal. The SD output can be fed back to the EN input to maintain output stability under a loss-of-signal condition. Typically, 3.4dB SD hysteresis is provided to prevent chattering. All support documentation can be found on Micrel’s web site at: www.micrel.com. Features January 2009 1 ∑ ∑ ∑ ∑ ∑ ∑ Single 3.3V power supply Fast SD enable/disable time 622Mbps to 1.25Gbps operation Low-noise PECL data outputs High-gain SD Chatter-free Open-Collector TTL signal detect (SD) output with internal 4.75kΩ pull-up resistor ∑ TTL EN input ∑ Programmable SD level set (SDLVL) ∑ Available in a tiny 10-pin MSOP package Applications ∑ ∑ ∑ ∑ ∑ ∑ GE-PON/GPON/EPON Gigabit Ethernet 1062Mbps Fibre Channel OC-12/24 SONET/SDH High-gain line driver and line receiver Low-gain TIA interface Markets ∑ FTTH/FTTP ∑ Datacom/Telecom ∑ Optical transceiver M9999-011609-C [email protected] or (408) 955-1690 Micrel, Inc. SY88149CL Typical Application Circuit January 2009 2 M9999-011609-C [email protected] or (408) 955-1690 Micrel, Inc. SY88149CL Ordering Information(1) Part Number Package Type Operating Range Package Marking Lead Finish K10-1 Industrial 149C with Pb-Free bar line indicator NiPdAu Pb-Free K10-1 Industrial 149C with Pb-Free bar line indicator NiPdAu Pb-Free SY88149CLKG (1) SY88149CLKGTR Note: 1. Tape and Reel. Pin Configuration 10-Pin MSOP (K10-1) Pin Description Pin Number Pin Name Type 1 EN TTL Input: Default is HIGH. 2 DIN Data Input True data input. 3 /DIN Data Input Complementary data input. 4 VREF 5 SDLVL Input 6 GND Ground 7 SD Open-collector TTL output w/internal 4.75kΩ pull-up resistor 8 /DOUT PECL Output Complementary data output. 9 DOUT PECL Output True data output. 10 VCC Power Supply Positive power supply. January 2009 Pin Function Enable: This input enables the outputs when it is HIGH. Note that this input is internally connected to a 25kΩ pull-up resistor and will default to a logic HIGH state if left open. Reference voltage: Placing a capacitor here to VCC helps stabilize SDLVL. Signal Detect Level Set: a resistor from this pin to VCC sets the threshold for the data input amplitude at which SD will be asserted. Device ground. Signal-Detect asserts high when the data input amplitude rises above the threshold set by SDLVL. 3 M9999-011609-C [email protected] or (408) 955-1690 Micrel, Inc. SY88149CL Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VCC) .......................................... 0V to +7.0V Input Voltage (DIN, /DIN) ......................................... 0 to VCC Output Current (IOUT) Continuous ...........................................................±50mA Surge..................................................................±100mA EN Voltage................................................................ 0 to VCC VREF Current............................................. -800_A to +500_A SDLVL Voltage ...................................................... VREF to VCC Lead Temperature (soldering, 20sec.) ....................... 260°C Storage Temperature (Ts) ......................... –65°C to +150°C Supply Voltage (VCC) ............................... +3.0V to +3.6V Ambient Temperature (TA) ..................... –40°C to +85°C Junction Temperature (TJ).................... –40°C to +125°C Junction Thermal Resistance MSOP (qJA) Still-air ..................................... 113°C/W DC Electrical Characteristics VCC = 3.0 to 3.6V; RL = 50Ω to VCC-2V; TA = –40°C to +85°C, typical values at VCC = 3.3V, TA = 25°C. Symbol Parameter Condition Min Typ ICC Power Supply Current No output load SDLVL SDLVL Voltage VOH PECL Output HIGH Voltage VCC-1.085 VCC-0.955 VCC-0.880 V VOL PECL Output LOW Voltage VCC-1.830 VCC-1.705 VCC-1.555 V VIHCMR Common Mode Range GND+2.0 V VREF Reference Voltage VCC-1.48 VCC-1.32 VCC-1.16 26 VREF Max Units 39 mA VCC V VCC V TTL DC Electrical Characteristics VCC = 3.0 to 3.6V; RL = 50Ω to VCC-2V; TA = –40°C to +85°C, typical values at VCC = 3.3V, TA = 25°C. Symbol Parameter VIH EN Input HIGH Voltage VIL EN Input LOW Voltage IIH EN Input HIGH Current Condition Min Typ Max 2.0 VIN = 2.7V VIN = VCC Units V 0.8 V 20 µA 100 µA IIL EN Input LOW Current VIN = 0.5V -0.3 mA VOH SD Output HIGH Level VCC > 3.3V, IOH-MAX < 160µA 2.4 V VCC < 3.3V, IOH-MAX < 160µA 2.0 V VOL SD Output LOW Level IOL = +2mA 0.5 V Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Thermal performance assumes the use of a 4-layer PCB. Exposed pad must be soldered (or equivalent) to the device’s most negative potential on the PCB. January 2009 4 M9999-011609-C [email protected] or (408) 955-1690 Micrel, Inc. SY88149CL AC Electrical Characteristics VCC = 3.0V to 3.6V; RLOAD = 50Ω to VCC–2V; TA = –40°C to +85°C. Symbol Parameter Condition tr, tf Output Rise/Fall Time (20% to 80%) Min Typ Max Note 4 tJITTER Deterministic Note 5 15 psPP Random Note 6 5 psRMS VID Differential Input Voltage Swing Figure 1 VOD Differential Output Voltage Swing VID > 18mVPP Figure 1 TOFF SD Release Time 100 500 ns TON SD Assert Time 100 500 ns SDAL Low SD Assert Level RSDLVL = 15kΩ, Note 8 3.4 mVPP SDDL Low SD De-assert Level RSDLVL = 15kΩ, Note 8 2.3 mVPP HYSL Low SD Hysteresis RSDLVL = 15kΩ, Note 7 3.4 dB SDAM Medium SD Assert Level RSDLVL = 5kΩ, Note 8 6.2 SDDM Medium SD De-assert Level RSDLVL = 5kΩ, Note 8 3 HYSM Medium SD Hysteresis RSDLVL = 5kΩ, Note 7 2 SDAH High SD Assert Level RSDLVL = 100Ω, Note 8 SDDH High SD De-assert Level RSDLVL = 100Ω, Note 8 8 10.8 HYSH High SD Hysteresis RSDLVL = 100Ω, Note 7 2 3.4 B-3dB 3dB Bandwidth 1 GHz AV(Diff) Differential Voltage Gain 42 dB S21 Single-ended Small-Signal Gain 36 dB 260 5 1800 Units ps mVPP mVPP 1500 8 4.2 mVPP mVPP 3.4 5 dB 16.4 20 mVPP mVPP 5 dB Notes: 4. 5. 6. 7. Amplifier in limiting mode. Input is a 200MHz square wave. Deterministic jitter measured using 1.25Gbps K28.5 pattern, VID = 10mVPP. Random jitter measured using 1.25Gbps K28.7 pattern, VID = 10mVPP. This specification defines electrical hysteresis as 20log(SD Assert/SD De-assert). The ratio between optical hysteresis and electrical hysteresis is found to vary between 1.5 and 2 depending upon the level of received optical power and ROSA characteristics. Based upon that ratio, the optical hysteresis corresponding to the electrical hysteresis range 2dB-5dB, shown in the AC characteristics table, will be 1dB-4dB optical Hysteresis. 8. See “Typical Operating Characteristics” for a graph showing how to choose a particular RSDLVL for a particular SD assert and its associated de-assert amplitude. January 2009 5 M9999-011609-C [email protected] or (408) 955-1690 Micrel, Inc. SY88149CL Typical Operating Characteristics VCC = 3.3V, TA = 25°C, RL = 50Ω to VCC–2V, unless otherwise stated. RSDLVL (kΩ) RSDLVL (kΩ) January 2009 6 M9999-011609-C [email protected] or (408) 955-1690 Micrel, Inc. SY88149CL Functional Block Diagram Detailed Description Signal Detect The SY88149CL high-sensitivity limiting post amplifier operates from a single +3.3V power supply, over temperatures from –40°C to +85°C. Signals with data rates up to 1.25Gbps and as small as 5mVPP can be amplified. Figure 1 shows the allowed input voltage swing. The SY88149CL generates an SD output, allowing feedback to EN for output stability. SDLVL sets the sensitivity of the input amplitude detection. The SY88149CL generates a chatter-free Signal-Detect (SD) open-collector TTL output with internal 4.75kΩ pullup resistor, as shown in Figure 4. SD is used to determine that the input amplitude is too small to be considered a valid input. SD asserts high if the input amplitude rises above threshold set by SDLVL and deasserts low otherwise. SD can be fed back to the enable (EN) input to maintain output stability under a SDs of signal condition. EN de-asserts low the true output signal without removing the input signals. Typically, 3.4dB SD hysteresis is provided to prevent chattering. Input Amplifier/Buffer Figure 2 shows a simplified schematic of the input stage. The high-sensitivity of the input amplifier allows signals as small as 5mVPP to be detected and amplified. The input amplifier allows input signals as large as 1800mVPP. Input signals are linearly amplified with a typically 42dB differential voltage gain. Since it is a limiting amplifier, the SY88149CL outputs typically 1500mVPP voltage-limited waveforms for input signals that are greater than 12mVPP. Applications requiring the SY88149CL to operate with high-gain should have the upstream TIA placed as close as possible to the SY88149CL’s input pins. This ensures the best performance of the device. Output Buffer The SY88149CL’s PECL output buffer is designed to drive 50Ω lines. The output buffer requires appropriate termination for proper operation. An external 50Ω resistor to VCC–2V for each output pin provides this. Figure 3 shows a simplified schematic of the output stage. January 2009 Signal Detect Level Set A programmable SD level set pin (SDLVL) sets the threshold of the input amplitude detection. Connecting an external resistor between VCC and SDLVL sets the voltage at SDLVL. This voltage ranges from VCC to VREF. The external resistor creates a voltage divider between VCC and VREF, as shown in Figure 5. Hysteresis The SY88149CL provides typically 3.4dB SD electrical hysteresis. By definition, a power ratio measured in dB 2 is 10log (power ratio). Power is calculated as V IN/R for an electrical signal. Hence the same ratio can be stated as 20log (voltage ratio). While in linear mode, the electrical voltage input changes linearly with the optical power and hence the ratios change linearly. Therefore, the optical hysteresis in dB is half the electrical hysteresis in dB given in the data sheet. The SY88149CL is an electrical device; this data sheet refers to hysteresis in electrical terms. With 3.4dB SD hysteresis, a voltage factor of 1.5 is required to assert or de-assert SD. 7 M9999-011609-C [email protected] or (408) 955-1690 Micrel, Inc. SY88149CL Figure 1. VIS and VID Definition Figure 2. Input Structure Figure 3. Output Structure Figure 4. SD Output Structure Figure 5. SDLVL Setting Circuit Note: Recommended value for RSDLVL is 15kΩ or less. January 2009 8 M9999-011609-C [email protected] or (408) 955-1690 Micrel, Inc. SY88149CL Related Product and Support Documentation Part Number Function Data Sheet Link SY88933AL 3.3V/5V 1.25Gbps PECL High-Sensitivity Limiting Post Amplifier with TTL SD http://www.micrel.com/product-info/sy88933al.shtml Application Notes Notes on Sensitivity and Hysteresis in Micrel Post Amplifiers http://www.micrel.com/product-info/app_hints+notes.shtml January 2009 9 M9999-011609-C [email protected] or (408) 955-1690 Micrel, Inc. SY88149CL Package Information 10-Pin MSOP (K10-1) MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2005 Micrel, Incorporated. January 2009 10 M9999-011609-C [email protected] or (408) 955-1690