FAB3103 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control Features Description The FAB3103 is a mono Class-D audio amplifier with an integrated boost regulator that achieves high output audio over a power supply range of 2.5V to 5.2V. High Output, Low Distortion Class-D Mono Speaker Amplifier o 2.3W into 8Ω from 3.6V Supply (10% THD+N) o 1.85W into 8Ω from 3.6V Supply (1% THD+N) o 0.01% THD+N into 8Ω (100mW) High-Efficiency Boost Regulator Provides Higher Output Power Over Li-Ion Battery Voltages o 85% Total Efficiency (3.6V, 8Ω, PO = 1.0W) Adaptive Boost Shutdown at Lower Output Power Increases Efficiency and Reduces Quiescent Current Consumption: o IDD = 2.7mA from 3.6V Supply Automatic Gain Control (AGC) Monitors Battery Voltage and Dynamically Adjusts Gain, Extending Battery Runtime Reduced Noise Floor Enhances Audio Playback o 38µV Output Noise (A-Weighted) o 100dB SNR (A-Weighted) Low-EMI Design Allows Filterless Operation High Noise Rejection Using Differential Audio Inputs: o 75dB CMRR (fIN = 1kHz) o 71dB CMRR (fIN = 217Hz) Short-Circuit Protection Automatic Boost Shutdown dynamically shuts down the boost regulator at low output power for greater efficiency and lower quiescent current consumption. Automatic Gain Control (AGC) monitors the battery and reduces gain as the battery voltage drops to limit maximum current consumption, extending battery runtime and preventing mobile device shutdown. Applications Smart Phones, Feature Phones Tablets, Portable Gaming Devices GPS, Active Speakers High-Power Supply Ripple Rejection: o 88dB PSRR (fRIPPLE = 217Hz, Boost Enabled) o 70dB PSRR (fRIPPLE = 217Hz, Boost Bypassed) Under-Voltage Protection “Click and Pop” Suppression Available in 12-Bump, 0.5mm Pitch, WLCSP o Space-Saving 1.86mm x 1.44mm Package Figure 1. Typical Application Circuit Ordering Information Part Number Operating Temperature Range Package Packing Method FAB3103UCX -40°C to +85°C 12-Bump, 0.5mm Pitch, Wafer-Level Chip-Scale Package (WLCSP) 3000 Units on Tape & Reel © 2011 Fairchild Semiconductor FAB3103 • Rev. 1.0.2 www.fairchildsemi.com FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control July 2012 Figure 2. Pin Assignments (Top View) Pin Definitions WLCSP Name Type Description B1 OUT+ Output Positive audio output C1 OUT- Output Negative audio output C3 IN+ Analog Input Positive audio input D3 IN- Analog Input Negative audio input C2 EN CMOS Input B2 AGCT B3 VBATT Power Supply voltage A2 SW Power Boost regulator switching node Shutdown signal for boost regulator and amplifier: VBATT=enabled, PGND=shutdown (internal 300KΩ pull-down) Analog Input AGC trip-point setting A1 PVDD Power Boost regulator output A3 BGND Ground Boost regulator ground – connect to PGND and AGND with a ground plane. D1 PGND Ground Power ground – connect to BGND and AGND with a ground plane. D2 AGND Ground Analog ground – connect to BGND and PGND with a ground plane. © 2011 Fairchild Semiconductor FAB3103 • Rev. 1.0.2 www.fairchildsemi.com 2 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control Pin Configuration Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VBATT Voltage on VBATT Pin -0.3 6.0 V VOUT Voltage on OUT-, OUT+ Pins -0.3 VBSTOUT + 0.3 V Voltage on IN+, IN-, SW, EN, AGCT Pins -0.3 VBATT + 0.3 V Differential Voltage Across IN+, IN- Pins While Enabled -1.5 1.5 Vrms VIN VINDIFF PD Power Dissipation Internally Limited Dissipation Ratings Symbol TJ TSTG Parameter Min. Typ. Junction Temperature Storage Temperature Range -65 TL Lead Temperature (Soldering, 10s) JA Thermal Resistance, JEDEC Standard, Multilayer Test Boards, Still Air Max. Unit 150 °C 150 °C 300 °C 77 °C/W Electrostatic Discharge Protection Symbol Parameter Condition Human Body Model (HBM) ESD EIA/JESD22-A114 According to "EIA/JESD22-C101 Level III" Charged Device Model (CDM) Compatible with "IEC61340-3-3 Level C4" or "ESD-STM5.3.1-1999 Level C4" Level Unit ±3 KV ±1 KV Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol TA VBATT LSW CVBATT CPVDD CAGCT RL Parameter Min. Operating Temperature Range Typ. -40 VBATT Supply Voltage Range 2.5 Max. Unit 85 °C 5.2 V Inductor (at Peak Inductor Current: 1.5A) 1.4(1) 2.2 µH VBATT Capacitor 4.7(1) 10.0 µF (1) 22.0 µF PVDD Capacitor 6.8 Capacitive Load on AGCT 10 (2) Load Resistance 6 8 pF Ω Notes: 1. Capacitors experience degradation over time and this is accelerated with increased temperature. It is therefore recommended to use the stated typical values. 2. The FAB3103 is optimized to drive an 8Ω speaker impedance. The 8Ω speaker should remain at ≥6Ω over the entire audio frequency range. © 2011 Fairchild Semiconductor FAB3103 • Rev. 1.0.2 www.fairchildsemi.com 3 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control Absolute Maximum Ratings Unless otherwise noted: AGCT=GND, RL=8Ω + 33µH, f=1KHz, and audio measurement bandwidth=22Hz to 20KHz (AES17). Typical values are at VBATT=3.6V, TA=25°C, with typical external component values. Symbol Parameter Conditions Min. Typ. Max. Unit IDD Quiescent Current Inputs AC Grounded, EN=HIGH 2.7 ISD Shutdown Current EN=PGND, Inputs AC Grounded 0.1 2.0 µA tWU Wake-Up Time From LOW to HIGH EN Transition to Full Operation 5 12 ms fSW(AMP) Class-D Switching Frequency mA 300 VOS Differential Output Offset Voltage Inputs AC Grounded AV Gain AGC Inactive KHz 1.67 5.00 mV V/V 9.5 10.0 10.5 Differential 24 30 36 Single-Ended 12 15 18 Input Resistance Gain=10V/V (AGC Inactive) RSTD Single-Ended Input Impedance During Shutdown EN=PGND, AC-Coupled Inputs, VINx < 2Vrms per Input 80 KΩ VSTD Maximum Single-Ended Input Voltage Swing During Shutdown EN=PGND, AC-Coupled Inputs 2 Vrms THD+N Added to Audio Signal at Inputs During Shutdown EN=PGND, AC-Coupled Inputs, Source Impedance < 1Ω RIN THD+N PO IDLMT PSRR CMRR VBIAS SNR Total Harmonic Distortion POUT=100mW Plus Noise POUT=500mW Output Power 0.01 0.02 THD+N ≤ 10% 2.3 THD+N ≤ 1% 1.85 Class-D Output Current Limit Power Supply Rejection Ratio 1.4 Inputs Shorted, AC Grounded, Output Referred; VRIPPLE=200mVP-P Square Centered Around VBATT=3.8V, 50% Duty Cycle, 10µs Rise/Fall Time Output Referred, VRIPPLE=200m VP-P Square, 50% Duty Common-Mode Rejection Cycle, 10µs Rise/Fall Ratio Time, Inputs Shorted and AC-Coupled to VRIPPLE fRIPPLE=1KHz, Boost Enabled 85 fRIPPLE=217Hz, Boost Enabled 88 fRIPPLE=1KHz, Boost Bypassed 77 fRIPPLE=217Hz, Boost Bypassed 70 fRIPPLE=1KHz 75 fRIPPLE=217Hz 71 IN+, IN- Bias Voltage Efficiency Signal-To-Noise Ratio 0.02 KΩ % % W A dB dB 1.2 V RL=8Ω + 33µH , POUT=1.0W 85 % POUT=1.85W, A-Weighted 100 POUT=1.85W, Unweighted 97 dB Continued on the following page... © 2011 Fairchild Semiconductor FAB3103 • Rev. 1.0.2 www.fairchildsemi.com 4 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control Electrical Characteristics Unless otherwise noted: AGCT=GND, RL=8Ω + 33µH, f=1KHz, and audio measurement bandwidth=22Hz to 20KHz (AES17). Typical values are at VBATT=3.6V, TA=25°C, with typical external component values. Symbol en Parameter Output Noise Conditions Min. Typ. Max. Unit A-Weighted 38 Unweighted 51 µVrms TSTD Thermal Shutdown Junction Temperature 165 °C THYS Thermal Shutdown Hysteresis Junction Temperature 25 °C VULVO VBATT Under-Voltage Shutdown VHYS 1.8 2.1 2.3 300 V VBATT Under-Voltage Hysteresis 120 fSW(REG) Boost Converter Switching Frequency 1.2 ILIMIT(SU) Boost Converter Inrush Current Limit PVDD Rising from 0V to VBATT 600 mA tINRUSH Boost Converter Inrush Time PVDD Rising from 0V to VBATT 1000 µs Auto Boost Startup Current Ramp Rate PVDD Rising from VBATT to 5.6V Boost Converter Peak Input Current Limit Open-Loop Limit IBOOST VBSTOUT Boost Converter Output Voltage VBSTSTD tHOLD VAGC 15 1600 2100 mA 5.55 5.65 5.75 V Auto Boost Shutdown Hold Time tA AGC Attack Time tR AGC Release Time 2 Vpk 125 ms AGCT=Floating 3.190 3.250 3.283 AGCT=GND 3.480 3.550 3.586 AGCT=VBATT Output Power with AGC mA/µs 1100 Auto Boost Shutdown Threshold Voltage AGC Trip Point mV MHz V 3.680 3.750 3.788 AGCT=GND, VIN=0.4Vpk, 1KHz Sine Wave VBATT=3.4V 0.79 VBATT=3.0V 0.45 AGC Step Size AGC Maximum Attenuation W 20 µs/dB 1600 ms/dB 0.5 dB 10 dB VIH EN Logic Input High Voltage VIL EN Logic Input Low Voltage CIN EN Capacitance 10 pF RPD EN Pull-Down Resistance 300 KΩ © 2011 Fairchild Semiconductor FAB3103 • Rev. 1.0.2 1.1 V 0.45 V www.fairchildsemi.com 5 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control Electrical Characteristics Unless otherwise noted: AGCT = GND, RL = 8Ω + 33µH, f = 1KHz, audio measurement bandwidth 22Hz to 20KHz (AES17), VBATT = 3.6V, TA = 25°C, typical external component values. -80 5 Inputs AC grounded Inputs AC grounded -90 4.5 -100 Amplitude (dBV) Supply Current (mA) 4 3.5 3 -110 -120 -130 2.5 -140 2 -150 2.5 3 3.5 4 4.5 Supply Voltage (V) 5 0 5.5 2 6 8 10 12 Frequency (KHz) 14 16 18 20 Figure 4. A-Weighted Output Noise vs. Frequency Figure 3. Quiescent Supply Current vs. Supply Voltage 10 10 Po = 100mW Po = 1W f = 1KHz VBATT=4.8V VBATT=4.2V VBATT=3.6V VBATT=2.8V 1 THD+N (%) THD+N (%) 1 4 0.1 0.1 0.01 0.001 0.01 0.001 0.01 0.1 Output Power (W) 1 10 10 Figure 5. Total Harmonic Distortion + Noise vs. Output Power 1000 Frequency (Hz) 10000 Figure 6. Total Harmonic Distortion + Noise vs. Frequency 1 100 f = 1KHz 0.9 f = 1KHz 90 0.8 80 0.7 70 Efficiency (%) Supply Current (A) 100 0.6 0.5 0.4 60 50 40 30 0.3 20 0.2 VBATT = 4.2V VBATT = 3.6V VBATT = 2.8V 0.1 0 0.0 0.5 1.0 1.5 Output Power (W) 2.0 0 0.01 2.5 Figure 7. Supply Current vs. Output Power © 2011 Fairchild Semiconductor FAB3103 • Rev. 1.0.2 VBATT=4.2V VBATT=3.6V VBATT=2.8V 10 0.1 Output Power (W) 1 10 Figure 8. Efficiency vs. Output Power www.fairchildsemi.com 6 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control Typical Performance Characteristics Signal Path Low EMI The FAB3103 features a fully differential signal path for noise rejection. The low-EMI design allows the OUT+ and OUT- pins to be connected directly to a speaker without an output filter. To minimize EMI, edge-rate control for the boost regulator and Class-D amplifier can be employed. The boost regulator's edge-rate control is disabled by default. For devices with 20ns boost edge rates or 10ns boost edge rates, contact a Fairchild Representative. This is a factory option that cannot be changed in the application, but is available from Fairchild. The input section includes an 80KHz low-pass filter for removing out-of-band noise from audio sources, such as sigma delta DACs. The Class-D amplifier's edge-rate control is disabled by default. For devices with 20ns Class-D edge rates, contact a Fairchild Representative. This is a factory option that cannot be changed in the application, but is available from Fairchild.. Shutdown If EN is grounded, the Class-D amplifier and the boost regulator are turned off. IN+ and IN- are high impedance. Audio signals present at IN+ and IN- with amplitude less than the maximum differential input voltage swing are not distorted by the FAB3103 (see Electrical Characteristics). Automatic Boost Shutdown Automatic boost shutdown changes the Class-D amplifier supply voltage as a function of audio output level. At audio output levels above 2Vpk, the boost converter generates 5.65V from the input battery voltage. If the output level is below 2Vpk for more than 125ms, the boost converter is switched off and the Class-D amplifier is supplied directly from the battery. As a result, efficiency is improved at low audio output levels and quiescent current consumption is reduced. When EN transitions from LOW to HIGH during the wake-up time (see Electrical Characteristics), the FAB3103 charges the input DC blocking capacitors to the Common Mode voltage before enabling the Class-D amplifier. To minimize click and pop during turn-on, audio signals should not be present during the wake-up period. Other devices that are connected to the same input signal, if not muted, may experience a pop due to this capacitor charging. Figure 9 shows an example of an auto boost startup event. At first, the boost converter is off and PVDD is the same voltage as VBATT. At 20µs, a large audio signal is presented at the inputs, which causes the boost converter to start up. From 20µs to 120µs, battery current is ramped up. The auto boost startup current ramp rate is 15mA/µs. This ramp is enforced to avoid sudden current draw spikes from the battery. There is no limitation on the length of shutdown. Remaining charge on the PVDD capacitor at startup (for example, if EN is LOW for only a short period) does not affect startup behavior. The EN pin has an internal 300KΩ pull-down resistor. EN must be LOW when VBATT is lower than the VBATT under-voltage shutdown voltage (see Electrical Characteristics). EN must remain LOW for at least 100µs after VBATT rises above the VBATT under-voltage shutdown voltage. At 120µs, after PVDD has reached the Boost Converter Output Voltage, the ramp is released and battery current falls to a level capable of sustaining the speaker amplifier’s outputs. At 160µs, the input signal begins to rise, which increases battery current. At 180µs, the boost converter peak input current limit is enforced and battery current levels off, which causes PVDD to droop. Class-D Amplifier Over-Current Protection If the output current of the Class-D amplifier exceeds limits (see the Electrical Characteristics), the amplifier is disabled for approximately one second. (Other systems, such as the boost regulator and AGC, remain active.) After one second, the amplifier is re-enabled. If the fault condition still exists, the amplifier is disabled again. This cycle repeats until the fault condition is removed. The boost regulator should not be used to drive any loads other than the Class-D amplifier. Speaker Size The FAB3103 was designed for use with small speakers found in mobile applications. The back EMF in larger speakers can cause PVDD to peak above safe levels. To check safe operation, monitor PVDD while driving a dynamic signal (such as music) at maximum levels. If PVDD peaks above 6.2V, connect a 6V Zener diode between PVDD and PGND. © 2011 Fairchild Semiconductor FAB3103 • Rev. 1.0.2 www.fairchildsemi.com 7 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control Detailed Description VIN (V) 0.6 0.4 0.2 0 0 20 40 60 80 100 120 140 160 180 200 0 20 40 60 80 100 120 140 160 180 200 100 120 140 160 180 200 PVDD (V) 6.0 4.0 2.0 0.0 Battery Current (A) 2.5 2.0 Boost Converter Peak Input Current Limit 1.5 1.0 0.5 0.0 0 20 40 60 80 Time (µs) Figure 9. Auto Boost Startup V Vbatt Gt arg et G I S LG I T Vout max Automatic Gain Control Due to constant output power, the amount of VBATT current needed to maintain a given output amplitude is inversely proportional to VBATT voltage. This produces very large current requirements at low VBATT. The AGC eases low-VBATT current demands by reducing the gain when VBATT voltage drops below a trip point. One of three different trip points may be selected by shorting AGCT to VBATT, shorting AGCT to PGND, or floating AGCT (see Electrical Characteristics). where: GI SL VOUTMAX VT VBATT = = = = = (1) Initial gain (10V/V); 3V/V slope; 5.2V; AGC trip point set by the AGCT pin; and Voltage at the VBATT pin. The trip point is determined upon power-on and when EN transitions from LOW to HIGH. If AGCT is changed during operation, the new value is not read until power or EN is cycled. Target gain can be reduced by as much as 10dB. When VBATT is above the trip point, the AGC has no effect on the signal path. Figure 10 shows target gain vs. battery voltage. Note that the state of auto boost shutdown has no effect on the AGC. When VBATT is at or below the trip point, target gain is reduced in 0.5dB steps according to the equation: © 2011 Fairchild Semiconductor FAB3103 • Rev. 1.0.2 www.fairchildsemi.com 8 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control 0.8 Target Gain (V/V) 1.0 0.8 POUT (W) 0.6 0.2 2.5 Line Color Red Green Blue 3.0 3.5 4.0 VBATT (V) 4.5 AGCT Configuration Float Ground VBATT 0.0 5.0 2.5 AGC Trip Point (V) 3.25 3.55 3.75 Line Color Magenta Cyan Black Figure 10. Target Gain vs. Battery Voltage Target Gain (dB) 3.5 4.0 VBATT (V) AGCT Configuration Float Ground VBATT AGC Trip Point (V) 3.25 3.55 3.75 4.5 5.0 Input Voltage (Vpk) 0.3 0.3 0.3 The speed at which gain can change is limited (see Electrical Characteristics); therefore, the actual gain may lag the target gain if VBATT voltage changes quickly. 20 18 16 14 12 10 8 Figure 14 and Figure 15 show examples of AGC changes over time. In these examples, AGCT is grounded, so the AGC trip point is 3.55V. 2.5 Line Color Red Green Blue 3.0 3.5 4.0 VBATT (V) AGCT Configuration Float Ground VBATT 4.5 1. Initially, VBATT is 3.6V and gain is 10V/V (20dB). 2. A narrow VBATT drop of less than 2µs is ignored by the AGC. 3. The next VBATT drop lasts longer and the AGC is tripped. The initial 0.5dB gain reduction occurs 3.9µs after VBATT crosses below the 3.55V trip point. 4. VBATT is now 3.1V, so target gain is 10V/V – 3V/V × 10V/V × [(3.55V – 3.1V) / 5.2V]=7.40V/V=17.4dB. 5. Gain continues to drop by 0.5dB every 10µs until it is below the target gain, where it settles at 17.0dB. 6. When VBATT rises above the trip point, gain increases by 0.5dB. If more than 800ms has passed since the last gain change, gain rises immediately, as shown in Figure 14. Otherwise, gain does not rise until after 800ms has passed, as shown in Figure 15. 7. While VBATT remains above the trip point, gain continues to increase by 0.5dB every 800ms until it returns to 20dB. 5.0 AGC Trip Point (V) 3.25 3.55 3.75 Figure 11. Target Gain vs. Battery Voltage Figure 12 shows examples of peak output voltage vs. battery voltage. 3.5 3 VOUT (Vpk) 3.0 Figure 13. Output Power vs. Battery Voltage Examples (VIN=0.4Vpk Sine) Figure 11 is similar to Figure 10 except that the target gain is expressed in dB rather than V/V. 2.5 VIN = 0.3Vpk 2 1.5 1 0.5 2.5 Line Color Magenta Cyan Black RL = 8Ω + 33µH 0.4 3.0 AGCT Configuration Float Ground VBATT 3.5 4.0 VBATT (V) AGC Trip Point (V) 3.25 3.55 3.75 4.5 The intent of the AGC circuitry is to limit current draw from the battery to extend runtime. This is particularly important for handsets that incorporate advanced shutdown algorithms to measure battery voltage. The AGC circuit dynamically adjusts the amplifier gain based on the trip point used. Even though the amplifier gain is reduced in response to lower battery voltages, two conditions result in continued higher current draw: 1) the handset volume is turned up in an attempt to maintain the same loudness, or 2) the input signal is increased. If 5.0 Input Voltage (Vpk) 0.3 0.3 0.3 Figure 12. Output Voltage vs. Battery Voltage © 2011 Fairchild Semiconductor FAB3103 • Rev. 1.0.2 www.fairchildsemi.com 9 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control Figure 13 shows examples of output power vs. battery voltage with a 0.4Vpk sinusoidal input signal. 10.0 9.5 9.0 8.5 8.0 7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 voltage, current draw remains elevated, eventually resulting in handset shutdown. Figure 14. AGC Changes vs. Time, Example 1 Figure 15. AGC Changes vs. Time, Example 2 © 2011 Fairchild Semiconductor FAB3103 • Rev. 1.0.2 www.fairchildsemi.com 10 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control one or both of these conditions exist, even though the amplifier gain is reduced in response to lower battery Layout Considerations General layout and supply bypassing play a major role in analog performance and thermal characteristics. Fairchild offers an evaluation board to guide layout and aid device evaluation. Contact a Fairchild representative for information about evaluation boards. Following the recommended layout configuration (shown in Figure 16) provides optimum performance for the device. For best results, follow the steps and recommended routing rules listed below. Recommended Routing / Layout Rules Do not run analog and digital signals in parallel. Minimize all trace lengths to reduce series inductance. Connect BGND, PGND, and AGND together using a single ground plane. Traces must run on top of the ground plane. Avoid routing at 90° angles. Place bypass capacitors within 2.54mm (0.1 inches) of the device power pin. Figure 16. Recommended PCB Layout Table 1 – Recommended Passive Components Component Vendor Part Number Value LSW Murata LQM2HPN2R2NJCL 2.2µH CPVDD Murata GRM21AR60J226UE80K 22µF CVBATT Murata GRM188R60J106UE82J 10µF © 2011 Fairchild Semiconductor FAB3103 • Rev. 1.0.2 www.fairchildsemi.com 11 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control Applications Information F 0.03 C A E 2X B 0.50 A1 PIN 1 AREA (Ø0.200) CU PAD F D (Ø0.300) SOLDER MASK OPENING 0.50 1.50 0.03 C 2X TOP VIEW RECOMMENDED LAND PATTERN (NSMD) 0.06 C 0.625 0.547 E 0.05 C C D 0.378±0.018 0.208±0.021 SEATING PLANE SIDE VIEWS F NOTES: (X)+/-.018 0.005 0.50 C A B 12x Ø0.260±0.02 D C 0.50 B A 1 2 F (Y)+/-.018 3 BOTTOM VIEW A. NO JEDEC REGISTRATION APPLIES. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCE PER ASME Y14.5M, 1994. D. DATUM C IS DEFINED BY THE SPHERICAL CROWNS OF THE BALLS. E. PACKAGE NOMINAL HEIGHT IS 586 MICRONS ±39 MICRONS (547-625 MICRONS). F. FOR DIMENSIONS D, E, X, AND Y SEE PRODUCT DATASHEET. G. DRAWING FILNAME: MKT-UC012AErev1 Figure 17. 12-Ball WLCSP, 3x4 Array, 0.5mm Pitch, 250µm Ball Product Dimensions Product D E X Y FAB3103UCX 1.86mm 1.44mm 0.22mm 0.18mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent version. Package specifications do not expand Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductors online packaging area for the most recent packaging drawings and tape and reel specifications. http://www.fairchildsemi.com/packaging/. © 2011 Fairchild Semiconductor FAB3103 • Rev. 1.0.2 www.fairchildsemi.com 12 FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control Physical Dimensions FAB3103 — 2.3 Watt Class-D Audio Amplifier with Integrated Boost Regulator and Automatic Gain Control 13 www.fairchildsemi.com © 2011 Fairchild Semiconductor FAB3103 • Rev. 1.0.2