www.fairchildsemi.com KA7630/KA7631 Fixed Multi-Output Regulator Features Description • Output Currents up to 0.5A (Output1 & 2) • Output Current up to 1A with External Transistor (Output3) • Fixed Precision Output 1 Voltage 5.1V ±2% • Fixed Precision Output 2 Voltage 8V ±2% (KA7630) • Fixed Precision Output 2 Voltage 9V ±2% (KA7631) • Control Signal Generator for Output 3 Voltage (12V ±2%) • Reset Facility for Output Voltage1 • Output 2,3 with Disable by TTL Input • Current Limit Protection at Each Output • Thermal Shut Down The KA7630/KA7631 is a multi-output positive voltage regulator designed to provide fixed precision output voltages of 5.1V, 8V (7630) / 9V(7631) at current up to 0.5Aand 12V at current up to 1A with external PNP transistor. An internal reset circuit generates a reset pulse when the output 1 decreases below the regulated value. Output2 & 3 can be disabled by TTL input. Protection features include over voltage protection, short circuit protection and thermal shutdown. 10-SIP H/S Internal Block Diagram Vin1 Vin2 2 1 OVP Bandgap Reference 10uA DEL.CAP 2.5V + - 3 Cd 100nF 6 RESET 9 Output 1 SCP + 50mV + Vin1 SW Vsys Thermal Shut Down OVP Vin2 10K 7 A614 "Y" Control + - + + - SCP 10 Output3 Output 2,3 5 GND 8 Output 2 SCP 1.4V 4 Disable Rev. 1.0.1 ©2002 Fairchild Semiconductor Corporation KA7630/KA7631 Absolute Maximum Ratings Parameter Symbol Value Unit Remark DC Input Voltage Vin 20 V - Disable Input Voltage Vc 20 V - Output Current Io 0.5 A - Power Dissipation Pd 1.5 W No Heatsink Junction Temperature Tj +150 °C - Topr 0 ~ +125 °C - Operating Temperature Electrical Characteristics(KA7630) (Refer to test circuit Vin1=7.5V ,Vin2=10.5V ,Tj = +25°C, unless otherwise specified) Parameter Symbol Conditions Min. Typ. Max. Unit Output Voltage 1 Vo1 Io1 = 10mA 7.5V<Vin1<14V 5mA < Io1< 500mA 5 4.9 5.1 5.1 5.2 5.3 V Output Voltage 2 Vo2 Io2 = 10mA 10.5V < Vin2< 18V 5mA < Io2 < 500mA 7.84 7.7 8 8 8.16 8.3 V Io1,2 = 500mA - - 2.5 V - - 50 80 mV - - 100 160 mV Dropout Output Voltage 1,2 Vd1,2 Line Regulation 1,2 ∆Vo 1,2 7.5V < Vin1<14V 10.5V < Vin2 < 18V Io1,2 = 200mA Load Regulation 1,2 ∆Vo 1,2 5mA < Io1< 500mA 5mA < Io2< 500mA Output Voltage 3 Vo3 Vsys=13V, Io3=100mA 11.7 12 12.3 V Line Regulation 3 ∆Vo3 13V< Vin2 < 18V, Io3 =100mA - - 120 mV Load Regulation 3 ∆Vo3 5mA < Io3 < 1A - - 250 mV Reset Pulse Delay Trd Cd = 100nF, Note1 - 25 - ms Saturation Voltage in Reset Condition VrL I6 = 5mA - - 0.4 V 10 µA Leakage Current at Pin 6 IrH V6 = 10V - - Output Voltage Thermal Drift STt 0°C <Tj < +125°C , Note2 - 100 Short Circuit Output Current Isc1,2 Vin1 = 7.5V ,Vin2 = 10.5V - - 1.6 A Disable Voltage High VdisH Output 2 Active 0.8 - 2.0 V Disable Voltage Low VdisL Output 2 Disabled Disable Bias Current Idis 0V < Vdis < 7V Junction Temperature for TSD Ttsd 0.8 - 2.0 V -100 - 2 µA Note 2 - 145 - °C - - 2 mA K-0.4 K-0.25 K -0.1 V 20 50 100 mA Quiescent Current Iq Io1 = 10mA, Output2 Disabled Reset Threshold Voltage Vr K = Vo1 Reset Threshold Hysteresis Vrth ppm/°C Note1 Notes: 1. To check the reset circuit ,the reset output is low to discharge the delay capacitor(=Cd). it’s less than Vo1-0.25V. And the reset output is high when the delay capacitor voltage linearly increased by the internal current source(10µA) if it’s more than Vo1- 0.2V. The equation of delay time is same as below. Trd = (Cd × 2.5) / 10µA 2. These parameters, although guaranteed, are not 100% tested in production. 2 KA7630/KA7631 Electrical Characteristics(KA7631) (Continued) (Refer to test circuit Vin1=7.5V ,Vin2=11.5V ,Tj = +25°C, unless otherwise specified) Parameter Symbol Conditions Min. Typ. Max. Unit Output Voltage 1 Vo1 Io1 = 10mA 7.5V < Vin1 < 14V 5mA < Io1 < 500mA 5 4.9 5.1 5.1 5.2 5.3 V Output Voltage 2 Vo2 Io2 = 10mA 11.5V < Vin2 < 18V 5mA < Io2< 500mA 8.82 8.65 9 9 9.18 9.35 V Io1,2 = 500mA - - 2.5 V Dropout Output Voltage 1,2 Vd1,2 Line Regulation 1,2 ∆Vo 1,2 7.5V < Vin1< 14V 11.5V < Vin2< 18V Io1,2 = 200mA - - 50 80 mV Load Regulation 1,2 ∆Vo 1,2 5mA < Io1< 500mA 5mA < Io2 < 500mA - - 100 160 mV 11.7 12 12.3 V Output Voltage 3 Vo3 Vsys =13V, Io3 = 100mA Line Regulation 3 ∆Vo3 13V < Vin2 <18V, Io3 =100mA - - 120 mV Load Regulation 3 ∆Vo3 5mA < Io3 < 1A - - 250 mV Reset Pulse Delay Trd Cd = 100nF, Note1 - 25 - ms Saturation Voltage in Reset Condition VrL I6 = 5mA - - 0.4 V Leakage Current at Pin 6 IrH V6 = 10V - - 10 µA Output Voltage Thermal Drift STt 0°C < Tj < +125°C , Note2 - 100 - ppm/°C Short Circuit Output Current Isc1,2 Vin1 = 7.5V ,Vin2 = 11.5V - - 1.6 A Disable Voltage High VdisH Output 2 Active 0.8 - 2.0 V Disable Voltage Low VdisL Output 2 Disabled 0.8 - 2.0 V Disable Bias Current Idis 0V < Vdis < 7V -100 - 2 µA Junction Temperature for TSD Ttsd Note2 - 145 - °C - - 2 mA K-0.4 K-0.25 K -0.1 V 20 50 100 mA Quiescent Current Iq Io1=10mA, Output2 Disabled Reset Threshold Voltage Vr K = Vo1 Reset Threshold Hysteresis Vrth Note1 Notes: 1. To check the reset circuit ,the reset output is low to discharge the delay capacitor(=Cd). if it’s less than Vo1-0.25V. And the reset output is high when the delay capacitor voltage linearly increased by the internal current source(10µA) if it’s more than Vo1- 0.2V. The equation of delay time is same as below. Trd = (Cd × 2.5) / 10µA 2. These parameters, although guaranteed, are not 100% tested in production. 3 KA7630/KA7631 Mechanical Dimensions Package Dimensions in millimeters 10-SIP-H/S 3.25 ±0.20 0.128 ±0.008 23.86 ±0.20 0.939 ±0.008 0.50 ±0.10 0.020 ±0.004 1.30 ±0.10 0.051 ±0.004 2.54 0.100 26.05 MAX 1.026 25.75 ±0.10 1.013 ±0.004 ( 1.50 ) 0.059 #1 1.30 ( ) 0.051 #10 1.00 ±0.20 0.039 ±0.008 7.00 ±0.30 0.276 ±0.012 8.90 ±0.20 0.350 ±0.008 4 16.80 MAX 0.661 3.80 ±0.20 0.150 ±0.008 1.65 ±0.10 0.065 ±0.004 0.50 ±0.10 0.020 ±0.004 13.65 ±0.30 0.537 ±0.012 KA7630/KA7631 Ordering Information Product Number KA7630 KA7631 Package Operating Temperature 10-SIP-H/S 0°C to +125°C 5 KA7630/KA7631 DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 11/12/02 0.0m 001 Stock#DSxxxxxxxx 2002 Fairchild Semiconductor Corporation