MOSA MS6258

MOSA
MS6258
Gain And Attenuation Volume Controller IC
Gain and Attenuation Volume Controller IC
4 Sets of Stereo Input, Low voltage
Gain and Attenuation 15~-79dB
FEATURES
APPLICATIONS
‧
‧
‧
‧
‧ Multimedia system.
‧ Hi-Fi audio system.
‧ MP3,PDA.
Operation range: 2.7V~6.5V.
Low power consumption.
Gain/Attenuation: 15dB to –79dB.
+1dB/step, -1dB/step and -10dB/step are controlled
independently.
‧ Good PSRR and low pop noise.
‧ I2C interface.
‧ Housed in 16 pin SOP, SSOP package.
DESCRIPTION
The MS6258 is a stereo audio volume controller IC with 4 sets of stereo input. It uses CMOS technology specially
for the low voltage application with low noise, rail-to-rail output. The MS6258 provide an I2C control interface with
gain / attenuation range of 15dB to -79dB. The gain and attenuation, +1dB/step, -1dB/step and -10dB/step are
controlled independently. The initial condition is set to be maximum attenuation –79dB (-70dB + -9dB), gain 0dB and
mute on mode when the power is up.
BLOCK DIAGRAM
L-IN1
L-IN2
L-IN3
L-IN4
Gain 0~15dB
1dB/Step
Attenuation 0~-79dB
-1dB/Step
-10dB/Step
Mute
Control
Serial Bus Decoder and Latches
R-IN1
R-IN2
R-IN3
R-IN4
1dB/Step
-1dB/Step
Gain 0~15dB
L-OUT
-10dB/Step
R-OUT
Attenuation 0~-79dB
REF
Reference
Circuit
I2C Interface
SDA
REV 6
SCL
1
VREF
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
PIN CONFIGURATION
Symbol
Pin
Description
A.O.
1
Address option *
L-IN4
2
4th left channel input
L-IN3
3
3rdleft channel input
L-IN2
4
2nd left channel input
L-IN1
5
1st left channel input
L-OUT
6
Left channel output
VSS
7
Ground
SDA
8
A.O.
1
16 VREF
L-IN4
2
15 R-IN4
L-IN3
3
14 R-IN3
L-IN2
4
2
2
9
I C clock input
VDD
10
Positive supply voltage
R-OUT
11
Right channel output
13 R-IN2
MS6258
I C data input
SCL
MS6258
L-IN1
5
12 R-IN1
L-OUT
6
11 R-OUT
VSS
7
10 VDD
SDA
8
9
st
R-IN1
12
1 right channel input
R-IN2
13
2nd right channel input
rd
R-IN3
14
3 right channel input
R-IN4
15
4th right channel input
VREF
16
Reference voltage = 1/2VDD
SCL
Note: 1. Pin 1 is set to Lo or open , the address code is 88H (10001000B).
2. Pin 1 is set to Hi , the address code is 8CH (10001100B).
3. The VREF connects a capacitor to Vss.
ORDERING INFORMATION
Package
Part number
Packaging Marking
Transport Media
16-Pin SOP (lead free)
MS6258GTR
MS6258ASG
2.5k Units Tape and Reel
16-Pin SOP (lead free)
MS6258GU
MS6258ASG
50 Units Tube
16-Pin SSOP (lead free)
MS6258SSGTR
MS6258G
2.5k Units Tape and Reel
16-Pin SSOP (lead free)
RoHS Compliance
MS6258SSGU
MS6258G
100 Units Tube
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDD
Supply Voltage
VESD
Electrostatic Handling
TSTG
Storage Temperature Range
TA
Operating Ambient Temperature Range
TJ
Rating
Unit
6.5
V
-4500 to 4500
-65 to 150
V
℃
-40 to 85
℃
Maximum Junction Temperature
150
℃
TS
Soldering Temperature, 10 seconds
260
℃
RTHJA
Thermal Resistance from Junction to Ambient in Free Air
SOP16
SSOP16
210
210
℃/W
REV 6
2
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
OPERATING RATINGS
Symbol
VDD
Parameter
Supply Voltage
Min
Typ
Max
Unit
2.7
-
6.5
V
5V ELECTRICAL CHARACTERISTICS
(VDD=5.0V, VSS=0V, Attenuation=0dB, Gain=0dB, f=1kHz, VO=0dBV, VREF Cap=10uF; unless otherwise specified)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
DC Characteristics
IQ
Quiescent current
AGA
Gain/Attenuation
ASTEP
-
3.8
4.2
mA
Max gain
-
15
-
dB
Max attenuation
-
-79
-
dB
Gain/Attenuation step
-
1
-
dB
EGA
Gain/Attenuation step error
-
0.3
-
dB
CS
Channel separation
95
105
-
dB
PSRR
Power supply rejection ratio
Vripple = -20dBV, 100Hz
-
53
-
dB
MUTE
Mute Attenuation
Vin=0dBV
-
85
-
Rin
Input Impedance
18
20
-
dB
kΩ
Rout
Output Impedance
-
50
100
Ω
-
4.8
-
Vpp
-
-69
-64
dB
95
100
-
dB
AC Characteristics
Vo
Maximum output voltage swing
THD+N
Total harmonic distortion plus
noise
S/N
Signal-to-noise ratio
(THD+N)/S < 0.1%
VO=4.5Vpp
Bus Characteristics
VIH
Bus high input level
-
-
0.7VDD
V
VIL
Bus low input level
0.3VDD
-
-
V
REV 6
3
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
3.3V ELECTRICAL CHARACTERISTICS
(VDD=3.3V, VSS=0V, Attenuation=0dB, Gain=0dB, f=1kHz, VO=-3dBV, VREF Cap=10uF; unless otherwise specified)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
DC Characteristics
IQ
Quiescent current
CS
Channel separation
PSRR
Power supply rejection ratio
MUTE
Mute Attenuation
-
3.7
4.1
mA
90
100
-
dB
Vripple = -20dBV, 100Hz
-
52
-
dB
Vin=-3dBV
-
80
-
dB
(THD+N)/S < 0.1%
-
3
-
Vpp
-
-69
-64
dB
85
90
-
dB
AC Characteristics
Vo
Maximum output voltage swing
THD+N
Total harmonic distortion plus
noise
S/N
Signal-to-noise ratio
2.7V ELECTRICAL CHARACTERISTICS
(VDD=2.7V, VSS=0V, Attenuation=0dB, Gain=0dB, f=1kHz, VO=-3dBV, VREF Cap=10uF; unless otherwise specified)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
DC Characteristics
IQ
Quiescent current
-
3.2
3.6
mA
CS
Channel separation
90
100
-
dB
PSRR
Power supply rejection ratio
Vripple = -20dBV, 100Hz
-
50
-
dB
MUTE
Mute Attenuation
Vin=-3dBV
-
80
-
dB
(THD+N)/S < 0.3%
-
2
-
Vpp
-
-69
-64
dB
85
90
-
dB
AC Characteristics
Vo
Maximum output voltage swing
THD+N
Total harmonic distortion plus
noise
S/N
Signal-to-noise ratio
REV 6
4
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
TYPICAL PERFORMANCE CHARACTERISTICS
(Ta=25℃, VREF Cap=10uF; unless otherwise specified)
THD+N (%)
f=20Hz
THD+N (%)
f=20Hz
THD+N (%)
f=20Hz
f=20kHz
f=1kHz
f=1kHz
VDD=5V
VDD=3.3V
f=20kHz
VDD=2.7V
OUTPUT VOLTAGE (dBV)
OUTPUT VOLTAGE (dBV)
THD+N vs. output voltage
THD+N vs. output voltage
VDD=5V
VO=0dBV
VDD=3.3V
VO=-3dBV
VDD=2.7V
VO=-3dBV
VDD=3.3V
VO=-3dBV
VDD=2.7V
VO=-3dBV
VDD=5V
VO=0dBV
QUIESCENT CURRENT (mA)
OUTPUT VOLTAGE (dBV)
THD+N vs. output voltage
CHANNEL SEPARATION (dB)
THD+N (%)
f=1kHz
f=20kHz
FREQUENCY (Hz)
FREQUENCY (Hz)
SUPPLY VOLTAGE (V)
THD+N vs. frequency
Channel separation vs. frequency
Quiescent current vs. supply voltage
CAP=22uF
CAP=22uF
CAP=2.2uF
CAP=10uF
CAP=2.2uF
PSRR (dB)
CAP=10uF
PSRR (dB)
PSRR (dB)
CAP=22uF
CAP=10uF
CAP=2.2uF
VDD=5V
VRR=-20dBV
REV 6
VDD=3.3V
VRR=-20dBV
VDD=2.7V
VRR=-20dBV
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
PSRR vs. frequency
PSRR vs. frequency
PSRR vs. frequency
5
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
I2C BUS DESCRIPTION
Start and stop conditions
A start condition is activated when the SCL is set to HIGH and SDA shifts from HIGH to LOW state. The stop
condition is activated when SCL is set to HIGH and SDA shifts from LOW to HIGH state. Please refer to the timing
diagram below.
SCL
SDA
Stop
Start
SCL : Serial Clock Line, SDA : Serial Data Line
Data validity
A data on the SDA line is considered valid and stable only when the SCL signal is in HIGH state. The HIGH and
LOW states of the SDA line can only change when the SCL signal is LOW. Please refer to the figure below.
SDA
SCL
Data line
stable,
Data valid
Data
change
allowed
Byte format
Every byte transmitted to the SDA line consists of 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transmitted first.
Acknowledge
During the Acknowledge clock pulse, the master (up) put a resistive HIGH level on the SDA line. The peripheral
(audio processor) that acknowledges has to pull-down (LOW) the SDA line during the Acknowledge clock pulse so that
the SDA line is in a stable LOW state during this clock pulse. Please refer to the diagram below.
SCL
1
2
3
7
8
9
SDA
MSB
Acknowledge
Start
The audio processor that has been addressed has to generate an Acknowledge after receiving each byte, otherwise,
the SDA line will remain at the HIGH level during the ninth (9th) clock pulse. In this case, the master transmitter can
generate the STOP information in order to abort the transfer.
REV 6
6
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
Timing of SDA and SCL bus lines
SDA
tf
tLOW
SCL
S
tHD;STA
tSU;DAT
tr
tHD;DAT
Standard mode
Symbol
fSCL
tHD;STA
tf
tHIGH
tSU;STA
Parameter
Sr
tSP
tBUF
tr
tSU;STO
P
S
Min
Max
Unit
0
100
kHz
4.0
-
us
tLOW
SCL clock frequency
Hold time (repeated) START condition.
After this period, the first clock pulse is generated
LOW period of the SCL clock
4.7
-
us
tHIGH
HIGH period of the SCL clock
4.0
-
us
tSU:STA
4.7
-
us
0
3.45
us
tSU:DAT
Set-up time for a repeated START condition
Data hold time:
For I2C-bus devices
Data-set-up time
250
-
ns
tr
Rise time of both SDA and SCL signals
-
1000
ns
tf
Fall time of both SDA and SCL signals
-
300
ns
tSU:STO
Set-up time for STOP condition
4.0
-
us
tBUF
Bus free time between a STOP and START condition
4.7
-
us
Cb
Capacitive load for each bus line
-
400
pF
VnL
Noise margin at the LOW level for each connected device (including
0.1VDD
hysteresis)
-
V
VnH
Noise margin at the HIGH level for each connected device (including
0.2VDD
hysteresis)
-
V
tHD:STA
tHD:DAT
REV 6
7
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
BUS INTERFACE
Data are transmitted to and from the MCU to the MS6258 via the SDA and SCL. The SDA and SCL make up the
BUS interface. It should be noted that pull-up resistors must be connected to the positive supply voltage.
VDD
Rp
Rp
Pull up resistors
SDA (Serial Data Line)
SCL (Serial Clock Line)
MCU
MS6258
Interface protocol
The format consists of the following
‧A START condition
‧A chip address byte including the MS6258 address. (7bits)
‧The 8th bit of the byte must be “0”.(write=0, read=1)
‧MS6258 must always acknowledge the end of each transmitted byte.
‧A data sequence (N-bytes + Acknowledge)
‧A STOP condition
SDA
SCL
1-7
8
9
1-7
ADDRESS
-R /W
ACK
8
9
1-7
8
9
S
START
CONDITION
P
DATA
ACK
DATA
ACK
STOP
CONDITION
Protocol Address
Pin1(A.O.) = High
Pin1(A.O.) = Low or Open
1
0
0
0
1
0
7 bits address
0
0
1
W
0
0
1
1
7 bits address
MS6258 address
REV 6
0
0
0
W
MS6258 address
8
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
Data bytes description
Function bits
MSB
LSB
Function
1
1
1
1
1
1
1
1
Function off (-79dB)
1
1
0
1
A3
A2
A1
A0
2-channel, -1dB/step
1
1
1
0
0
B2
B1
B0
2-channel, -10dB/step
1
0
1
0
A3
A2
A1
A0
Left channel, -1dB/step
1
0
1
1
0
B2
B1
B0
Left channel, -10dB/step
0
0
1
0
A3
A2
A1
A0
Right channel, -1dB/step
0
0
1
1
0
B2
B1
B0
Right channel, -10dB/step
1
1
0
0
C3
C2
C1
C0
2-channel, +1dB/step
0
1
1
0
C3
C2
C1
C0
Left channel, +1dB/step
0
1
0
1
C3
C2
C1
C0
Right channel, +1dB/step
0
0
0
0
Stereo1
0
0
0
1
Stereo2
0
1
0
1
0
0
1
1
0
0
1
0
Stereo3
0
0
1
1
Stereo4
0
0
0
1
Power off preparation (pop noise free)
1
0
0
1
2-channel, mute On
1
0
0
0
2-channel, mute Off
Gain / Attenuation bits
A3
A2
A1
A0
-
B2
B1
B0
C3
C2
C1
C0
0
0
0
0
0
0
Attenuation (dB)
A
B
C
0
0
0
0
0
1
-1
-10
+1
0
1
0
-2
-20
+2
0
0
1
1
-3
-30
+3
0
1
0
0
-4
-40
+4
0
1
0
1
-5
-50
+5
0
1
1
0
-6
-60
+6
0
1
1
1
-7
-70
+7
1
0
0
0
-8
-
+8
1
0
0
1
-9
-
+9
1
0
1
0
-
-
+10
1
0
1
1
-
-
+11
1
1
0
0
-
-
+12
1
1
0
1
-
-
+13
1
1
1
0
-
-
+14
-
+15
1
1
1
1
1. Attenuation bit, Ax = -1dB/step, Bx = -10dB/step
2. Gain bit, Cx = +1dB/step
3. Total gain / attenuation equal Ax + Bx + Cx.
4. The function of power off preparation is to prevent pop noise when power off.
REV 6
Gain (dB)
9
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
Example
Mute off
The initial condition is –79dB and mute on when power on. The first command must disable the mute function.
MSB
Start
1
Data byte
LSB
0
0
0
1
0
0
0
ACK
0
1
1
MS6258 address
1
1
0
0
0
ACK
Stop
2-ch, Mute off
Set gain of 2 channel at 0dB, and selected stereo 1 input.
Start
MS6258 Address
ACK
1
1
1
0
0
0
0
0
ACK
1
2-ch, -10dB/step, 0dB
1
1
0
0
0
0
0
0
0
ACK
1
0
0
0
0
1
0
1
0
0
0
0
ACK
0
ACK
0
ACK
1
ACK
2-ch, -1dB/step, 0dB
0
0
ACK
Stop
Stereo 1 input
2-ch, +1dB/step, 0dB
Set gain of 2 channel at 6dB, and selected stereo 2 input.
The value of attenuation must be set zero when the volume from attenuation to gain.
Start
MS6258 Address
ACK
1
1
1
0
0
0
0
0
ACK
1
2-ch, -10dB/step, 0dB
1
1
0
0
0
1
1
0
0
ACK
1
0
2-ch, +1dB/step, 6dB
0
0
0
1
0
1
0
0
0
2-ch, -1dB/step, 0dB
0
1
ACK
Stop
Stereo 2 input
Set gain of 2 channel at -3dB, and selected stereo 3 input.
The value of gain must be set zero when the volume from gain to attenuation.
Start
MS6258 Address
ACK
1
1
0
0
0
0
0
0
ACK
1
2-ch, +1dB/step, 0dB
1
1
0
1
0
0
1
1
ACK
0
1
0
2-ch, -1dB/step, -3dB
0
0
0
1
1
0
0
0
0
2-ch, -10dB/step, 0dB
1
0
ACK
Stop
Stereo 3 input
Set attenuation of left channel at –33dB, and selected stereo 4 input.
Start
MS6258 Address
ACK
1
0
1
1
0
0
1
1
L-ch, -10dB/step, -30dB
0
1
0
0
0
0
1
1
ACK
ACK
1
0
1
0
0
0
1
L-ch, -1dB/step, -3dB
Stop
Stereo 4 input
REV 6
10
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
An example of the volume control.
(Volume = Ax + Bx + Cx)
Set two channels at 0dB. (Ax + Bx + Cx = 0dB + 0dB + 0dB)
next, the volume changes from 0dB to -9dB.
(Ax + Bx + Cx = -9dB + 0dB + 0dB)
next, the volume changes from -9dB to -19dB.
(Ax + Bx + Cx = -9dB + -10dB + 0dB)
next, the volume changes from -19dB to -20dB. (Ax + Bx + Cx = 0dB + -20dB + 0dB)
Start
MS6258 Address
ACK
1
1
1
0
0
0
1
2-ch, -10dB/step, -20dB
0
ACK
1
1
0
1
0
0
0
0
ACK
Stop
2-ch, -1dB/step, 0dB
next, the volume changes from -20dB to -14dB. (Ax + Bx + Cx = 0dB + -20dB + 6dB)
next, the volume changes from -14dB to +6dB. (Ax + Bx + Cx = 0dB + 0dB + 6dB)
Note: We suggest the gain is set as the power is up. For example, set and fix the gain +10dB, the volume range will be
controlled from +10dB to –69dB.
REV 6
11
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
APPLICATION INFORMATION
Basic application example
MS6258
8 SDA
VDD
10
MCU
9 SCL
10uF
10uF
5 L-IN1
Lo : Addr 10001000B
Hi : Addr 10001100B
Stereo Signal 2
10uF
10uF
10uF
10uF
10uF
L-OUT
13 R-IN2
6
10k
3 L-IN3
R-OUT
11
10uF
Power
Amplifier
10k
14 R-IN3
10uF
Stereo Signal 4
16
4 L-IN2
10uF
Stereo Signal 3
VREF
12 R-IN1
10uF
47uF
VSS 7
A.O 1
Stereo Signal 1
Supply
0.1uF
2 L-IN4
15 R-IN4
Basic application flowchart
Procedure Of Power Up
Procedure Of Power
Down
Power up
VDD = 5V
Volume Control for
Attenuation
volume down to -79 dB
step by step
Initial Conditions
function off (-79dB)
mute on
Enable Mute Function
mute on
Pop Noise Free
wait 1 sec
Pop Noise Free
power off preparation
wait 0.5 sec
Disable Mute Function
mute off
Power down
VDD = 0V
Setting Gain
Set the max signal
Volume Control for
Attenuation
volume up/down
step by step
1. The initial condition is –79dB, gain 0dB and mute on when power on.
2. In order to prevent pop noise when power on, please wait 1 sec to transmit I2C command.
REV 6
12
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
EXTERNAL DIMENSIONS
SOP16
D
Detail A
F H
Symbol
A
A1
B
C
e
D
H
E
L
h
θ
h x 45
C
A
e
B
Dimension in mm Dimension in inch
Min
Max
Min
Max
1.35
1.75
0.0532 0.0688
0.10
0.25
0.0040 0.0098
0.33
0.51
0.013
0.020
0.19
0.25
0.0075 0.0098
1.27 BSC
0.050 BSC
9.80
10.00
0.3859 0.3937
5.80
6.20
0.2284 0.2440
3.80
4.00
0.1497 0.1574
0.40
1.27
0.016
0.050
0.25
0.50
0.0099 0.0196
o
o
o
8
0
8o
0
A1
0.25mm
θ
L
Detail A
SSOP16
D
Detail A
Symbol
A
A1
A2
b
c
e
D
E
E1
L
h
L1
ZD
R1
R
θ
θ1
θ2
E1 E
H x 45
c
ZD
A2 A
θ2
e
b
Dimension in mm Dimension in inch
Min
Max
Min
Max
1.35
1.75
0.053
0.069
0.10
0.25
0.004
0.010
1.50
0.059
0.20
0.30
0.008
0.012
0.18
0.25
0.007
0.010
0.635 BASIC
0.025 BASIC
4.80
5.00
0.189
0.197
5.79
6.20
0.228
0.244
3.81
3.99
0.150
0.157
0.41
1.27
0.016
0.050
0.25
0.50
0.010
0.020
0.254 BASIC
0.010 BASIC
0.229 REF
0.009 REF
0.20
0.33
0.008
0.013
0.20
0.008
o
o
o
8
0
8o
0
0o
0o
15o
5o
15o
5o
θ1
A1
R1
L1
R
θ
Detail A
REV 6
13
L
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
TAPE AND REEL (Unit : mm)
SOP16
2.00
1.0
1.50 MIN
4.00
0.30
1.5 +0.1/-0.0
0.5
A
1.75
1.0
7.5
0.1
R 0.3 MAX
16.0
10.30
2.10
0.3
A
6.50
R 0.5 TYP
8.00
SECTION A - A
SSOP16
2.0
0.30
0.05
0.05
1.5+0.1/-0.0 DIA
4.0
1.75
0.3R MAX
5.5
0.05
12.0 0.3
5.4
3.0
3.6
8.0
1.5 MIN
6.9
0.5 Radius Typical
2.0 1.7
REV 6
14
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
DEMO BOARD
1
3
1
6
5
2
4
Function description
Label 1: Supply Voltage
The AVDD and DVDD should be the same supply voltage, the supply range is 2.7~6.5 VDC.
Label 2: LED Indicator
The LEDs indicate the chip status and IR received status. It keeps on a light state when the MS6257 is active. The other
hand, keeps on a dark state when the MS6257 is power-off. It is red-dark blink once when the MCU has received the
function code correctly.
Label 3: Reset
All I/O pins are reset to default values. Volume 0dB and Mute on.
Label 4: Input section
Please input stereo audio signal, as music or sine wave.
Label 5: I2C Address option
As the jump is closed, the address code is 88H. As the jump is open, the address code is 8CH.
Label 6: Output section
Please connected to a post-power-amplifier, as stereo speaker.
REV 6
15
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
IR Controller
2-CH+ : The volume-up switch for stereo channel
The volume increase by +1dB as the switch is pressed once, the maximum value is up to +15dB.
The default value is 0dB on initial status.
L-channel and R-channel are active synchronic.
2-CH- : The volume-down switch for stereo channel
The volume decrease by -1dB as the switch is pressed once, the minimum value is up to -79dB.
L-channel and R-channel are active synchronic.
LCH+ : The volume-up switch for left channel
The volume increase by +1dB as the switch is pressed once, the maximum value is up to +15dB.
LCH- : The volume-down switch for left channel
The volume decrease by -1dB as the switch is pressed once, the minimum value is up to -79dB.
RCH+ : The volume-up switch for right channel
The volume increase by +1dB as the switch is pressed once, the maximum value is up to +15dB.
RCH- : The volume-down switch for right channel
The volume decrease by -1dB as the switch is pressed once, the minimum value is up to -79dB.
MUTE : Press the switch once to enter mute-on or mute-off.
The default status is mute-off on initial status.
IN1~IN4 : Stereo channel selection
There are four sets, stereo 1 to 4. The default channel is stereo 1 on initial status.
REV 6
16
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MOSA
MS6258
Gain And Attenuation Volume Controller IC
Circuit
J1
220
1
2
3
0.1u
RX
TX
+ C14
10u
RST
R4
LCD
C4
1
RX
2
3
TX
4
5
IR_IN 6
7
SCL
8
SDA
9
10
10K
+
20P
J4
Y1
12M
AVDD
C5
+
2
1
+ C2
10u
S1
C1
47u
R2
10K
U1
RST
P3.0
P3.1
XTAL2
XTAL1
P3.2
P3.3
P3.4
P3.5
GND
20
19
18
17
16
15
14
13
12
11
Vcc
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
P1.0
P3.7
+
J2
3
2
R3
1K
IR_IN
1
+ C3
J9
D1
LED
VS
GND
IR
IR
470p
A.O.
2
1
+ C13
DVCC
J3
R1
DVCC
1
2
AT89CX51
20P
AVDD
J7
+ C7
0.1u
+ C6
10u
1
3
5
7
9
2
4
6
8
10
INPUT
C15 10u
J10
+
C16
10u
C17 10u
IN3
J12
C18
10u
C19 10u
IN2
J6
C20
+
IN4
J11
J8
OUTPUT
+
+
+
+
IN1
10u
10u
CAP
R-IN4
R-IN3
R-IN2
R-IN1
R-OUT
VDD
SCL
1
2
3
16
15
14
13
12
11
10 AVDD
9 SCL
+
+
C11
MS6258
A.O.
L-IN4
L-IN3
L-IN2
L-IN1
L-OUT
VSS
SDA
10u
C8
J5
C10
OUTPUT
+
+
C9
10u
U3
1
2
3
4
5
6
7
SDA 8
10u
R5
R6
10K 10K
R9 R10R11R12R13R14R7 R8
+
C12
10u
10K10K10K10K10K10K10K10K
W1
Jumper
REV 6
17
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