SANYO LA6242H_09

Ordering number : EN7814D
Monolithic Linear IC
LA6242H
For CD Player
4-channel Bridge (BTL) Driver
Overview
The LA6242H is a 4-channel motor driver IC for home and car CD players. It provides a pin for switching the channel 1
input.
Functions
• Four bridge-connected (BTL) power amplifier circuits
• IO max: 1A
• Built-in level shifter circuits
• Muting circuit (on/off control for all outputs)
• High output voltage (dynamic range): 6.5V (typical, channel 1 only)
• Built-in input operational amplifier (channel 1 only)
• Channel 1 input operational amplifier switching function
• Built-in regulator that uses an external PNP transistor and is set by the value of an external resistor.
• Built-in overheat protection (Thermal shutdown) circuit (Design guarantee)
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Supply voltage
Conditions
VCCS
∗1
VCCP*
VCCP1, VCCP2 ∗1
Ratings
Unit
14
V
14
V
13
V
1
A
Maximum input voltage
VINB
Maximum output current
IO max
MUTE pin voltage
VMUTE
Allowable power dissipation
Pd max
1.8
W
Operating temperature
Topr
-40 to +85
°C
Storage temperature
Tstg
-55 to +150
°C
Each output
Independent IC
Mounted on the specified board ∗2
13
V
0.8
W
*1: All of the power supply pins, VCCS, VCCP1, and VCCP2, must be connected to the power supply system externally to the IC.
*2: Specified board: 114.3mm × 76.1mm × 1.6mm, glass epoxy board.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
21809 MS 20090209-S00004 / 91207 MS 20070828-S00002 / D2506 MS PC 20060623-S00005 / 81004TN (OT) No.7814-1/9
61009 MS 20090522-S00006 /
LA6242H
Recommended Operating Conditions at Ta = 25°C
Parameter
Supply voltage
Symbol
Conditions
Ratings
VCC
Unit
5 to 13
V
Electrical Characteristics at Ta = 25°C,VCCS = VCCP1 = VCCP2 = 8 V, VREF = 2.5 V, MUTE = 5 V
Parameter
Symbol
Conditions
Ratings
min
typ
max
Unit
Overall
Quiescent current 1
ICC-ON
All channel outputs on, MUTE pin: high
30
45
mA
Quiescent current 2
ICC-OFF
All channel outputs off, MUTE pin: low
5
10
mA
Muting function on voltage
VMUTE-ON
MUTE ∗1
Muting function off voltage
VMUTE-OFF
MUTE ∗1
Thermal shutdown
TSD
*4
150
Channel 1, input operational amplifiers A and B
-50
2
V
175
0.5
V
200
°C
+50
mV
6.6
Times
BTL Amplifier (Channel 1) (Output Amplifier Block)
Input amplifier offset voltage
VOFF_OP-AMP
Output voltage
VO1
RL = 8Ω ∗2
6.2
6.5
I/O gain
VG1
∗3
5.4
6
Slew rate
SR1
With the amplifier operating independently, twice
V
0.5
V/µs
the value measured between outputs ∗3,∗4
Input Operational Amplifier
Output offset voltage
VOFF1
Input operational amplifiers A and B
OP-AMP_SINK
OP_SINK
Input operational amplifier sink current
OP-AMP_SOURCE
OP_SOURCE
Input operational amplifier source current
-10
+10
2
300
mV
mA
µA
500
Input Operational Amplifier Switching
Input amplifier switching voltage 1
VIN1-SW
Channel 1, with input operational amplifier B
0.5
V
selected ∗5
Input amplifier switching voltage 2
VIN1-SW
Channel 1, with input operational amplifier A
2
V
selected ∗5
BTL Amplifier (Channels 2 to 4) (Output Amplifier Block)
Output offset voltage
VOFF2
Between the + and - outputs for each channel
Output voltage
VO2
RL = 8Ω, between the + and - outputs for each
channel ∗2
I/O gain
VG2
Slew rate
SR2
+50
-50
5
5.4
5.4
6
mV
V
6.6
Multip
lier
Amplifier independently, twice the value
0.5
V/µs
measured between outputs ∗3,∗4
Regulator Voltage
VREG output voltage
VREG
∗6
REG-IN sink current
REG-IN-SINK
The base current of the external PNP transistor
Line regulation
∆VOLN
6V ≤ VCC ≤ 12V, IO = 200mA
20
150
mV
Load regulation
∆VOLD
5mA ≤ IO ≤ 200mA
50
200
mV
1.21
1.26
5
10
1.31
V
mA
*1: When the MUTE pin is high, the outputs will be on, and when low, the outputs will be off. (In the amplifier output off state, the outputs are in the
high-impedance state.) This operation applies to all channels.
*2: The voltage across the load terminals when an 8Ω load is connected across the outputs. With the input either high or low. With the output in the saturated
state.
*3: The channel 1 input operational amplifier has a 0dB gain, i.e. it is a buffer amplifier.
*4: Design guarantee value
*5: When VIN1-SW is high, operational amplifier A operates, and when low, operational amplifier B operates.
*6: For testing, short the REGOUT to the collector of the external PNP-transistor.
No.7814-2/9
LA6242H
Package Dimensions
unit : mm (typ)
3234B
HEAT SPREADER
15.2
(6.2)
0.65
10.5
7.9
15
(4.9)
28
14
1
0.8
2.0
0.25
0.3
(2.25)
2.45 max
(0.8)
0.1
2.7
SANYO : HSOP28HC(375mil)
Pd max -- Ta
Allowable power dissipation, Pd max -- W
2.5
Specified board: 114.3×76.1×1.6mm3
glass epoxy boaard.
2.0
With specified board
1.8
1.5
1.0
0.8
0.94
Independent IC
0.5
0
-40
0.42
-20
0
20
40
60
80
100
Ambient temperature, Ta -- °C
No.7814-3/9
LA6242H
Block Diagram
"H"
VIN1−A 1
VIN1-SW
"H": OP-AMP_A
"L": OP-AMP_B
−
+
VIN1+A 2
28 VIN1
"L"
−
27 VIN1−B
+
26 VIN1+B
22KΩ
VO1+ 4
−
66KΩ
+
22KΩ
22KΩ
VO1− 5
−
66KΩ +
22KΩ
22KΩ
VO2+ 6
−
66KΩ +
22KΩ
22KΩ
−
VO2− 7
FR FR
+
22KΩ
Level sihifter
66KΩ
Level sihifter
VCCP1 3
11KΩ
24 VIN1-SW
ON/OFF of all output
H: ON
MUTE 23 MUTE
L: OFF
22 VREFIN
−
Power
GND
Power
GND
+
22KΩ
22KΩ
VO3− 9
−
66KΩ +
22KΩ
22KΩ
VO4+ 10
−
66KΩ
+
22KΩ
22KΩ
−
VO4− 11
+
22KΩ
Level sihifter
66KΩ +
Level sihifter
22KΩ
−
25 SGND
+
66KΩ
VO3+ 8
Signal
GND
11KΩ
−
FR FR
Signal
Power supply
21 VCCS
(VCC)
REGIN
−
20 REGOUT
+
REGOUT
19 REGIN
18 VIN2G
11KΩ
11KΩ
VCCP2 12
17 VIN2
−
+
11KΩ
11KΩ
VIN4 13
16 VIN3G
−
+
11KΩ
11KΩ
VIN4G 14
−
15 VIN3
+
No.7814-4/9
LA6242H
Pin Functions
Pin No.
Pin name
Pin description
Channel 1 input amplifier A inverting input
2
VIN1−A
VIN1+A
3
VCCP1
Channels 1 and 2: power stage power supply
4
VO1+
Channel 1 output (+)
5
VO1−
Channel 1 output (−)
6
VO2+
Channel 2 output (+)
7
VO2−
Channel 2 output (−)
8
Channel 3 output (+)
11
VO3+
VO3−
VO4+
VO4−
12
VCCP2
Channels 3 and 4: power stage power supply
13
VIN4
Channel 4 input
14
VIN4G
Channel 4 input (gain adjustment)
15
VIN3
Channel 3 input
16
VIN3G
Channel 3 input (gain adjustment)
17
VIN2
Channel 2 input
18
VIN2G
Channel 2 input (gain adjustment)
19
REGIN
Base connection of external PNP transistor
20
REGOUT
Regulator error amplifier input (+)
21
VCCS
Signal system power supply
22
VREFIN
Reference voltage input
23
MUTE
Output on/off control
24
VIN1-SW
Channel 1 input operational amplifier switching
25
SGND
Signal system ground
26
Channel 1 amplifier B non-inverting input
27
VIN1+B
VIN1−B
28
VIN1
Channel 1 input and input operational amplifier output
1
9
10
Channel 1 input amplifier A non-inverting input
Channel 3 output (−)
Channel 4 output (+)
Channel 4 output (−)
Channel 1 amplifier B inverting input
Note: • The center frame (FR) is used as the power system ground (P-GND). Along with the signal system ground (SGND), this level must be the lowest
potential in the system.
• The VCCS (signal system power supply), VCCP1, and VCCP2 (output stage power supplies) must be shorted together externally.
No.7814-5/9
LA6242H
Pin Description
Pin No.
1
2
26
27
28
Pin name
VIN1−A
VIN1+A
VIN1+B
VIN1−B
VIN1
Function
Description
Input
Inputs
(channel 1)
The total gain is set by setting the gain of
the input amplifier.
Equivalent circuit
VIN1-*
VIN1
VCCS
VIN1+* 300Ω
300Ω
SGND
4
5
VO1+
VO1−
Output
Channel 1 output
VCCS
(channel 1)
VCCP
VO1
SGND
6
7
8
9
10
11
VO2+
VO2−
VO3+
VO3−
VO4+
VO4−
Output
Channel 2 to 4 outputs
VCCS
(channels 2 to 4)
VCCP
VO
SGND
23
MUTE
MUTE
Controls the on/off states of the
corresponding channel output.
VCCS
MUTE = high: Output on
MUTE = low: Output off
∗: When the MUTE pin is open, the
outputs will be off. (The same as when
MUTE
SGND
24
VIN1-SW
Channel 1 input
Channel 1 input operational amplifier
amplifier
switching function. Either amplifier A or
switching
amplifier B is selected according to the
100KΩ 100KΩ
the MUTE pin is low.)
VCCS
voltage applied to the VIN1-SW pin.
High: VIN_A
Low: VIN_B
VIN1-SW 2kΩ
2kΩ
SGND
Continued on next page.
No.7814-6/9
LA6242H
Continued from preceding page.
Pin No.
Pin name
Function
Description
Equivalent circuit
17
VIN2
Input
Inputs
18
VIN2G
(channels 2 to 4)
15
VIN3
16
VIN3G
13
VIN4
VING
14
VIN4G
VCCS
11kΩ
VIN
300Ω
Vref
SGND
22
VREFIN
VREF
Reference voltage
VCCS
VREFIN
300Ω
SGND
REGIN
20
REGOUT
REG
Regulator block
VCCS
100Ω 10kΩ
19
REGIN
300Ω
REGOUT
SGND
No.7814-7/9
LA6242H
MUTE, VIN1-SW
• Relationship between the MUTE pin and the outputs
MUTE
Outputs
CH1
CH2
CH3
H
on
L
off
CH4
Note ∗1: When the outputs are off, they are in the high-impedance state.
∗2: The muting function applies to all channels.
• VIN1-SW and the channel 1 input operational amplifier
VIN1-SW
Channel 1 input operational amplifier
H
AMP_A
L
AMP_B
OP-AMP B
is used
OP-AMP A
is used
OP-AMP A or OP-AMP B is selected
by VIN1-SW
0.5V
VIN1-SW
2V
• Muting
MUTE
Output amplifiers
L
off
H
on
Overview of the input/output relationship
66kΩ
22kΩ
VREFIN
11kΩ
11kΩ
−
+
Level shifter
VIN
VIN−
VIN+
−
+
−
+
−
+
66kΩ
VO1+
−
+
VO1−
22kΩ
−
+
Note: Only channel 1 has an added input operational amplifier.
No.7814-8/9
LA6242H
Application Circuit Example
SLED
INPUT
LOADING/SLED
M
SPINDLE
M
1 VIN1−A
VIN1 28
2 VIN1+A
VIN1−B 27
3 VCCP1
VIN1+B 26
4 VO1+
SGND 25
5 VO1−
VIN1-SW 24
6 VO2+
MUTE 23
7 VO2−
VREFIN 22
FR FR
FOCUS
TRACKING
VCCS 21
9 VO3−
REGOUT 20
10 VO4+
REGIN 19
11 VO4−
VIN2G 18
13 VIN4
TRACKING
INPUT
(
)
14 VIN4G
H:SLED
L:LOADING
FR FR
8 VO3+
12 VCCP2
LOADING
INPUT
)
(
)
(
VCC
VIN2 17
VIN3G 16
VIN3 15
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
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semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
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limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
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product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
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This catalog provides information as of June, 2009. Specifications and information herein are subject
to change without notice.
PS No.7814-9/9