SANYO LV24020LP

Ordering number : ENA0070A
LV24020LP
Bi-CMOS IC
Ultra-compact FM tuner IC for mobile set
Overview
The LV24020LP is FM tuner IC’s that requires absolutely no external components.
They incorporates not only the FM tuner functions as well in a compact VQLP package with dimensions of only
5mm×5mm×0.8mm.
These IC’s are simply ideal for incorporating FM tuner functions into mobile phones and other small mobile set where
space is always at a premium.
Functions
• FM FE
• FM IF
• MPX Stereo Decoder
• Tuning
Features
• No external components
• No alignments necessary
• Fully integrated low IF selectivity and demodulation
• Built in adjacent channel interference total reduction (no 114kHz, no 190kHz)
• Due to new tuning concept, the tuning is independent of the channel spacing
• Very high sensitivity due to integrated low noise RF input amplifier
• Very low power Standby mode. No power switch circuitry required
• MPX output for RDS application
• 3-wire bus interface (Data, Clock, NR-W)
• Digital AFC - Tuner locks to frequency after tuning sequence
• 8 level programmable Soft Mute
• 8 level programmable Stereo Blend
• In combination with the host, fast, low power operation of preset mode, manual search, automatic search and
automatic preset store are possible
• Covers all Japanese, European and US bands
Ver.2.23
71006HKIM No.A0070-1/9
LV24020LP
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
VCC max
VDD max
Digital block supply voltage
Digital input voltage
VIN1 max
Clock, Data, NR_W
VIN2 max
External_clk_in
VDD+0.3
Allowable power dissipation
Analog block supply voltage
Unit
Maximum supply voltage
6.0
V
5.0
V
VDD+0.3
V
Ta ≤ 70°C
Pd max
V
140
mW
Operating temperature
Topr
-20 to +70
°C
Storage temperature
Tstg
-40 to +125
°C
Operating Condition at Ta = 25°C
Parameter
Symbol
Recommended supply voltage
Operating supply voltage range
Conditions
Ratings
Unit
VCC
Analog block supply voltage
3.0
V
VDD
Digital block supply voltage
3.0
V
VCC op
2.7 to 5.0
V
VDD op
2.5 to 4.0
V
1.8 to 4.0
V
VIO op
Interface supply voltage
Note: Power supply voltage VIO equal VDD, or VIO < VDD (VIO ≤ VDD)
Interface Conditions at Ta = -20 to +70°C, VSS = 0V
Parameter
Symbol
Conditions
Supply voltage
VDD
Digital part input
VIH
VIL
IOL
Low level output current
Digital part output
Clock input frequency
External clock frequency
Ratings
min
typ
max
Unit
2.5
4.0
V
High level input voltage range
0.7VDD
VDD
V
Low level input voltage range
0
0.6
2.0
V
mA
VOL
Low level output voltage IOL=2mA
0.6
V
fclk
3wire_bus (29pin) clock frequency
0.7
MHz
14M
Hz
fclk_ext
CLK_IN (31pin) frequency
32k
Note: CLK_IN (31pin) can input sign wave.
No.A0070-2/9
LV24020LP
Operating Characteristics at Ta = 25°C, VCC=3.0V, VDD=3.0V, VOL=14, Soft Mute/Stereo=off
VOL=14 –Block2 register09h Volume_Bit 3-0 = 0010
Parameter
Operational supply current
Symbol
ICCA
Conditions
Ratings
min
Analog Block at 60dBµ input
The 23pin is measured
ICCD
Digital Block at 60dBµ input
The 27, 40 pins are measured.
Standby supply current
ICCA
0.2
Analog standby mode
The 23 pin is measured.
ICCD
Digital standby mode
The 27, 40 pins are measured.
FM coverd frq
F_range
typ
max
Unit
14
17
mA
0.4
0.8
mA
3
30
µA
3
30
µA
108
MHz
76
[FM receiving characteristics ; MONO]: fc=80MHz, fm=1kHz, 22.5kHzdev. soft_stereo, soft_mute, Buss, Treble are all OFF.
Input limiting voltage
Practical sensitivity
-3dB LS
QS1
VIN=60dBµ standard for a -3dB input
13
for 30dB signal to noise ratio input
10
De-emphasis is 75µs SG open
Practical sensitivity
QS2
for 26dB signal to noise ratio input
19
16
EMF
dBµV
EMF
µV
1.25
De-emphasis is 75µs SG close
dBµV
Demodulator output level
VO
VIN=60dBµ, 11pin output level
60
100
140
mV
Channel balance
CB
VIN=60dBµ, ratio of 11pin to 12pin output level
-2
0
2
dB
Signal to noise ratio
S/N
VIN=60dBµ, 11pin output level
48
58
dB
Total harmonic distortion 1 (MONO)
THD1
VIN=60dBµ, 22.5kHzdev, 11pin output
0.4
1.5
Total harmonic distortion 2 (MONO)
THD2
VIN=60dBµ, 75kHzdev, 11pin output
1.3
3
%
8
18
27
dBµ
60
70
Field strength level
Muting attenation
FS
Mute-Att
Input level for FS1 to FS2
VIN=60dBµ, 11pin output level
%
dB
[FM receiving characteristics ; STEREO]: fc=80MHz, fm=1kHz, VIN=60dBµV, L+R=30% (22.5kHzdev), Pilot=10% (7.5kHzdev)
Separation
Total harmonic distortion (STEREO)
SEP
THD-ST
L-mod,11pin→12pin output level
Main-mod (L+R), 11pin/12pin output, IHF_BPF
20
35
0.6
dB
1.8
%
No.A0070-3/9
LV24020LP
Package Dimensions
unit : mm (typ)
3302A
Top View
Bottom View
0.35
5.0
40
(0.7)
0.4
5.0
31
0.35
30
21
20
11
10
1
(0.7)
0.05
0 NOM
0.85MAX
0.2
SANYO : VQLP40(5.0X5.0)
VDD
NC
NC(Vstabi.)
NC
VCC
NC
MPX
NC
NR_W
31
DATA
CLK_IN
CLOCK
Pin Assignment
30
29
28
27
26
25
24
23
22
21
20
NC
32
19
NC
Package-GND
33
18
Package-GND
Package-GND
34
17
Package-GND
Package-GND
35
16
Package-GND
Package-GND
36
15
Package-GND
Package-GND
37
14
Package-GND
Package-GND
38
13
Package-GND
NC
39
12
LINE-OUT-R
VI/O
40
11
LINE-OUT-L
1
2
3
4
5
6
7
8
9
10
GND
RESERVED
NC
FM-ANT
FM-ANT
GND
NC
NC
NC
NC
LV24020LP
VQLP40
Top view
No.A0070-4/9
LV24020LP
VQLP40 package Pin Description
Pin
1
LV24020LP
GND
2
RESERVED
3
NC
Description
Remark
DC_bias
GND (Analog and Digital GND)
Do not connect
4
FM-ANT1
Antenna input
5
FM-ANT2
Antenna GND
6
GND
GND (Analog and Digital GND)
7
NC
8
NC
9
NC
10
NC
11
LINE-OUT-L
Radio Lch Line-output
1.2V
12
LINE-OUT-R
Radio Rch Line-output
1.2V
13
Package-GND
GND for Package-shied
14
Package-GND
GND for Package-shied
15
Package-GND
GND for Package-shied
16
Package-GND
GND for Package-shied
17
Package-GND
GND for Package-shied
18
Package-GND
GND for Package-shied
19
NC
20
NC
21
MPX
22
NC
23
VCC
24
NC
25
Vstabi.
26
NC
27
VDD
Digital supply voltage
28
NR_W
Digital interface Read/Write
29
DATA
Digital interface DATA
30
CLOCK
Digital interface Clock
31
CLK_IN
Reference clock-source input for measurement
32
NC
33
Package-GND
GND for Package-shied
34
Package-GND
GND for Package-shied
35
Package-GND
GND for Package-shied
36
Package-GND
GND for Package-shied
37
Package-GND
GND for Package-shied
38
Package-GND
GND for Package-shied
39
NC
40
VI/O
Connect to GND
MPX-signal output
VCC-0.3V
Analog supply voltage
Stabilizer voltage
2.7V
Connect to GND if not used
Digital interface supply voltage
No.A0070-5/9
LV24020LP
CLOCK
DATA
NR_W
VDD
NC
V_stabi_out
NC
VCC
NC
MPX
Block Diagram
30
29
28
27
26
25
24
23
22
21
External_Clock_IN 31
20 NC
Quadrature
Oscillator
Dgital_interface
NC 32
Tuning
System
19 NC
To Each_Block
Package-GND 33
18 Package-GND
FM Selectivity
Filter
Voltage
Stabilizer
Package-GND 34
17 Package-GND
FM_Demodulator
To
Each_Block
Package-GND 35
RF and FM
Quadrature
Mixer
Power
Management
Package-GND 36
16 Package-GND
Stereo
Decorder
15 Package-GND
Package-GND 37
14 Package-GND
Souce
Mixer
De-emphasis
Package-GND 38
Buffer_AMP
13 Package-GND
NC 39
GND for
All_Block
GND for All_Block
1
2
3
4
5
6
7
8
9
10
RESERVED
NC
FM-ANT
FM-ANT(GND)
GND
NC
NC
NC
NC
11 Line L_out
GND
VIO 40
12 Line R_out
Top view
VQLP40 package
ILV000223
No.A0070-6/9
LV24020LP
Measurement Circuit
NR_W
200Ω
Current Meter
HP 3466A Multimeter
Or Equivalent
SW
A
0.1µF
DATA
200Ω
CLOCK
200Ω
200Ω
External
CLK_IN
MPU
A
VCC
Voltage
Source
SW
22µF
0.1µF
VCC
VDD
DATA
CLOCK
NR_W
SW
In case of
Clock_in usage.
Otherwise not
necessary
30 29 28 27 26 25 24 23 22 21
20
31
32
19
33
18
34
17
14
38
13
39
12
1
2
3
4
5
6
GND
40
(GND)
1000pF
37
GND
RF_SG
Panasonic
FM/AM
Signal_Generator
15
7
8
11
9 10
Line 0.1µF
R-out
Line
L-out
0.1µF
100kΩ
36
VIO
Out_put
16
LV24020LP
100kΩ
35
FM-ANT
External_CLK_IN
SW
Volt_Meter
(or Monitor)
NF
M-174B
AND
KenWood
Audio_Analyzer
VA_2230A
Or Equivalent
VP_8179B10
Or Equivalent
FM_ANT_IN
Top view
VQLP40 package
ILV000224
No.A0070-7/9
LV24020LP
Application Circuit
0.1µF
SW
VCC
22µF
0.1µF
VCC
VDD
DATA
CLOCK
R3 R2 R1
NR_W
R4
In case of
Clock_in usage.
Otherwise not
necessary
200Ω to 1kΩ NR_W
200Ω to 1kΩ DATA
200Ω to 1kΩ CLOCK
External
200Ω to 1kΩ CLK_IN
MPU
30 29 28 27 26 25 24 23 22 21
31
20
32
19
33
18
34
17
35
36
15
37
14
38
13
39
12
2
3
4
5
6
7
8
11
9 10
0.1µF
0.1µF
Line
R_out
Line
L_out
GND
1
(GND)
40
GND
VIO
16
LV24020LP
FM-ANT
External_CLK_IN
FM_ANT_IN 1000pF
BPF
Top view
VQLP40 package
ILV000225
Note1: Vale of External Component is just reference. Please set most suitable value under Acutual_operation.
Note2: In case of necessary about BPF for FM_in, Please take Consideration of most suitable_value.
Note3: We recommend to put R1, R2, R3, R4 for interface between MPU and IC.
Note4: Please put Capacitor Between VDD and GND also, put Capacitor Between VCC and GND as shown
on application.
No.A0070-8/9
LV24020LP
This catalog provides information as of July, 2006. Specifications and information herein are subject
to change without notice.
PS No.A0070-9/9