NC7NZ04 TinyLogic® UHS Inverter Features Description Ultra-High Speed: tPD 2.4ns (Typical) into 50pF at 5V VCC High Output Drive: ±24mA at 3V VCC The NC7NZ04 is a triple inverter from Fairchild’s UltraHigh Speed (UHS) series of TinyLogic®. The device is fabricated with advanced CMOS technology to achieve ultra-high speed with high output drive while maintaining low static power dissipation over a broad VCC operating range. The device is specified to operate over the 1.65V to 5.5V VCC operating range. The inputs and output are high impedance when VCC is 0V. Inputs tolerate voltages up to 7V, independent of VCC operating voltage. Proprietary Noise / EMI Reduction Circuitry Broad VCC Operating Range: 1.65V to 5.5V Power-Down, High-Impedance Inputs / Outputs Over-Voltage Tolerance Inputs Facilitate 5V to 3V Translation IEEC/IEC Space-Saving MicroPak™ and US8 Surface Mount Packages Figure 1. Logic Symbol Figure 2. Connection Diagram Ordering Information Part Number Top Mark NC7NZ04K8X NZ04 NC7NZ04L8X T3 Package Packing Method 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3000 Units on Tape & Reel 8-Lead MicroPak™, 1.6mm Wide 5000 Units on Tape & Reel MicroPak™ is a trademarks of Fairchild Semiconductor Corporation. © 2001 Fairchild Semiconductor Corporation NC7NZ04 • Rev. 1.0.2 www.fairchildsemi.com NC7NZ04 — TinyLogic® UHS Inverter August 2010 Figure 3. US8 Notes: 1. AAA represents product code top mark (see ordering table). 2. Orientation of top mark determines pin one location. Reading the top product code mark left to right, pin one is the lower left pin. NC7NZ04 — TinyLogic® UHS Inverter Pin Configurations Figure 4. MicroPak™ (Top Through View) Pin Definitions Pin # US8 Pin # MicroPak™ Name 1 7 1A Input Description 2 6 3Y Output 3 5 2A Input 4 4 GND Ground 5 3 2Y Output 6 2 3A Input 7 1 1Y Output 8 8 VCC Supply Voltage Function Table Y= /A Inputs Output A Y L H H L © 2001 Fairchild Semiconductor Corporation NC7NZ04 • Rev. 1.0.2 www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC VIN VOUT Parameter Min. Max. Unit Supply Voltage -0.5 7.0 V DC Input Voltage -0.5 7.0 V DC Output Voltage -0.5 7.0 V IIK DC Input Diode Current IOK DC Output Diode Current IOUT DC Output Current ICC or IGND TSTG VIN < -0.5V -50 VIN > 6.0V +20 VOUT < -0.5V -50 VOUT > 6V, VCC=GND +20 DC VCC or Ground Current Storage Temperature Range -65 mA mA ±50 mA ±50 mA +150 °C °C TJ Junction Temperature Under Bias +150 TL Junction Lead Temperature (Soldering, 10 Seconds) +260 °C PD Power Dissipation at +85°C 250 mW Human Body Model, JEDEC:JESD22-A114 4000 Charge Device Model, JEDEC:JESD22-C101 2000 ESD NC7NZ04 — TinyLogic® UHS Inverter Absolute Maximum Ratings V Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VCC VIN VOUT TA tr , tf θJA Parameter Conditions Min. Max. Supply Voltage Operating 1.65 5.50 Supply Voltage Data Retention 1.5 5.5 Unit V Input Voltage 0 5.5 V Output Voltage 0 VCC V -40 +85 °C VCC at 1.8V, 2.5V ± 0.2V 0 20 VCC at 3.3V ± 0.3V 0 10 VCC at 5.0V ± 0.5V 0 5 Operating Temperature Input Rise and Fall Times Thermal Resistance US8 250 MicroPak™ 287 ns/V °C/W Note: 3. Unused inputs must be held HIGH or LOW. They may not float. © 2001 Fairchild Semiconductor Corporation NC7NZ04 • Rev. 1.0.2 www.fairchildsemi.com 3 Symbol Parameter VIH HIGH Level Input Voltage VIL LOW Level Input Voltage VCC TA=25°C Conditions Min. 0.75VCC 2.30 to 5.50 0.70VCC 0.70VCC 0.25VCC 2.30 to 5.50 0.30VCC 0.30VCC VIN=VIL, IOH=-100µA 4.50 HIGH Level Output Voltage ICC Quiescent Supply Current 2.20 3.00 2.90 4.50 4.40 1.52 1.29 2.30 IOH=-8mA 1.90 2.15 1.90 3.00 IOH=-16mA 2.40 2.80 2.40 3.00 IOH=-24mA 2.30 2.68 2.30 4.50 IOH=-32mA 3.80 4.20 VIN=VIH, IOL=100µA V V 3.80 0.00 0.10 0.10 0.00 0.10 0.10 0.00 0.10 0.10 0.00 0.10 0.10 0.80 0.24 0.24 V 1.65 IOL=4mA 2.30 IOL=8mA 0.10 0.30 0.30 3.00 IOL=16mA 0.15 0.40 0.40 3.00 IOL=24mA 0.22 0.55 0.55 4.50 IOL=32mA 0.22 0.55 0.55 0 ≤ VIN ≤ 5.5V ±1 ±1 µA VIN or VOUT=5.5V 1 10 µA 1 10 µA 0 to 5.5 0 1.65 to 5.50 VIN=5.5V, GND © 2001 Fairchild Semiconductor Corporation NC7NZ04 • Rev. 1.0.2 2.30 2.90 4.40 4.50 Power-Off Leakage Current 2.20 1.29 3.00 Input Leakage Current 1.55 IOH=-4mA 2.30 LOW Level Output Voltage 1.65 1.65 1.65 IOFF V 0.25VCC 1.55 Units Max. 1.80 ± 0.15 3.00 IIN Min. 0.75VCC 2.30 VOL Max. 1.80 ± 0.15 1.65 VOH Typ. TA=-40 to 85°C NC7NZ04 — TinyLogic® UHS Inverter DC Electrical Characteristics www.fairchildsemi.com 4 Symbol Parameter VCC TA=25°C Conditions 1.80 ± 0.15 2.50 ± 0.20 tPLH, tPHL Propagation Delay 3.30 ± 0.30 5.00 ± 0.50 3.30 ± 0.30 5.00 ± 0.50 CIN CPD CL=15pF, RL=1MΩ CL=50pF, RL=500Ω TA=-40 to 85°C Min. Typ. Max. Min. Max. 1.8 4.4 9.5 2.0 10.0 0.8 2.9 5.1 0.8 5.6 0.5 2.1 3.4 0.5 3.8 0.5 1.8 2.8 0.5 3.1 1.2 2.9 4.5 1.2 5.0 0.8 2.4 3.6 0.8 4.0 Input Capacitance 0 2.5 Power Dissipation Capacitance(4) 3.30 9 5.00 11 Units Figure ns Figure 5 Figure 6 pF pF Figure 7 Note: 4. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output lading and operating at 50% duty cycle. CPD is related to ICCD dynamic operating current by the expression: ICCD=(CPD)(VCC)(fIN)+(ICCstatic). NC7NZ04 — TinyLogic® UHS Inverter AC Electrical Characteristics Dynamic Switching Characteristics Symbol Parameter Conditions VOLP Quiet Output Dynamic Peak VOL VOLV Quiet Output Dynamic Valley VOL VCC CL=50pF, VIH=5.0V, VIL=0V TA=25°c Unit Typ. 5.0 0.8 V 5.0 -0.8 V Note: 5. CL includes load and stray capacitance; inputs PRR=1.0MHz, tW =500ns. Figure 5. AC Test Circuit Figure 6. AC Waveforms Note: 6. Input=AC Waveform; tr=tf=1.8ns; PRR=10MHz; Duty Cycle =50%. Figure 7. ICCD Test Circuit © 2001 Fairchild Semiconductor Corporation NC7NZ04 • Rev. 1.0.2 www.fairchildsemi.com 5 NC7NZ04 — TinyLogic® UHS Inverter Physical Dimensions 2.10 1.90 0.15 A 1.80 B 5 8 (8X) 0.70 3.20 3.00 2.40 2.20 2.70 3.40 1.00 1.55 1 PIN 1 IDENT 4 0.2 C B A ALL LEAD TIPS 0.50 TOP VIEW 0.30 (8X) RECOMMENDED LAND PATTERN 0.80 0.60 0.90 MAX 0.10 0.00 ALL LEAD TIPS 0.1 C A. CONFORMS TO JEDEC REGISTRATION MO-187 B. DIMENSIONS ARE IN MILLIMETERS. SEATING PLANE C C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. 0.17-0.27 (8X) 0.50 0.13 A B C D. DIMENSIONS AND TOLERANCES PER ANSI Y14.5M, 1994. E. FILE DRAWING NAME : MKT-MAB08Arev4 SIDE VIEW DETAIL A 0.4 TYP GAGE PLANE 0.10-0.18 0.12 0°-8° 0.20-0.35 SEATING PLANE DETAIL A Figure 8. 8-Lead US8, JEDEC MO-187, Variation CA, 3.1mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/packaging/US8_Pack_TNR.pdf Package Designator K8X © 2001 Fairchild Semiconductor Corporation NC7NZ04 • Rev. 1.0.2 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 3000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 6 NC7NZ04 — TinyLogic® UHS Inverter Physical Dimensions 0.10 2X C A 1.6 B 1.6 INDEX AREA 0.10 2X C TOP VIEW 0.55 MAX 0.05 0.05 0.00 DETAIL A 8X(0.09) C 8X Recommended Landpattern 0.05 C (0.20) 1.0 2 1 4 (0.1) C 8 4 7 0.35 0.25 3X(0.2) 0.35 0.25 0.5 3 6 5 (0.15) 0.15 8X 0.25 0.35 0.25 0.10 0.05 DETAIL A PIN #1 TERMINAL SCALE: 2X C A B C BOTTOM VIEW Notes: 1. PACKAGE CONFORMS TO JEDEC MO-255 VARIATION UAAD 2. DIMENSIONS ARE IN MILLIMETERS 3. DRAWING CONFORMS TO ASME Y.14M-1994 4. PIN 1 FLAG, END OF PACKAGE OFFSET 5. DRAWING FILE NAME: MKT-MAC08AREV4 MAC08AREV4 Figure 9. 8-Lead, MicroPak™, 1.0mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specification Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf Package Designator L8X © 2001 Fairchild Semiconductor Corporation NC7NZ04 • Rev. 1.0.2 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 3000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 7 NC7NZ04 — TinyLogic® UHS Inverter © 2001 Fairchild Semiconductor Corporation NC7NZ04 • Rev. 1.0.2 www.fairchildsemi.com 8