Ordering number : ENA1978 Bi-CMOS IC Fan Motor Driver LV8162TT Single-Phase Full-Wave Driver Overview The LV8162TT is a driver IC for single-phase fan motors that achieves low-noise operation by using BTL linear output system. As it has a variable speed function in response to the external PWM input signal, it is best suited for driving CPU cooling fans in notebook PCs and other applications that require low power consumption, low noise, and a variable speed function. Functions • Single-phase full-wave operating by BTL output • Speed control available by PWM pin • Hall bias output pin • Built-in lock protection and automatic return circuit • Standby mode and quick start function • Start auxiliary function (50% futy start) • FG (rotation speed detection) signal pin and RD (lock detection) signal pin • Built-in thermal-shutdown (TSD) circuit Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Ratings Unit Maximum supply voltage VCC max 7 Maximum output current IOUT max 0.7 A OUT pin output withstand voltage VOUT max 7 V 10 mA 7 V mA HB pin maximum output current IHB max PWM pin withstand voltage VPWM max FG/RD pin maximum sink current IFG/IRD max 5 FG/RD pin output withstand voltage VFG/VRD max 7 Allowable dissipation Pd max1 Independent IC Pd max2 With specified substrate *1 Operating temperature Topr *2 Storage temperature Tstg V V 200 mW 400 mW -30 to +95 °C -55 to +150 °C Continued on next page. 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If you should intend to use our products for new introduction or other application different from current conditions on the usage of automotive device, communication device, office equipment, industrial equipment etc. , please consult with us about usage condition (temperature, operation time etc.) prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' s products or equipment. 92111 SY 20110901-S00001 No.A1978-1/8 LV8162TT Continued from preceding page. * 1: Specified substrate : 20mm × 10mm × 0.8mm, Paper phenol * 2: Tj max=150°C must not be exceeded Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. Recommended Operating Conditions at Ta = 25°C Parameter Symbol Recommended supply voltage VCC Operating supply voltage range VCC op Hall input voltage range VICM PWM input frequency fPWMIN Conditions Ratings Unit 5.0 V 2.0 to 6.0 V 0.2 to VCC-1.2 V 20 to 60 kHz Electrical Characteristics at Ta = 25°C, VCC = 5V Parameter Symbol Circuit current Ratings Conditions min ICC typ 0.95 ICC st HB pin voltage VHB OUT pin high voltage VOH OUT pin low voltage VOL When IREG = 5mA 0.9 IO = 250mA, source + sink Hall amplifier input offset voltage VINOFS -6 Hall amplifier voltage gain GH 44 PWM pin input low level VPWML VSET = 0.5V 0 PWM pin input high level VPWMH VSET = 0.5V VCC×0.8 FG/RD pin low voltage VFGL/VRDL ICPRTO = ICPC/ICPD FG/RD pin leakage current IFGL/IRDL FG comparator hysteresis width FGHYS Lock detection output ON time LT1 VSET = 0.5V 0.4 Unit max 1.3 1.6 mA 10 30 μA 1.03 1.2 V 0.16 0.23 V 0.1 0.15 V 6 mV 45.5 47 dB VCC×0.2 V 6 V 0.3 V 10 μA ±8 ±16 sec 0.6 0.8 μsec Lock detection output OFF time LT2 IFG = 3mA 4 6 8 Lock detection output ON/OFF ratio LRTO VFG = 5V 8 10 12 V Thermal shutdown operating temperature TSD Design guarantee * 180 °C Thermal shutdown hysteresis width ΔTSD Design guarantee * 30 °C * Design guaranteed value (No measurement is performed.) Package Dimensions unit : mm (typ) 3375 0.5 3.0 4.9 1 2 0.125 0.5 Ambient temperature, Ta -- °C 3.0 12 0.4 Specified board (20 × 10 × 0.8mm3, paper phenol) 0.3 0.2 Independent IC 0.18 0.1 0.09 1.1 MAX (0.85) 0.2 0 --30 --20 0 20 40 60 80 100 120 Ambient temperature, Ta -- °C 0.08 (0.25) Pd max -- Ta 0.5 SANYO : MSOP12(150mil) No.A1978-2/8 LV8162TT Pin Assignment IN1 1 12 RD HB 2 11 FG IN2 3 10 PWM OUT1 4 9 VCC (NC) 5 8 (NC) GND 6 7 OUT2 Top view Truth value table IN1 IN2 PWM OUT1 OUT2 H H L L L L * L H * FG RD H OFF OFF H H L L * OFF L L L L L OFF Mode L Drive (OUT2 → OUT1) L Regeneration OFF Lock protection. See *1 L Drive (OUT1 → OUT2) L Regeneration OFF Lock protection. See *1 L Standby mode. See *2 *1: If no FG pulse switching occurs while the lock detection output is on, the IC enters lock protection mode. *2: If “lock protection operation + PWM input low time” is 750µs or longer is satisfied, the IC enters standby mode. The IC enters standby mode at a low time of 750µs only when the IC is started with low PWM input when the power is turned on. Block Diagram LOCK DETECTION IN1 1 HB 2 OSC 12 RD HB CONTROL TSD 11 FG VCC 10 PWM OUT1 4 9 VCC (NC) 5 8 (NC) GND 6 7 OUT2 + - + + - 3 + IN2 No.A1978-3/8 LV8162TT Application Circuit Example H 1 IN1 RD 12 RDOUT 2 HB FG 11 FGOUT 3 IN2 PWM 10 PWMIN 4 OUT1 VCC 9 5 (NC) (NC) 8 6 GND OUT2 7 *1 [Power stabilization capacitor] Be sure to use the power stabilization capacitor with a capacitance of 1µF or higher. It cannot be removed. The VCC and GND are connected using a pattern that is think and short as possible. When a reverse-connection breakdown prevention diode is used and the supply voltage rises due to a coil kickback or other cause, increase the capacitance of the capacitor or use a zener diode between the power supply and GND to ensure that the absolute maximum rating is not exceeded. This IC performs synchronous rectification for reducing heat generation and improving efficiency. The synchronous rectification can return the current to the power supply side under certain operating conditions. • When the output duty drops suddenly • When the PWM input frequency is low The amount of increase in the supply voltage varies depending on whether a reverse-connection breakdown prevention diode is used, on the size of the power supply capacitor, and fan type, and so rhese factoes must be fully taken into consideration. When the supply voltage rises, in the same way as above, increase the capacitance of the capacitor or use a zener diode between the power supply and GND to ensure that the absolute maximum rating is not exceeded. *2 [HB pin] Constant-voltage output pin. This is used for Hall element bias purposes. If the HB pin is not needed because the bias current to the Hall element is supplied from the power supply, pull this pin down to GND with a resistor of about 1kΩ. The power supply bias and HB pin bias cannot be used at the same time. To adjust the amplitude of the Hall element, insert a resistor between the Hall element and GND. *3 [IN1 and IN2 pins] Hall element signal input pin. The wiring must be made as short as possible to prevent carring of noise. If noise is carried, insert a capacitor between IN1 and IN2 pins. The Hall input level must satisfy the following condition: Difference voltage between IN1 and IN2 > Operating voltage / Hall amplifier gain + Hall amplifier input offset. No.A1978-4/8 LV8162TT *4 [PWM pin] Speed control signal input pin. The PWM pin is pulled up with a 500kΩ resistor inside the IC. The 500kΩ is used for setting full speed when the PWM pin is open, and if speed control is to be performed by open collector (open drain) input, it is necessary to pull up the pin using a resistor of an appropriate value. If speed control is performed using a push-pull input, a pull-up resistor is not required. When the speed control is performed using the open collector input above, or when push-pull input is used and no pull-up resistor is used, the IC can be used without a sequence (power supply and PWM input can be turned on in any order). It is recommended that a resistor of 1kΩ or more is connected in series to protect the pin against misconnection such as ground open and reverse connection. *5 [FG pin] Rotatinal speed detection pin. This is open drain output that can detect the rotational speed by the FG output in response to the ohase switching signal. This pin is held off when in standby mode. Keep this pin open when it is not to be used. It is recommended that a resistor of 1kΩ or more is connected in series to protect the pin against misconnection such as ground open and reverse connection. *6 [RD pin] Lock detection pin. This is open drain output that is low during rotation, off when lockup is detected, and low when in standby mode. Keep this pin open when it is not to be used. It is recommended that a resistor of 1kΩ or more is connected in series to protect the pin against misconnection such as ground open and reverse connection. *7 [Low current consumption during standby] The fan motor controlled using this IC can be set to a current consumption of 10µA (room temperature, typ.) when in standby mode. However, note that it will not become 10µA under any of the following conditions. • When the Hall element bias current is fed from the power supply → The current flowing to the Hall element is increased • When connecting a pull-up resistor to the PWM pin. → Because the PWM pin must be set to low when in standby mode, the current flowing to the pull-up resistor is increased. • When using an RD pin. → Because the RD pin is held low when in standby mode, the current flowing to the pull-up resistor is increased. No.A1978-5/8 LV8162TT Timing Chart Standby/Opearte switchover VCC TSLP PWM TSLP FG HB IN2 IN1 Active Active Standby Active Waiting for FG pulse LT1 Standby *1 TSLP=750µs(Typ) *2 If the PWM signal is held low during the TSLP period and no FG signal switching occurs during the LT1 period, the IC enters standby mode. Only when the power is turned on, if the PWM signal is held low during the TSLP period, the IC enters standby mode. *3 The FG pin is off and the RD pin is low in standby mode. Lock protection Fan conetrained Fan constraint released IN1 IN2 OUT1 OUT2 FG RD Power ON Waiting for FG pulse LT1 Power ON Power OFF Lock protection Reboot FG detection LT2 *1 Both OUT1 and OUT2 are low when lock protection mode is established. *2 In the lock protection period, RD is set to off. After lock protection mode is released, RD is set to low when FG signal is switched (OFF → L or L → OFF) *3 If PWM is held low for a period longer than the TSLP when lock protection mode is established, the IC enters standby mode. *4 Driving starts at 50% duty cycle when the power is turned on, lock protection mode is released, or the IC is returned from standby mode. (period during which FG switches 5 or 6 times) No.A1978-6/8 LV8162TT SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of September, 2011. Specifications and information herein are subject to change without notice. PS No.A1978-7/7