SEMTECH E4707BBG

Edge4707B
Quad Channel Per-Pin
Precision Measurement Unit
TEST AND MEASUREMENT PRODUCTS
Description
Features
The Edge4707B is a precision measurement unit designed
for automatic test equipment and instrumentation.
Manufactured in a wide voltage CMOS process, it is a
monolithic solution for a quad channel per pin PMU.
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Each channel of the Edge4707B features a PMU that can
force or measure voltage over a 15V I/O range, and
supports 4 current ranges: 2 µA, 200 µA, 20 µA, and 2
mA.
Each channel of the Edge4707B features an on-board
window comparator that provides two bits of information:
DUT too high and DUT too low. There is also a monitor
function which provides a real time analog signal
proportional to either the measured voltage or current.
FV / MI Capability
FI / MV Capability
FV / MV Capability
FI / MI Capability
4 Current Ranges (2 µA, 20 µA, 200 µA, 2mA)
–2V to +13V Output Range (Zero Current)
0V to 11V Output Range (Full Scale Current)
FV Linearity to ± .025% FSR
Central PMU Switches
Per Pin Super Voltage Switches
Functional Block Diagram
E_SN_IN
E_FC_IN
The Edge4707B is designed to be a low power, low cost,
small footprint solution to allow high pin count testers to
support a PMU per pin.
CHANNEL 0
45Ω*
100Ω∗
VINP
FORCE
IVIN
1KΩ∗
FV / FI*
MI / MV*
In addition, two independent switches per channel (for a
central PMU force and sense) plus two wide voltage analog
muxes per channel are included.
SENSE
IVMAX
COMPARATORS
DUTLTH
IVMIN
DETECTOR LOGIC
DUTGTL
VOLTAGE MONITOR
IVMON
DISABLE
CHANNEL 1
45Ω∗
100Ω∗
VINP
FORCE
IVIN
1KΩ∗
Applications
•
FV / FI*
MI / MV*
Automated Test Equipment
- Memory Testers
- VLSI Testers
- Mixed Signal Tester
SENSE
IVMAX
COMPARATORS
DUTLTH
IVMIN
DETECTOR LOGIC
DUTGTL
VOLTAGE MONITOR
IVMON
DISABLE
CHANNEL 2
45Ω∗
100Ω∗
VINP
FORCE
IVIN
1KΩ∗
FV / FI*
MI / MV*
SENSE
IVMAX
COMPARATORS
DUTLTH
IVMIN
DETECTOR LOGIC
DUTGTL
VOLTAGE MONITOR
IVMON
DISABLE
CHANNEL 3
45Ω∗
100Ω∗
VINP
FORCE
IVIN
1KΩ∗
FV / FI*
MI / MV*
SENSE
IVMAX
COMPARATORS
DUTLTH
IVMIN
DETECTOR LOGIC
DUTGTL
VOLTAGE MONITOR
IVMON
DISABLE
* Typical values
Revision 3 / December 18, 2002
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
PIN Description
Pin Name
Pin #
Description
VINP[0:3]
C2, F5, H3, L2
Analog voltage input which forces the output voltage (FV/MI mode) (one per
channel).
IVIN[0:3]
C1, F2, H4, J5
Analog voltage input which forces the output current (FI/MV mode) (one per
channel).
FORCE[0:3]
C14, F12, H13, L12
Analog output pin which forces current or voltage.
SENSE[0:3]
C13, G10, H14, K11
Analog input pin which senses voltage.
FV/FI*[0:3]
D10, B8, A6, E6
TTL compatible input which determines whether the PMU is forcing voltage or
forcing current.
MI/MV*[0:3]
B10, A8, C6, D5
TTL compatible input which determines whether the PMU is measuring current
or measuring voltage.
RS0[0:3]
RS1[0:3]
B11, A9, C7, C5
A12, C10, D8, A5
TTL compatible current range select inputs.
IVMIN[0:3]
IVMAX[0:3]
G5, E1, H2, K3
C3, E3, H1, L1
Analog input voltages which establish the lower and upper threshold level for
the measurement comparator.
DUTLTH[0:3]
DUTGTL[0:3]
P11, N9, N7, N5
N11, P9, P7, P5
Digital comparator output that indicates the DUT measurement is less than the
upper threshold and greater than the lower threshold.
DISABLE[0:3]
A11, C9, D7, A4
TTL compatible input which places the IVMON outputs in high impedance.
E_SNSEL[0:3]
D11, E9, B7, B5
TTL switch select for the external SENSE switch for Channels 0–3.
E_SN_IN
L4
Analog output for external SENSE.
E_FC_IN
K5
Analog input for external FORCE signal.
E_FCSEL[0:3]
E10, B9, A7, D6
TTL switch select for the external FORCE switch for Channels 0–3.
I_FCSEL[0:3]
C11, D9, B6, B4
TTL switch select for internal FORCE switch for Channels 0–3.
D13, G11, J14, K10
D14, G12, J13, L11
E12, G14, J10, M14
F11, G13, K12, M13
External resistor input corresponding to Ranges A through D.
RA[0:3], RB[0:3]
RC[0:3], RD[0:3]
RES_IN[0:3]
F10, F13, J12, L13
Revision 3 / December 18, 2002
External resistor input. One side of the external resistors connect to RA[0:3],
RB[0:3], RC[0:3], RD[0:3]. The other side of all resistors connect to RES_IN.
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
PIN Description (continued)
Pin Name
Pin #
Description
IVMON[0:3]
B1, E2, G4, J4
Analog voltage output that provides a real time monitor of either the measured
voltage or measured current level.
COMP1[0:3]
COMP2[0:3]
D4, F1, J2, K4
E5, F3, J1, M1
Internal compensation pins that require an external capacitor connected
between the two pins.
COMP3[0:3]
D2, F4, J3, M2
Internal compensation pin that requires an external capacitor connected
between the pin and ground.
COMP4[0:3]
D1, G2, H5, L3
N/C
A2, A13, A14, B2,
B3, B12, B13, B14,
C4, C12, H10, K7,
M3, M11, N2, N3,
N12, N13, N14, P1,
P2, P12, P13, P14
Internal compensation pin that requires an external capacitor connected
between the pin and the RES_IN pin.
Not connected.
Analog MUX
Switches
VI H [ 0 : 3 ]
K9, M9, M7, M5
Driver High input.
VI H H [ 0 : 3 ]
L10, K8, L7, K6
Super voltage input High.
VI L [ 0 : 3 ]
L9, M8, M6, M4
Driver Low input.
VI L H [ 0 : 3 ]
M10, L8, L6, L5
Super voltage input Low.
SVSEL[0:3]
A10, C8, E7, A3
Select for MUX.
DVH[0:3]
P10, N8, N6, N4
Output High.
DVL[0:3]
N10, P8, P6, P4
Output Low.
Power Pins
VCC[1:4]
A1, D12, E4, E14,
G3, H12, K2, K13
VDD
P3
Positive analog power supply.
Positive digital supply.
VEE[1:4]
D3, E13, G1, H11,
K1, K14, M12, N1
Negative analog power supply.
GND[1:4]
E11, F14, J11, L14
Ground.
Revision 3 / December 18, 2002
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
PIN Description (continued)
A1 Ball Pad
Indicator
Bottom View
12 mm X 12 mm 180 FLEXBGA
P2
P1
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P
N/C
N/C
N2
N1
VDD
N3
DVL3
N4
DUTGTL3
N5
DVL2
N6
DUTGTL2
N7
DVL1
N8
DUTGTL1
N9
DVH0
N10
N/C
DUTLTH0
N11
N12
N/C
N13
N/C
N14
N
N/C
VEE4
M2
M1
N/C
M3
DVH3
M4
DUTLTH3
M5
DVH2
M6
DUTLTH2
M7
DVH1
M8
DUTLTH1
M9
DVL0
M10
N/C
DUTGTL0
M11
M12
N/C
M13
N/C
M14
M
COMP2_3
COMP3_3
L2
L1
N/C
L3
VIH3
VIL3
L4
L5
VIH2
VIL2
L6
L7
VIH1
VIL1
L8
L9
VILH0
L10
N/C
L11
VEE4
L12
RD3
L13
RC3
L14
L
IVMAX3
K
VEE3
COMP2_2
H1
COMP4_3
K3
VCC4
J2
J1
J
VINP3
K2
K1
E_SN_IN
K4
IVMIN3
J3
COMP1_3
J4
COMP1_2
COMP3_2
H2
H3
VILH3
K5
IVMON3
IVMIN2
G2
G1
VINP2
G3
IVIN2
VILH1
VIL0
COMP4_2
VIHH0
RB3
K8
J6
J7
J8
J9
J10
H6
H7
H8
H9
H10
H11
G11
VIHH3
K9
K10
VIH0
VIHH1
IVIN3
H5
H
IVMAX2
VIHH2
K7
E_FC_IN
J5
H4
VILH2
K6
RA3
RC2
A1 Ball Pad Corner Indicator
(No Solder Ball)
K11
SENSE3
J11
GND3
VEE2
G4
G5
G6
G7
G8
G9
G10
IVMON2
F4
IVMIN0
F5
F6
F7
F8
F9
F10
E6
E7
E8
E9
E10
FORCE3
K12
RD2
J12
RESIN3
K13
VCC4
J13
RESIN2
H12
VCC3
G12
GND4
K14
VEE3
J14
RB2
H13
FORCE2
G13
RA2
H14
SENSE2
G14
G
VEE2
VCC3
COMP4_1
F2
F1
F3
SENSE1
RA1
F11
RB1
F12
RD1
F13
RC1
F14
F
IVIN1
COMP1_1
E2
E1
COMP2_1
COMP3_1
E3
E4
VINP1
E5
RESIN0
RD0
E11
FORCE1
E12
RESIN1
E13
GND2
E14
E
IVMIN1
IVMON1
D2
D1
IVMAX1
D3
VCC2
D4
COMP2_0
D5
FV/FI*3
SVSEL2
D6
D7
E_FCSEL3
DISABLE2
C6
C7
E_SNSEL1
D8
D9
E_FCSEL0
D10
GND1
D11
RC0
D12
VEE1
D13
VCC2
D14
D
COMP4_0
COMP3_0
C1
C2
VEE1
C3
COMP1_0
C4
MI/MV*3
C5
RS1_2
I_FCSEL1
C8
C9
SVSEL1
DISABLE1
B8
B9
FV/FI*0
C10
E_SNSEL0
C11
VCC1
C12
RA0
C13
RB0
C14
C
IVIN0
VINP0
B2
B1
N/C
IVMAX0
B3
RS0_3
MI/MV*2
B4
B5
B6
I_FCSEL3
E_SNSEL3
I_FCSEL2
A4
A5
A6
RS0_2
B7
RS1_1
B10
I_FCSEL0
B11
N/C
B12
SENSE0
FORCE0
B13
B14
B
IVMON0
N/C
A2
A1
N/C
A3
E_SNSEL2
A7
FV/FI*1
A8
E_FCSEL1
MI/MV*0
A9
A10
RS0_0
A11
N/C
A12
N/C
A13
N/C
A14
A
VCC1
N/C
1
2
SVSEL3
3
Revision 3 / December 18, 2002
DISABLE3
4
RS1_3
FV/FI*2
5
6
E_FCSEL2
7
4
MI/MV*1
8
RS0_1
9
SVSEL0
10
DISABLE0
11
RS1_0
N/C
12
13
N/C
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
PIN Description (continued)
A1 Ball Pad
Indicator
Top View
SEMTECH
12 mm X 12 mm 180 FLEXBGA
A2
A1
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A
VCC1
N/C
B2
B1
SVSEL3
B3
DISABLE3
RS1_3
FV/FI*2
E_FCSEL2
B4
B5
B6
B7
I_FCSEL3
E_SNSEL3
I_FCSEL2
E_SNSEL2
C4
C5
C6
C7
MI/MV*1
B8
RS0_1
B9
SVSEL0
B10
DISABLE0
B11
RS1_0
B12
N/C
B13
N/C
B14
B
N/C
IVMON0
C2
C1
N/C
C3
E_FCSEL1
MI/MV*0
C8
FV/FI*1
C9
C10
SVSEL1
DISABLE1
RS1_1
D8
D9
D10
RS0_0
C11
N/C
C12
N/C
N/C
C13
C14
SENSE0
FORCE0
D13
D14
C
IVIN0
VINP0
D2
D1
N/C
IVMAX0
D3
D4
RS0_3
D5
MI/MV*2
RS0_2
D6
D7
E_FCSEL3
DISABLE2
E6
E7
I_FCSEL0
D11
N/C
D12
D
COMP4_0
E
IVMIN1
IVMON1
IVIN1
G2
COMP1_0
E4
IVMAX1
F3
COMP1_1
G1
VEE1
E3
F2
F1
F
COMP3_0
E2
E1
VCC2
F4
COMP2_1
G3
MI/MV*3
E5
COMP2_0
F5
COMP3_1
FV/FI*3
RS1_2
E8
I_FCSEL1
E9
SVSEL2
FV/FI*0
E10
E_SNSEL1
E_FCSEL0
F6
F7
F8
F9
F10
VINP1
RESIN0
G4
G5
G6
G7
G8
G9
G10
IVMON2
H4
IVMIN0
H5
H6
H7
H8
H9
H10
E_SNSEL0
E11
GND1
F11
RD0
G11
VCC1
E12
RC0
F12
FORCE1
G12
RA0
E13
RB0
E14
VEE1
F13
VCC2
F14
RESIN1
G13
GND2
G14
G
VEE2
COMP4_1
H2
H1
VCC3
H3
H
IVMAX2
IVMIN2
VINP2
IVIN2
J2
J3
COMP2_2
COMP1_2
COMP3_2
IVMON3
K1
K2
K3
K4
J1
J4
COMP4_2
J5
SENSE1
A1 Ball Pad Corner Indicator
(No Solder Ball)
N/C
J6
J7
J8
J9
J10
K6
K7
K8
K9
K10
RA1
H11
VEE2
J11
RB1
H12
VCC3
J12
RD1
H13
RC1
H14
FORCE2
SENSE2
J13
J14
J
RC2
IVIN3
K5
GND3
K11
RESIN2
K12
RB2
K13
RA2
K14
K
VEE3
VCC4
L2
L1
IVMIN3
L3
COMP1_3
L4
E_FC_IN
L5
N/C
VIHH3
L6
L7
VIHH1
L8
VIH0
L9
RA3
L10
SENSE3
L11
RD2
L12
VCC4
L13
VEE3
L14
L
IVMAX3
M
VINP3
M2
M1
COMP4_3
M3
COMP2_3
COMP3_3
N1
N2
E_SN_IN
M4
N/C
N3
VILH3
M5
VIL3
N4
VILH2
M6
VIH3
N5
VIHH2
M7
VIL2
N6
VILH1
M8
VIH2
N7
VIL0
M9
VIL1
N8
VIHH0
M10
VIH1
N9
VILH0
N10
RB3
M11
N/C
N11
FORCE3
M12
VEE4
N12
RESIN3
M13
GND4
M14
RD3
N13
RC3
N14
N
N/C
VEE4
P2
P1
N/C
P3
DVH3
P4
DUTLTH3
P5
DVH2
P6
DUTLTH2
P7
DVH1
P8
DUTLTH1
P9
DVL0
P10
DUTGTL0
P11
N/C
P12
N/C
P13
N/C
P14
P
N/C
N/C
VDD
DVL3
1
2
3
4
Revision 3 / December 18, 2002
DUTGTL3
5
DVL2
6
DUTGTL2
7
DVL1
8
5
DUTGTL1
9
DVH0
DUTLTH0
N/C
N/C
N/C
10
11
12
13
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
Circuit Description
Circuit Overview
Control Inputs
The Edge4707B is a quad channel parametric test and
measurement unit that can :
• Force Voltage / Measure Current
• Force Current / Measure Voltage
• Force Voltage / Measure Voltage
• Force Current / Measure Current
FV/FI* is a TTL compatible input which determines whether
the PMU forces voltage or current, and MI/MV* is a TTL
compatible input which determines whether the PMU
measures current or voltage. FV/FI* and MI/MV* are
independent for each PMU. Table 1 describes the modes
of operation controlled by these pins.
Each PMU channel can force or measure voltage over a
15V range and force or measure current over four distinct
ranges:
• ± 2 µA
• ± 20 µA
• ± 200 µA
• ± 2 mA.
An on-board window comparator provides two bit output
range classification. Also, a monitor passes a real time
analog voltage which tracks either the measured current
or voltage.
PPMU Functionality
The trapezoid in Figure 1 describes the current-voltage
functionality of the PMU with VCC = 15.5V and
VEE = –4.5V, in Range D.
FV / FI*
MI/MV*
Mode of Operation
0
0
Force Current, Measure Voltage
0
1
Force Current, Measure Current
1
0
Force Voltage, Measure Voltage
1
1
Force Voltage, Measure Current
Table 1.
RS0 and RS1 are TTL compatible inputs to an internal
analog mux which selects an external resistor
corresponding to a desired current range. The truth table
for RS0 to RS1, along with the associated external resistor
values and current ranges, is shown in Table 2. RS0 and
RS1 are independent for each channel of the 4707B.
V
VOUT (@ I = 0) = 13.25V
VCC = +15.5V
VOUT (@ 200 µA) = 12.8V (in Range D)
RS1
RS0
Range
Current
Range
"Nominal" Ext. R
0
0
A
± 2 µA
RA = 1MΩ
0
1
B
± 20 µA
RB = 100KΩ
1
0
C
± 200 µA
RC = 10KΩ
1
1
D
± 2 mA
RD = 1KΩ
VOUT (@ 2 mA) = 11.25V
No restrictions
IMIN (–2 mA)
Table 2.
IMAX (2 mA)
FORCE/SENSE
VOUT (@ 2 mA) = –0.25V
VOUT (@ –200 µA) = –1.8V (in Range D)
VOUT (@ I = 0) = –2.25V
VEE = –4.5V
FORCE is an analog output which either forces a current
or forces a voltage, depending on which operating mode
is selected.
SENSE is a high impedance analog input which measures
the DUT voltage input in the MV operating mode.
NOTE: Negative current implies current is flowing into the 4707 from DUT.
FORCE and SENSE are brought out to separate pins to
allow remote sensing.
Figure 1. PMU Functionality
Revision 3 / December 18, 2002
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
Circuit Description (continued)
IVMON
Force Current Mode
IVMON is a real time analog voltage output which tracks
the sensed parameter.
In the FI mode (FV/FI* = 0), IVIN is a high impedance
analog voltage input that is converted into a current at
the FORCE pin using the following relationship:
In the MV mode, the output voltage displayed at IVMON is
a 1:1 mapping of the SENSE voltage. In the MI mode,
IVMON follows the equation:
Forced Current = IVIN / REXT
IVMON = I(measured) * REXT
(Positive current is defined as current flowing out of the
FORCE pin.) The IVIN input voltage range and forced current (at FORCE) can be seen in Table 4.
Using nominal values for the external resistors (RA, RB,
RC, and RD), a voltage at IVMON of +2V corresponds to
Imax and –2V corresponds to Imin of the selected current
range.
The IVMON pin can also be placed into a high impedance
state by using the DISABLE input (see Table 3).
IVIN
Corresponding
Forced Current
+2V
Imax (full scale)
0V
0
–2V
Imin (full scale)
Table 4.
Disable
MI / MV*
Sensed Parameter
1
X
High Impedance
0
0
Measured Voltage
0
1
Measured Current
Table 3.
Measure Voltage Mode
In the MV mode (MI/MV* = 0), DUT voltage is measured
via the SENSE input pin. Note that EXT_SENSE_SEL = 0
when the Edge4707B SENSE is used. This measured
voltage is also tested with the on-board window comparator.
Force Voltage Mode
Comparator
In the FV mode (FV/FI* = 1), VINP is a high impedance
analog voltage input that maps directly to the voltage forced
at the FORCE pin.
Measure Current Mode
The Edge4707B features an on-board window comparator which provides two-bit measurement range classification. IVMAX and IVMIN are high impedance analog inputs
that establish the upper and lower thresholds for the window comparator.
In the MI mode (MI/MV* = 1), a current monitor is
connected in series with the PMU forcing amplifier. This
monitor generates a voltage that is proportional to the
current passing through it, and is brought out to IVMON.
This voltage (corresponding to the measured current) is
also tested by the on-board window comparator.
In the MI mode, an I/V MAX input of +2V will set the
upper threshold of the window comparator to a voltage
corresponding to +FSC (full-scale current), and an I/V MIN
input of –2V will set the lower threshold to a voltage
corresponding to –FSC (positive current is defined as
current flowing out of the PMU).
DUTGTL the DUTLTH are LVTTL compatible outputs which
indicate the range of the measured parameter in relation
to IVMIN and IVMAX. Comparator functionality is summarized in Table 5 for MI Mode and Table 6 for MV mode.
Revision 3 / December 18, 2002
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
Circuit Description (continued)
TEST CONDITION
DUT LTH
DUT GTL
IVMON > IVMAX
IVMON < IVMAX
0
1
N/A
IVMON > IVMIN
IVMON < IVMIN
N/A
1
0
IVMON < IVMAX
and
IVMON > IVMIN
1
1
Table 5. MI Comparator Truth Table
TEST CONDITION
DUT LTH
DUT GTL
SENSE > IVMAX
SENSE < IVMAX
0
1
N/A
SENSE > IVMIN
SENSE < IVMIN
N/A
1
0
SENSE < IVMAX
and
SENSE >IVMIN
1
1
Table 6. MV Comparator Truth Table
Revision 3 / December 18, 2002
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Revision 3 / December 18, 2002
9
E_SNSEL
EXT_SENSE
SENSE
IVIN
VINP
EXT_FORCE_IN
E_FCSEL
0
1
FV*
FV
1
FV
FV*
COMP2
COMP3
Cext
–
FV*
COMP4
FV
A*
B*
C*
D*
D
A
B
C
D
D*
Cext
C
C*
B
B*
A
A*
Edge4707B Functional Schematic
COMP1
DRIVER
+
Cext
MI ⇒ MI/MV* = 1
MI* ⇒ MI/MV* = 0
FV ⇒ FV/FI* = 1
FV* ⇒ FV/FI* = 0
INT ⇒ I_FCSEL = 1
INT* ⇒ I_FCSEL = 0
Cext's are External Capacitors
FV
40KΩ
40KΩ
FV*
FV
FV*
0
RA
RB
RC
RD
RESIN
INT
INT*
+
INST.
–
INT*
500Ω
INT
MI*
MI
IV_MIN
IV_MAX
MI
MI*
FORCE
DUT_GTL
+
–
0
DUT_LTH
1
+
–
+
–
DISABLE
IVMON
Edge4707B
TEST AND MEASUREMENT PRODUCTS
Circuit Description (continued)
Figure 2. Edge4707B Functional Schematic
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
Circuit Description (continued)
REXT Selection
I_FCSEL
E_FCSEL
FORCE
0
0
HiZ
1
1
Illegal Condition
1
0
VINP
0
1
E_FC_IN
The Edge 4707B is designed for the voltage drop across
RA, RB, RC, and RD to be ≤ 2V with the maximum current
passing through them. However, these resistor values
can be changed to support different applications.
Increasing the maximum current beyond the nominal range
is not recommended. However, decreasing the maximum
current is allowed by increasing the external resistor using
the equation IMAX = 2V / REXT.
Switch Operation on Force and Sense Lines
Each channel of the Edge4707B features two switches
connected to the FORCE output pin (External Force = 45Ω,
Internal Force = 100Ω) and one 1KΩ switch connected
to the SENSE input pin. These switches are controlled by
the TTL compatible inputs I_FCSEL, E_FCSEL, and
E_SNSEL. Switch operation is described in Table 7.
Switch
Switch Select
Name
Open/Close
State on Switch
100Ω, to internal
force circuitry
I_FCSEL
45Ω, to external
force circuitry
E_FCSEL
0 = Open
1 = Closed
1KΩ, to external
sense circuitry
E_SNSEL
0 = Open
1 = Closed
0 = Open
1 = Closed
Table 8.
For external sense operation, the switch controlled by
E_SNSEL can be used to internally connect the SENSE
input pin to the E_SN_IN output pin (see Figure 2). This
allows the user to use the E_SN_IN pin for remote sensing.
Analog MUX
The Edge4707B has a separate analog mux section which
is intended for 12V flash programming signal muxing with
lower, more standard voltages. There are five inputs for
this section, all of which are brought out to external pins
(see Figure 3). The two outputs, DVH and DVL, connect
to driver reference voltages of the Edge720 (or other pin
electronics drivers).
1 KΩ Switches
VIH
DVH
VIHH
VIL
DVL
VILH
Table 7.
SV_SEL
These switches can be configured to route the Edge4707B
for external forcing or sensing operations (see Figure 2).
For external forcing operation, the switch controlled by
I_FCSEL can be used to internally isolate the PMU from
the FORCE output. This enables the user to connect
the FORCE pin to an external device connected to the
E_FC_IN pin using the switch controlled by the E_FC_SEL
input. I_FCSEL and E_FCSEL functionality is described in
Table 8.
Figure 3. Analog MUX Section
(Typically used to provide flash programming and standard
voltages to driver pin electronic references.)
The truth table for SV-SEL is shown in Table 9.
SV_SEL
0
DVH = VIH
DVL = VIL
1
DVH = VIHH
DVL = VILH
(supervoltage)
Table 9. SV-SEL Truth Table
Revision 3 / December 18, 2002
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
Circuit Description (continued)
Short Circuit Protection
The Edge 4707B is designed to survive a direct short circuit
to any legal voltage at the FORCE and SENSE pins, by
virtue of a limited current, which results from the presence
of an external current sense resistor (normally 1 KΩ to
1MΩ) in the FORCE path.
Transient Clamps
The Edge 4707B has on-board clamps to limit the voltage
and current spikes that might result from either changing
the current range or changing the operating mode.
Power Supply Sequencing
In order to avoid the possibility of latch-up, the following
power-up requirements must be satisified:
1. VEE ≤ GND ≤ VDD ≤ VCC at all times
2. VEE ≤ All inputs ≤ VCC
The following power supply sequencing can be used as a
guideline when operating the Edge4707:
Power Up Sequence
1. VCC (substrate)
2. VEE/VDD
3. Digital Inputs
4. Analog Inputs
Power Down Sequence
1. Analog Inputs
2. Digital Inputs
3. VEE/VDD
4. VCC (substrate)
Revision 3 / December 18, 2002
11
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
Application Information
Required External Components (Per Channel)
22 pF
COMP1
COMP2
1 MΩ
RA
100 KΩ
RB
To LVTTL Gate
10 KΩ
DUT LTH
RC
1 KΩ
Edge4707B
To LVTTL Gate
RD
RES_IN
DUT GTL
47 pF
COMP4
FORCE
COMP3
To DUT
100 pF
SENSE
VCC
.1 µF
VEE
VDD
.01 µF
.01 µF
VCC
.1 µF
.01 µF
VEE
VDD
Actual decoupling and compensation
capacitor values depend on the system environment.
Revision 3 / December 18, 2002
12
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
Application Information (continued)
Calibration
Maximum Input Voltage Range for FV Mode
In order to attain a high degree of accuracy in a typical
ATE application, offset and gain errors are accounted for
through software calibration. When operating the
Edge4707B in the Measure Current (MI) or Force Current
(FI) modes, an additional source of error, common mode
error, should be accounted for. Common mode error is a
measure of how the common mode voltage, VCM, at the
input of the current sense amplifier affects the forced or
measured current values (see Figure 4). Since this error
is created by internal resistors in the current sense
amplifier, it is very linear in nature.
In order to ensure that the full-scale output voltage range
(FSV) can be achieved by the 4707B, errors such as gain,
linearity, and offset must be taken into account when
determining the input voltage range required at VINP. The
equations in Table 10 can be used to determine the input
voltage range required at VINP to achieve full scale voltage
(FSV) at the FORCE pin.
VINP (Worst Case)
Using the common mode error and common mode linearity
specifications, one can see that with a small number of
calibration steps (see Applications note PMU-A1), the
effect of this error can be significantly reduced.
FORCE
FSV
Gain
+ VOS + LInearity Error
+ FSV
–FSV
Gain
+ VOS + LInearity Error
– FSV
Table 10.
Example: If it is desired to operate the 4707B with a FV
range of –2V to 13V, the VINP input voltages in Table 11
may be required.
MI Common Mode Error
VOS @ IVMON
CM Linearity
19.5 mV
VINP
FORCE
13.3V
+13V
–2.13V
–2V
CM Error = Slope
Table 11.
2 mV
VCM @ FORCE
VEE + 4.25
–2 mV
VCC – 4.25
–3 mV
NOTE: In some cases, slope may be negative.
Figure 4. Graphical Representation
of Common Mode Error
Revision 3 / December 18, 2002
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
Application Information (continued)
Maximum Input Voltage Range for FI Mode
In order to ensure that the full-scale output current range
(FSC) can be achieved by the 4707B, errors such as
gain, linearity, common mode, and offset must be taken
into account when determining the input voltage range
required at IVIN. The equations in Table 12 can be used
to determine the input voltage range required at IVIN to
achieve full scale current (FSC) at the FORCE pin.
IVIN (Worst Case)
Corresponding
Forced Current
2V
+ VOS + Common Mode Error + Linearity Error
Gain
+ FSC
–2V
+ VOS + Common Mode Error + Linearity Error
Gain
– FSC
Table 12.
Example: To guarantee that the 4707B is capable of
forcing ± 2 mA with REXT = 1KΩ (Range D), the input
voltages in Table 13 may be required.
IVIN
Corresponding
Forced Current
2.15V
2 mA
–2.15V
– 2 mA
Table 13.
Revision 3 / December 18, 2002
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
Package Information
0.10
–A–
D
–B–
PIN Descriptions
Top View
E
E2
D2
Detail B
14
13
12
11
10
9
8
7
6
5
4
3
2
1
A
B
C
D
E
F
Bottom View
G
E1
H
J
K
L
M
N
P
D1
Revision 3 / December 18, 2002
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
Package Information (continued)
Detail A
Side View
A
/ / ccc C
C
/ / bbb C
–C–
A2
f
6
f
A1
aaa C
NX φ b
e
φ0.20
S C A S B S
φ 0.75
S C
4
5
Detail A
Detail B
Dimensional References
NOTES:
1. All dimensions are in millimeters.
2.
‘e’ represents the basic solder ball grid pitch.
3.
‘M’ represents the basic solder ball matrix size, and symbol ‘N’ is
the maximum allowable number of balls after depopulating.
REF.
MIN.
NOM.
MAX.
A
1.30
1.45
1.55
A1
0.30
0.40
0.45
A2
0.65
0.70
0.75
D
11.80
12.00
12.20
D1
10.40 BSC.
D2
11.80
12.00
12.20
‘b’ is measurable at the maximum solder ball diameter parallel
E
11.80
12.00
12.20
to primary datum –C–.
E1
5.
Dimension ‘ccc’ is measured parallel to primary datum –C–.
E2
11.80
12.00
12.20
6.
Primary datum –C– and seating plane are defined by the spherical
b
0.50
0.55
0.60
crowns of the solder balls.
c
4.
10.40 BSC.
0.35
7.
Package surface shall be matte finish charmilles 24 to 27.
aaa
0.15
8.
Package warp shall be 0.050 mm maximum.
bbb
0.20
ccc
0.25
9.
Substrate material base is BT resin.
10. The overall package thickness ‘A’ already considers collapse balls.
Revision 3 / December 18, 2002
16
e
0.725
0.80
0.875
f
0.70
0.80
0.90
M
14
N
180
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Max
Units
Positive Analog Power Supply (relative to GND)
VCC
15.25
15.5
15.75
V
Negative Analog Power Supply (relative to GND)
VEE
–4.75
–4.5
–4.25
V
VCC – VEE
19.5
20
20.5
V
VDD
3.15
3.3
3.45
V
Case Temperature
TC
25
65
˚C
Thermal Resistance of Package (Junction to Case)
θJC
Total Analog Power Supply
Digital Power Supply (relative to GND)
4.1
˚C/W
Absolute Maximum Ratings
Parameter
Symbol
Min
Typ
Max
Units
20
V
Positive Power Supply
VCC
Negative Power Supply
VEE
–10
VCC – VEE
0
21
V
VDD
GND – .5
VCC
V
Digital Inputs
–.5
7.0
V
Analog Inputs
VEE – .5
VCC + .5
V
VCC – VEE
V
4.8
mA
VCC – VEE
V
Total Power Supply
Digital Power Supply
Analog MUX Breakdown Voltage
Current Capability of MUX
External Force and Sense Switch Breakdown Voltage
VI[H, L, HH, LH] –
DV[L, H]
IMUX
–4.8
E_FC_IN – FORCE
E_SN_IN – FORCE
V
Storage Temperature
–55
+125
˚C
Junction Temperature
–65
+125
˚C
260
˚C
Soldering Temperature
Stresses above listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Revision 3 / December 18, 2002
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
DC Characteristics
Power Supplies
Parameter
Symbol
Power Supply Consumption (Note 1)
Positive Supply
Negative Supply
Digital Supply (Quiescent)
Min
Typ
ICC
IEE
IDD
Max
Units
30
30
1
mA
mA
mA
Power Supply Rejection Ratio (Notes 2, 3)
FV/MI Mode
FORCE Pin
@ 100 kHz
@ 500 kHz
@ 1 MHz
FV/MI PSRR
IVMON Pin
@ 100 kHz
@ 500 kHz
@ 1 MHz
FI/MV Mode
FORCE Pin
@ 100 kHz
@ 500 kHz
@ 1 MHz
20
14
11
dB
dB
dB
14
3
1
dB
dB
dB
20
13
13
dB
dB
dB
18
10
7
dB
dB
dB
FV/MI PSRR
IVMON Pin
@ 100 kHz
@ 500 kHz
@ 1 MHz
Force Voltage
Parameter
Symbol
Min
Input Voltage Range @ VINP
VVINP
VEE + 2
Input Bias Current
IVINP
–1
VFORCE
Output Forcing Voltage (positive full scale current
through REXT)
Output Forcing Voltage (zero current through REXT)
Output Forcing Voltage (negative full scale current
through REXT)
Voltage Accuracy
Offset
Gain
Linearity
Temperature Dependence (Note 6)
Temperature Coefficient of Offset
Temperature Coefficient of Gain
Temperature Coefficient of Linearity
Revision 3 / December 18, 2002
Max
Units
VCC – 1.75
V
1
µA
VEE + 2.25
VCC – 4.25
V
VFORCE
VFORCE
VEE + 2.25
VEE + 4.25
VCC – 2.25
VCC – 2.25
V
V
Vos
FV Gain
FV INL
–100
.985
–0.025
100
1.015
+0.025
mV
V/V
%FSR
∆Vos/∆T
∆FVGain/∆T
∆FV INL/∆T
18
Typ
0
±.01
–8
–.2
–2x10–7
µV/˚C
µV/V˚C
%FSR/˚C
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
DC Characteristics (continued)
Measure Current
Parameter
Current Measurement Range
Range A
Range B
Range C
Range D
Current Measurement Accuracy
Measure Current Offset
Gain
Linearity (measured at IVMON)
FORCE = VEE + 4.25 to VCC – 5.25V
FORCE = VCC – 5.25 to VCC – 4.25V
Common Mode Error
Common Mode Linearity
FORCE = VEE + 4.25V to VCC – 4.25V
Temperature Dependence (Note 6)
Temperature Coefficient of Offset
Temperature Coefficient of Gain
Temperature Coefficient of Linearity
Symbol
Min
Typ
Max
Units
–2
–20
–200
–2
2
20
200
2
µA
µA
µA
mA
–150
.985
+150
1.015
mV
.05
.08
% FSR
% FSR
IMEASURE
VOS
MI Gain
MI INL
±.01
–.05
–.08
CM Error
–1.5
1.5
mV/V
∆CM Error
–.05
.05
%FSR
∆Vos/∆T
∆MI Gain/∆T
∆MI INL/∆T
–60
2
5x10–7
µV/˚C
µV/V˚C
%FSR/˚C
Force Current
Parameter
Symbol
Min
Input Voltage Range @ IVIN
VIVIN
–2.25
Input Bias Current
IIVIN
–1
Output Forcing Current
Range A
Range B
Range C
Range D
IFORCE
Compliance Voltage Range
Positive Full-Scale Current through REXT
Zero Current through REXT
Negative Full-Scale Current through REXT
VFORCE
Current Accuracy
Offset
Gain
Linearity (measured at IVMON)
FORCE = VEE + 4.25 to VCC – 5.25V
FORCE = VCC – 5.25 to VCC – 4.25V
Common Mode Error (Note 4)
Common Mode Linearity
FORCE = VEE + 4.25V to VCC – 4.25V
Temperature Dependence (Note 6)
Temperature Coefficient of Offset
Temperature Coefficient of Gain
Temperature Coefficient of Linearity
Revision 3 / December 18, 2002
Max
Units
2.25
V
1
µA
–2
–20
–200
–2
2
20
200
2
µA
µA
µA
mA
VEE + 2.25
VEE + 2.25
VEE + 4.25
VCC – 4.25
VCC – 2.25
VCC – 2.25
V
V
V
–5
.985
5
1.015
% FSR
.05
.08
% FSR
% FSR
Ios
FI Gain
FI INL
–.05
–.08
Typ
0
±.01
CM Error
–3
3
mV/V
∆CM Error
–.05
.05
%FSR
∆Vos/∆T
∆FI Gain/∆T
∆FI INL/∆T
7x10–3
2
1x10–8
19
µV/˚C
µV/V˚C
%FSR/V
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
DC Characteristics (continued)
Measure Voltage
Parameter
Symbol
Min
Voltage Measurement Range
VSENSE
Voltage Measurement Accuracy
Measure Voltage Offset
Gain
Linearity
Vos
MV Gain
MV INL
Temperature Dependence (Note 6)
Temperature Coefficient of Offset
Temperature Coefficient of Gain
Temperature Coefficient of Linearity
Max
Units
VEE + 2.25
VCC – 2.25
V
–100
.985
–.025
100
1.015
.025
mV
∆Vos/∆T
∆MV Gain/∆T
∆MV INL/∆T
Typ
±.01
%FSR
µV/˚C
µV/V˚C
%FSR/˚C
21
0.35
–9x10–8
Digital Inputs (FV/FI*, MI/MV*, RS0, RS1, DISABLE, I_FCSEL, E_FCSEL, E_SNSEL, SV_SEL)
Parameter
Symbol
Min
Typ
Max
Units
0.8
V
Input Low Level
VIL
Input High Level
VIH
2.0
Input Bias Current @ 0V to VDD
IIN
–1
0
1
µA
Symbol
Min
Typ
Max
Units
VE_FC_IN
IE_FC_IN
RON_E_FC_IN
VEE
–25
45
VCC
25
55
V
mA
Ω
Ileak
Ileak
CE_FC_IN
–10
–10
10
10
nA
nA
pF
VE_SN_IN
RON-E_SN_IN
VEE
VCC
1200
V
Ω
Ileak
Ileak
–10
–10
10
10
nA
nA
Ileak
–10
10
nA
14
pF
V
External Force & Sense Switches
Parameter
External Force Switches
Usable Input Voltage Range @ E_FC_IN
Usable Input Current Range @ E_FC_IN
On-resistance
Leakage Current @ E_FC_IN
Switch Open (E_FC_SEL = 0)
Switch Closed (E_FC_SEL = 1)
Input Capacitance
External Sense Switches
Usable Input Voltage Range @ E_SN_IN
On-resistance
Leakage Current
Switch Open (E_SN_SEL = 0)
Switch Closed (E_SN_SEL = 1)
HiZ (Switches Open) Leakage Current (Note 5)
VFORCE = –3V to 13V, FV/FI* = 0
Combined Capacitance of FORCE and SENSE Pins
(Notes 2, 5)
Revision 3 / December 18, 2002
C_FRC_SNS
20
28
1000
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
DC Characteristics (continued)
Analog MUX
Parameter
Usable Input Voltage Range
On-resistance (Force) @ 500 µA
Symbol
Min
Vin
VEE
Typ
600
RON_MUX
Max
Units
VCC
V
1000
Ω
On-resistance Variability (Across full VEE to VCC Range)
∆RON_MUX
400
Ω
Leakage Current
ILEAK_MUX
200
nA
Max
Units
+100
nA
IVMON
Parameter
Leakage in DISABLED Mode
@ IVMON = –2.2V to +13V
Symbol
Min
ILEAK_IVMON
–100
IVMON Output Impedance
Typ
ROUT
Ω
500
Comparator
Parameter
Symbol
Min
IVMAX Voltage Range
IVMAX
IVMIN Voltage Range
Typ
Max
Units
VEE + 1.75
VCC – 1.75
V
IVMIN
VEE + 1.75
VCC – 1.75
V
Comparator Offset (IVMIN, IVMAX)
Vos
–100
+100
mV
Input Bias Current at IVMIN, IVMAX
Ibias
–1
+1
µA
Digital Outputs (DUTLTH, DUTGTL)
Parameter
Symbol
Output Low Level
@ IOL = –200 µA
VOL
Output High Level
@ IOH = 200 µA
VOH
Min
2.4
Typ
Max
Units
400
mV
VDD
V
Above DC Characteristic specifications are guaranteed over full Recommended Operating Condition ranges unless otherwise
noted.
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Under no load conditions.
Guaranteed by design and characterization. Not production tested.
PSRR is tested from VCC/VEE supplies to FORCE and IVMON outputs. Characterized in FV/MI and FI/MV modes.
The mV/V units shown are derived as follows: (∆offset current * range resistance) / ∆output force voltage.
Test Conditions: E_FC_SEL = I_FC_SEL = 0; FV/FI* = 0, FORCE and SENSE tied together over full-scale
voltage range.
Temperature coefficients are valid over a 25˚C to 65˚C case temperature range unless otherwise noted.
Revision 3 / December 18, 2002
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
AC Characteristics
Force Voltage/Measure Current
Parameter
Symbol
FORCE Output Voltage Settling Time (Notes 1, 2)
To 0.1% of final value (CFORCE/SENSE = 100 pF)
Range A
Ranges B, C, D
Min
Typ
Max
Units
45
530
110
µs
µs
50
1.4
110
ms
µs
28
110
µs
60
60
ns
ns
40
µs
4
nF
Max
Units
2
250
ms
µs
1.75
225
ms
µs
60
60
ns
ns
40
µs
4
nF
tsettle
Measured Current Settling Time (Notes 1, 4)
To 0.1% of final value (CFORCE/SENSE = 100 pF)
Range A
Ranges B, C, D
tsettle
To 2% of final value (CFORCE/SENSE = 150 pF)
Ranges B, C, D
tsettle
I/V Monitor (Note 3)
DISABLE True to HiZ Propagation Delay
DISABLE False to Active Propagation Delay
tz
toe
Force Amp Saturation Recovery Time
tsat
Capacitive Loading Range for Stable Operation (FORCE)
11
CLOAD
Force Current/Measure Voltage
Parameter
Symbol
FORCE Output Current Settling Time (Notes 1, 5)
(To 0.1% of final value)
Range A
Ranges B, C, D
tsettle
SENSE (Measure) Voltage Settling Time (Notes 1, 6)
(To 0.1% of final value)
Range A
Ranges B, C, D
tsettle
I/V Monitor (Note 3)
DISABLE True to HiZ Propagation Delay
DISABLE False to Active Propagation Delay
tz
toe
Force Amp Saturation Recovery Time
tsat
Capacitive Loading Range for Stable Operation (FORCE)
Revision 3 / December 18, 2002
CLOAD
22
Min
Typ
11
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
AC Characteristics (continued)
Analog MUX
Parameter
Symbol
Switch Propagation Delay (Note 3)
Min
Typ
tpd
Max
Units
60
ns
Max
Units
25
µs
Comparator
Parameter
Symbol
Propagation Delay
tpd
Min
Typ
AC Test Conditions (unless otherwise noted): COMP1 to COMP2 = 22 pF, COMP3 = 100 pF to Ground,
COMP4 = 47 pF to RES_IN, Capacitive Load at FORCE/SENSE combined output = 150 pF to GND,
Capacitive Load at IVMON = 2 nF to GND,
Note 1:
Note 2:
Note 3:
Settling times are not production tested. Guaranteed by characterization.
Measured from 2V step at VINP to FORCE output.
Not production tested. Guaranteed by characterization.
Test Conditions for Characterization:
1. 15 pF load on output
2. input signal has 5 ns rise/fall time
3. tpd is defined as the difference between the time when the input crosses 1.5V to when the output
changes 10% (of the total change) from the initial voltage level. (see timing diagram below).
100%
10%
Output
10%
100%
tpd1
tpd2
2V
Input
1.5V
1.5V
0.8V
Note 4:
Note 5:
Note 6:
Measured from 2V step at VINP to IVMON output.
Measured from 2V step at IVIN to FORCE output.
Measured from 2V step at IVIN to IVMON output.
Revision 3 / December 18, 2002
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
Ordering Information
Model Number
Package
E4707BBG
180 Lead 12 mm x 12 mm
FlexBGA
EVM4707BBG
Edge4707 Evaluation Module
This device is ESD sensitive. Care should be taken when handling
and installing this device to avoid damaging it.
Contact Information
Semtech Corporation
Test and Measurement Division
10021 Willow Creek Rd., San Diego, CA 92131
Phone: (858)695-1808 FAX (858)695-2633
Revision 3 / December 18, 2002
24
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Edge4707B
TEST AND MEASUREMENT PRODUCTS
Revision History
Current Revision Date: October 3, 2002
Previous Revision Date: June 20, 2002
Page#
Section Name
all
Status
11
Circuit Description
18
Power Supplies
Break down Power Supply Rejection Ratio into FV/MI & FI/MV Modes
18-22
DC & AC
Characteristics
Replace all "TBDs" with numbers
Revision 3 / December 18, 2002
Description of Change
Change from "Target" to "Preliminary"
Add: Power Supply Sequencing Section
25
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