SEMTECH SC5010H

SC5010H
High Efficiency 8-Channel LED Driver with
I2C Interface and Phase-Shifted PWM Dimming
POWER MANAGEMENT
Features








Description
VIN Range — 4.5V to 27V, VOUT Range — Up to 50V
Step-up (Boost) Controller
 Ultra-Fast Transient Response
 Integrated Soft-start
 Programmable Switching Frequency
Linear Current Sinks
 8 Strings, up to 50mA/String
 Current Matching ±1%
 Current Accuracy ±2%
PWM Dimming
 String-by-String Phase Shifting
 Input Dimming Frequency 100Hz-30kHz
 User Selectable 9 or 10 Bits Dimming Resolution
 Optional Synchronization to VSYNC/HSYNC Signal
Optional External p-MOSFET Disconnect Switch
 True Load Disconnect and Inrush Current Limiting
I2C Interface
 Fault Status — Open/Short LED, UVLO, OTP
 Device Control — SYNC Freq, PLL Setting
Protection Features

Open/Shorted LED(s) and adjustable OVP

Over-Temperature and UVLO Shutdown Protection
4 X 4 X 0.6 (mm) 28-pin QFN Package
Applications

Notebook PCs, UMPC, LCD Monitors, and Tablet PCs
The SC5010H is an 8-channel high-precision, high-efficiency
step-up (Boost) LED driver for backlight applications. It features wide input voltage range (4.5V to 27V) , flexible output
configuration, wide analog and PWM dimming range,
phase shifting and fading. It also features video signal synchronization (VSYNC), I2C interface, and numerous protection features. An optional disconnect p-MOSFET provides
true load disconnection and inrush current limiting.
The boost controller, with programmable switching frequency from 200kHz to 2.2MHz, maximizes efficiency by
dynamically minimizing the output voltage while maintaining LED string current accuracy. It provides excellent line
and load response with no external compensation components. Each linear current sink is matched within ±1% for
superb lighting uniformity, and the accuracy of each string
current is ±2%. An external resistor adjusts the current from
10-50mA per string. It also features PWM dimming resolution of 9 or 10 bits (user selectable) over dimming frequency
from 100Hz to 20kHz, synchronized to the SYNC signal or
the boost oscillator. String-by-string phase shifting reduces
the demand on the input/output capacitance, decreases
EMI, and improves dimming linearity.
SC5010H is available in a low-profile, thermally enhanced,
4 X 4 X 0.6(mm) QFN 28-pin package.
Typical Application Circuit
V IN = 4 .5 to 27 V
C2
DRVP
DRVN
V IN
R1
R2
V C C = 4 .5 to 5 .5 V
R3
F LT
EN
SYNC
PW MI
U V LO
F LT
IO 1
BG
R5
R 10
R 11
C4
R7
C5
R4
S C 5010 H
OVP
PW MI
C3
Q1
CS
VCC
SYNC
R6
Revision 1.0
C1
EN
SDA
SCL
F or I 2 C
D 1 V O U T up to 50 V
L1
Q2
(O ptional)
R8
R9
IO 2
IO 3
IO 4
IO 5
U p to
50 m A /C H
IO 6
SCP
FSET
IS E T
C P LL
IO 7
IO 8
AGND
PGND
© 2011 Semtech Corporation
SC5010H
DRVP
DRVN
PGND
CS
OVP
IO 1
Ordering Information
V IN
Pin Configuration
28
27
26
25
24
23
22
VCC
1
21
IO 2
EN
2
20
103
UVLO
3
19
IO 4
SCP
4
18
IO 5
BG
5
17
IO 6
FSET
6
16
IO 7
AGND
7
15
IO 8
11
12
13
14
IS E T
FLT
PW MI
10
SDA
9
SCL
CPLL
8
SYNC
AGND
Device
Package
SC5010HULTRT(1)(2)
MLPQ-UT-28 4×4
SC5010HEVB
Evaluation Board
Notes:
(1) Available in tape and reel only. A reel contains 3,000 devices.
(2) Lead-free packaging only. Device is WEEE and RoHS compliant,
and halogen-free.
MLPQ-28; 4x4, EP1
θJA = 30°C/W
Marking Information
5010H
yyw w
xxxxx
xxxxx
nnnn = Part Number
yyww = Date code
xxxxx = Semtech Lot No.
xxxxx = Semtech Lot No.
SC5010H
Absolute Maximum Ratings
Recommended Operating Conditions
VCC Pin (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0
Ambient Temperature Range (°C). . . . . . . . . -40 < TA < +85
VIN, DRVP, IO1 to IO8(V). . . . . . . . . . . . . . . . . . . . . -0.3 to +30
VIN (V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5 to 27
DRVN, OVP, CS, EN, UVLO, SCP, BG, FLT (V).. . . -0.3 to +6.0
IO1 to IO8 Current per String (mA) . . . . . . . . . . . up to 50
FSET, CPLL, SYNC, SCL, SDA, ISET, PWMI(V). . -0.3 to +6.0
PGND TO AGND (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3
ESD Protection Level(1) (kV) . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5
Thermal Information
Thermal Resistance, Junction to Ambient(2) (°C/W) . . . . 30
Maximum Junction Temperature (°C). . . . . . . . . . . . . . . +150
Storage Temperature Range (°C). . . . . . . . . . . . . -65 to +150
Peak IR Reflow Temperature (10s to 30s) (°C) . . . . . . . +260
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters
specified in the Electrical Characteristics section is not recommended.
NOTES:
(1) Tested according to JEDEC standard JESD22-A114-B.
(2) Calculated from package in still air, mounted to 3 x 4.5 (in.), 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
Electrical Characteristics
Unless noted otherwise, TA = 25°C for typical, -40°C < TA = TJ < 85°C for min and max. VCC = 5V, RISET = 32.4 kΩ, RFSET = 100 kΩ , VIN = 12V.
Parameter
Symbol
Conditions
Min
Typ
Max
Units
5.5
V
4.4
V
Input Supply
VCC Supply Voltage
VCC
4.5
VCC Under-Voltage Lockout Threshold
VCC-UVLO(TH)
VCC Voltage Rising
VCC Under-Voltage Lockout Hysteresis
VCC-UVLO(HYS)
VCC Voltage Falling
180
mV
VCC Quiescent Supply Current
ICC(Q)
EN = 5V, Switching, No Load
2
mA
VCC Supply Current in Shutdown
ICC(SD)
EN = 0V
1
µA
VIN Supply Current in Shutdown
IVIN(SD)
EN = 0V, VIN = 27V
1
µA
VUVLO Under-Voltage Lockout Threshold
VUVLO(TH)
UVLO Pin Voltage Rising
1.18
1.23
1.28
V
IUVLO Under-Voltage Lockout Hysteresis
IUVLO(HYS)
UVLO Pin Voltage Falling
7
10
13
µA
1.20
1.23
1.26
V
VBG Bandgap Voltage
VBG
4.0
4.2
External FET Gate Drive
DRVN High Level
VDRVN(H)
100mA from DRVN to GND
VCC -0.5 VCC -0.2
V
DRVN Low Level
VDRVN(L)
-100mA from DRVN to VCC
0.2
0.5
V
DRVN On-Resistance
RDRVN
DRVN high or Low
2
5
Ω
DRVN Sink / Source Current
IDRVN
DRVN forced to 2.5V
1
A
SC5010H
Electrical Characteristics (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
0.36
0.40
0.44
V
Boost Converter
CS Current Limit Threshold
VCS(ILIM)
Soft-start Time (1)
tSS
From EN to end of soft start
4.4
Boost Oscillator Frequency
FSW
RFSET = 100kΩ
0.85
Boost Oscillator Frequency
FOSC
RFSET Varies
0.2
Maximum Duty Cycle
DMAX
85
1
ms
1.15
MHz
2.2
MHz
90
%
20
µA
Output Disconnect Gate Drive
DRVP Sink Current
IDRVP(L)
DRVP = 12V
DRVP clamp voltage
VCLAMP
DRVP floating, VCLAMP = VIN - VDRVP
ILEAK
VDRVP = 27V, VEN = 0V
High Voltage Threshold
VIH
VCC = 4.5V to 5.5V
Low Voltage Threshold
VIL
VCC = 4.5V to 5.5V
0.8
V
VSDA(L)
-6mA from VCC to SDA
0.3
V
ILEAK
VEN = 0V, VVSYNC = VPWMI = VISET = VFSET = VSDA = VSDL
= 5.0V
-1
1
µA
DRVP Pin Leakage Current
5
7
8
V
0.1
1
µA
Control Signals: EN, PWMI, SYNC, SDA, SCL
SDA Output Low
Pin Leakage Current
2.1
V
PWM Dimming Input
PWMI Input Dimming Frequency
FPWMI
100
30k
Hz
SYNC Input Frequency
FSYNC
30
100k
Hz
PWMI Input Resolution
100Hz < FPWMI < 10kHz
10
bits
10kHz < FPWMI < 20kHz
9
bits
Over-Voltage Protection
OVP Trip Threshold Voltage
VOVP(TRIG)
OVP Rising
1.18
1.23
OVP Hysteresis
VOVP(HYS)
OVP Falling
10
OVP Leakage Current
IOVP(LEAK)
OVP = 5V
0.1
1.28
V
mV
1
µA
SC5010H
Electrical Characteristics (continued)
Parameter
Symbol
Conditions
TPWM(MIN)
FPWM(LED) = 100Hz - 30kHz
Min
Typ
Max
Units
Current Sink (IO1 to IO8)
IOx Dimming Minimum Pulse Width
ISET pin voltage
VISET
Regulation Voltage
VIOn(REG)
Voltage of Regulating String
Current Sink Disable Threshold
VIOn(DIS)
Checked at Power-up
Current Sink Rise/Fall Time (1)
tRISE/FALL
Rising edge from 10% to 90% of IO(n)
LED Current Accuracy
IOn(ACC%)
PWMI = 100%, TA = +25°C
LED Current Matching (2)
IOn(MATCH)
IOn Off Leakage Current
IOn(LEAK)
IO Switching Frequency
FPWM(IO)
Phase Delay Time between IO Pins
(IO1 to IO8)
tPD
PWM Output Resolution
300
ns
1.23
V
0.9
V
0.6
V
25
39.2
40
ns
40.8
mA
PWMI = 100%, TA = +25 °C
±1
%
PWMI = 100%, TA = -40 °C to +85 °C
±2
%
1
µA
PWMI = 0V, EN = 0V, VIO1 ~ VIO8 = 25V
0.1
FAST_FREQ = 0
10
FAST_FREQ = 1 (Default Setting)
20
FAST_FREQ = 1 (default setting)
tPD = (1/8)*(1/FPWM(IO)), 8 Strings On
6.25
FPWM(IO) = 10kHz
10
FPWM(IO) = 20kHz
9
kHz
µs
bits
Fault Protection
LED Short Circuit Protection Threshold
VIOn(SCP)
LED Open Circuit Protection Threshold
VIO_OCP
R4 and R5 (3)
LED Short Circuit Fault Delay
tSCP(DELAY)
VOVP set to 1.5V, FLT goes low
FLT Pin Leakage Current
IFLT(LEAK)
VEN = 0V, VFLT = 5.0V
FLT Output Low
VFLT(LOW)
-5mA from FLT to VCC
17xVSCP 20xVSCP
23xVSCP
V
0.2
V
1
µs
-1
1
µA
0.3
V
Over-Temperature Protection
Thermal Shutdown Temperature
150
°C
Thermal Shutdown Hysteresis
10
°C
SC5010H
Electrical Characteristics (continued)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
400
kHz
I2C Control Interface: SDA, SCL Timing Specifications
SCL Clock Frequency
FSCL
SCL Clock Low Period
tLOW(SCL)
1.3
µs
SCL Clock High Period
tHIGH(SCL)
0.6
µs
Hold Time Start Condition
tHD(START)
0.6
µs
SDA Setup Time
tSU(SDA)
100
ns
SDA Hold Time
tHD(SDA)
0
Setup Time Stop Condition
tSU(STOP)
0.6
µs
tBF
1.3
µs
Bus Free Time between Stop & Start
0.9
µs
Notes:
(1) Ensured by design and characterization, not production tested
(2) LED current matching for 8 channels is defined as the largest of the two numbers, i.e., (MAX-AVG)/AVG and (AVG-MIN)/AVG; where MAX is the
maximum of LED channel current, MIN is the minimum LED channel current and AVG is the average of the 8 LED channel current.
(3) Refer to the detailed application circuit on page 21.
SC5010H
Typical Characteristics
Backlight Efficiency vs. Input Voltage
Backlight Efficiency vs. Input Voltage
6P10S
100 %
96 %
95 %
50mA/string
6P10S
92 %
40mA/string
85 %
30mA/string
50mA/string
Efficiency
Efficiency
6P8S
90 %
6P6S
88 %
84 %
80 %
75 %
5
0
10
15
VIN (V)
20
25
80 %
30
Backlight Efficiency vs. LED String Current
95 %
50mA/string
90 %
40mA/string
30mA/string
30
70 %
75 %
70 %
65 %
65 %
60 %
60 %
55 %
55 %
20
0
40
60
80
50 %
100
0
50mA/string, 6P10S, 20kHz Dimming
LED String Current Change
100 %
VIN = 27V
1%
VIN = 6.5V
VIN = 12V
VIN = 20V
0.1
100
100
10 %
200Hz/1kHz Dimming
1%
0.1 %
0.01 %
1
10
LED PWM Dimming Duty Cycle (%)
40
60
80
LED PWM Dimming Duty Cycle (%)
50mA/string, VIN = 6.5V, 6P10S
VIN = 12V
0.01 %
20
PWM Dimming Linearity with Phase Shift
PWM Dimming Linearity with Phase Shift
10 %
30mA/string
40mA/string
LED PWM Dimming Duty Cycle (%)
LED String Current Change
25
50mA/string
80 %
75 %
0.1 %
20
VIN (V)
VIN = 6.5V
90 %
Efficiency
Efficiency
80 %
100 %
15
85 %
85 %
50 %
10
Backlight Efficiency vs. LED String Current
VIN = 12V
95 %
5
0.001 %
0.1
30kHz Dimming
20kHz Dimming
10kHz Dimming
1
10
LED PWM Dimming Duty Cycle (%)
100
SC5010H
Typical Characteristics (continued)
LED String Current Accuracy vs. Temperature
LED String Current Matching vs. Temperature
40mA/string
50mA/string (nominal)
52.0
LED String Current Accuracy (mA)
LED String Current Matching
1.2 %
0.8 %
0.4 %
51.5
51.0
50.5
50.0
49.5
0
-40
-20
0
20
40
Temperature (°C)
60
80
49.0
-40
100
-20
20
40
Temperature (°C)
60
80
100
LED String Current vs. RISET
Switching Frequency vs. RFSET
2400
0.05
2000
0.04
LED String Current (A)
Boost Switching Frequency (kHz)
0
1600
1200
800
0.03
0.02
0.01
400
0
150
300
RFSET (k Ω)
450
0
600
LED String Current Change vs. Analog
Dimming Control Register (IDAC) Value
25
50
75
RISET (k Ω)
100
125
150
LED String Current Matching vs. Analog
Dimming Control Register (IDAC) Value
100 %
2.0 %
40mA/string when IDAC = 31 (in decimal format)
LED String Current Matching
LED String Current Change
90 %
80 %
70 %
60 %
50 %
40 %
30 %
20 %
1.6 %
-40 °C
1.2 %
0 °C
0.8 %
85 °C
0.4 %
25 °C
10 %
0
4
8
12
16
20
24
IDAC Register Value (in decimal format)
28
32
0
4
8
12
16
20
24
IDAC Register Value (in decimal format)
28
32
SC5010H
Typical Characteristics (continued)
LED Current Fade In/Out (Linear)
LED Current Fade In/Out (Logarithmic)
50mA/string, 6P10S
PWMI
PWMI
5V/div.
5V/div.
VIO1
VIO1
5V/div.
5V/div.
VOUT
VOUT
20V/div.
20V/div.
IO_LED (total)
IO_LED (total)
200mA/div.
200mA/div.
Time (40ms/div)
Time (40ms/div)
LED Open Circuit Protection
Line Transient Response
100% Dimming, 50mA/string, 6P10S
Starting with one LED string open-circuit
20V
VIN
10V/div.
FLT
6.5V
5V/div.
VEN
VLX
5V/div.
20V/div.
VOUT
VOUT (ac coupled)
20V/div.
1V/div.
IO_LED (total)
IO_LED (total)
200mA/div.
200mA/div.
Time (2µs/div)
Time (20ms/div)
Load Transient Response
Load Transient Response
PWMI (10kHz) = 2% to 98%, VIN = 12V, 50mA/String X 6
PWMI (10kHz) = 98% to 2%, VIN = 12V, 50mA/String X 6
Fading disabled
Fading disabled
V_PWMI
V_PWMI
5V/div.
5V/div.
VO
(ac coupled)
(ac coupled)
200mV/div.
VO
200mV/div.
IO_LED (total)
IO_LED (total)
100mA/div.
100mA/div.
Time (100µs/div)
Time (100µs/div)
SC5010H
Typical Characteristics (continued)
LED Dimming Without Phase Shift
LED Dimming With Phase Shift
10% Dimming @ 200Hz, VIN = 6.5V, Output = 6P10S, 50mA/string
10% Dimming @ 200Hz, VIN = 6.5V, Output = 6P10S, 50mA/string
VIO1
VIO1
10V/div.
10V/div.
VIO2
VIO2
10V/div.
10V/div.
IIN
IIN
2A/div.
2A/div.
IO_LED (total)
IO_LED (total)
200mA/div.
200mA/div.
Time (2ms/div)
LED Dimming Without Phase Shift
Time (2ms/div)
LED Dimming With Phase Shift
35% Dimming @ 200Hz, VIN = 6.5V, Output = 6P10S, 50mA/string
35% Dimming @ 200Hz, VIN = 6.5V, Output = 6P10S, 50mA/string
VIO1
VIO1
10V/div.
10V/div.
VIO2
VIO2
10V/div.
10V/div.
IIN
IIN
2A/div.
2A/div.
IO_LED (total)
IO_LED (total)
200mA/div.
200mA/div.
Time (2ms/div)
LED Dimming With Phase Shift
LED Dimming Without Phase Shift
10% Dimming @ 20kHz, VIN = 9V, Output = 8P10S, 50mA/string
10% Dimming @ 20kHz, VIN = 9V, Output = 8P10S, 50mA/string
IIO1
IIO1
50mA/div.
50mA/div.
IIO2
IIO2
50mA/div.
50mA/div.
IIO3
IIO3
50mA/div.
50mA/div.
IIO4
IIO4
50mA/div.
50mA/div.
Time (10µs/div)
Time (2ms/div)
Time (10µs/div)
10
SC5010H
Typical Characteristics (continued)
Synchronization of the LED Dimming to An
External HSYNC Input
Delay Between HSYNC Rising Edge and Turnon of LED String 1
HSYNC = 48kHz
VHSYNC
VHSYNC
5V/div.
5V/div.
VLX
20V/div.
VIO1
5V/div.
VIO1
5V/div.
VIO2
5V/div.
Time (10µs/div)
Time (400ns/div)
Analog Dimming Transient via I2C
Analog Dimming Transient via I2C
10mA/string to 50mA/string, 6P10S
50mA/string to 10mA/string, 6P10S
VSDA
VSDA
5V/div.
5V/div.
IL
IL
2A/div.
2A/div.
VOUT (ac coupled)
VOUT (ac coupled)
2V/div.
2V/div.
IO_LED (total)
IO_LED (total)
200mA/div.
Time (40µs/div)
200mA/div.
Time (100µs/div)
VBG vs. Temperature
VIN Start Up
Output = 6P10S, 50mA/string
1.225
1.224
VIN
VBG (V)
5V/div.
VLX
20V/div.
1.223
1.222
VOUT
20V/div.
1.221
IO_LED (total)
1.220
200mA/div.
Time (20ms/div)
-40
-20
0
20
40
Temperature (°C)
60
80
100
11
SC5010H
Pin Descriptions
Pin #
Pin Name
Pin Function
1
VCC
Input bias voltage supply for the IC — accepts 4.5-5.5V inputs. Add a 1µF or larger ceramic bypass capacitor from
this pin to ground.
2
EN
Logic high enable pin — pull logic high to enable the device or pull low to disable and maintain low shutdown
current.
3
UVLO
Input under-voltage lockout pin — Device is disabled when this pin is less than 1.23V (nominal). Add a resistor
divider from this pin to the input voltage and AGND, respectively.
4
SCP
Short circuit LED protection programming pin. Shorted LED protection disables the individual channel when the
current sink voltage exceeds the programmed voltage threshold. Adding resistor divider from this pin to BG and
AGND programs the shorted-LED protection up to 20 X the VSCP voltage. Pulling the pin high to VCC disables the
SCP feature on all channels.
5
BG
1.23V bandgap output pin — Connect a 1µF ceramic bypass capacitor from this pin to ground.
6
FSET
Step-up (boost) frequency set pin — Connect a resistor from this pin to ground to set the frequency from 200kHz
to 2.2MHz.
7
AGND
Analog ground pin — tie this pin to analog (quiet) ground isolated from the step-up (boost) converter switching
current path.
8
CPLL
Compensation for the internal PLL — connect a compensation resistor and capacitor from this pin to ground. This
pin can be left floating if not used.
9
SYNC
SYNC input pin — feeding the SYNC signal (30Hz - 100kHz) to this input results in internal PLL being synchronized
to the SYNC signal. This pin can be left floating if not used.
10
SCL
I2C serial clock input — this pin must be connected to ground if not used.
11
SDA
I2C serial data input — this pin must be connected to ground if not used.
12
ISET
LED current programming pin — connect an external resistor to ground to program the current in the LED strings.
For more details please refer to LED String Peak Current Programming on page 16.
13
FLT
Logic low fault status pin — open-drain output is latched low when fault condition is detected: Open/Short LED,
Shorted String, OVP or OTP. Fault status can be reset by removing fault condition(s) and toggling the EN, VCC or
UVLO pins. This pin can be left floating if not used.
14
PWMI
15
IO8
Regulated current sink LED channel 8 — connect this pin to the cathode of the bottom LED in string 8.
Connect pin to ground to disable this LED string.
16
IO7
Regulated current sink LED channel 7 — connect this pin to the cathode of the bottom LED in string 7.
Connect pin to ground to disable this LED string.
17
IO6
Regulated current sink LED channel 6 — connect this pin to the cathode of the bottom LED in string 6.
Connect pin to ground to disable this LED string.
18
IO5
Regulated current sink LED channel 5 — connect this pin to the cathode of the bottom LED in string 5.
Connect pin to ground to disable this LED string.
19
IO4
Regulated current sink LED channel 4 — connect this pin to the cathode of the bottom LED in string 4.
Connect pin to ground to disable this LED string.
PWM dimming control input
12
SC5010H
Pin Descriptions (continued)
Pin #
Pin Name
Pin Function
20
IO3
Regulated current sink LED channel 3 — connect this pin to the cathode of the bottom LED in string 3.
Connect pin to ground to disable this LED string.
21
IO2
Regulated current sink LED channel 2 — connect this pin to the cathode of the bottom LED in string 2.
Connect pin to ground to disable this LED string.
22
IO1
Regulated current sink LED channel 1 — connect this pin to the cathode of the bottom LED in string 1.
Connect pin to ground to disable this LED string.
23
OVP
Over-voltage feedback pin — over-voltage activated when pin exceeds 1.23V(typ). Use a resistor divider tied to
the output and GND to set the OVP level.
24
CS
25
PGND
Power ground — tie this pin to the power ground plane close to input and output decoupling capacitors.
26
DRVN
Gate drive for the external step-up (boost) n-channel MOSFET.
27
DRVP
Gate drive for the external p-channel MOSFET disconnect switch.
28
VIN
Connect to the input power supply — accepts 4.5V - 27V input. Usually add 4.7µF or larger ceramic bypass capacitor from this pin to ground.
PAD
-
Thermal pad for heat-sinking purposes — it is also AGND and should be connected to ground plane for proper
circuit operation.
Step-up (boost) switch current sense pin — Connect a resistor from this pin to ground for current sense - utilized
in peak current mode control loop and over-current sense circuitry.
13
SC5010H
Block Diagram
BG
FSET
SCP
EN
UVLO
DRVP
5
6
4
2
3
27
VBG
CPLL
8
SYNC
9
X20
+
SC_REF
CP
PLL
VCO
BG
B o o st
O scilla to r
OSC
18
1
I2C
(P L L ra n g e )
10M H z
(S yste m C lk)
P W M F re q .
A d ju st
V IN 2 8
PW M
14
HS
C o n tro l L o g ic
LS
OTP
1 /N
VCC
23 O V P
-
OVP
C L IM
PW M
COMP
8
S lo p e
Com p
24 C S
R e cycle
G e n e ra to r
EA
+
DC
-
8
M in im u m V o lta g e
D e te ctio n
8
10
D u ty C ycle
MUX
O C /S C
D e te ctio n
8
I2 C
In te rfa ce
S C L 10
FLT 13
I C In te rfa ce
and
L E D C o n tro l
L o g ic
2 1 IO 2
1 8 IO 5
8
L E D F re q A d ju st
1 7 IO 6
P W M D im A d ju st
IS E T A d ju st
2 2 IO 1
1 9 IO 4
10
2
SC_REF
2 0 IO 3
L E D O p e n /S h o rt F a u lt
S D A 11
DRVN
DC
-
COMP
D u ty C ycle
E xtra cto r
+
IL IM
- +
+
8
5
5 -b it
DAC
1 6 IO 7
I-R E F
ADJ
1 5 IO 8
OTP
12
25
7
IS E T
PGND
AGND
14
SC5010H
Applications Information
General Description
The SC5010H contains a high frequency, current-mode,
internally compensated boost controller and eight constant current sinks for driving LED strings. The LED current
for all strings is programmed by an external resistor and
the boost converter operates to maintain minimal required
output voltage for regulating the LED current to the programmed value. Each string can support up to 50mA
current. The unique control loop of the SC5010H allows
fast transient response in dealing with line and load disturbances. The SC5010H operating with an external power
MOSFET regulates the boost converter output voltage
based on instantaneous requirement of the eight string
current sources. This provides power to the entire lighting
subsystem with increased efficiency and reduced component count. It supports PWM dimming frequencies from
100Hz to 30kHz and the supply current is reduced to
typical 2mA when all LED strings are off.
Start-Up
When the EN pin is pulled up high (>2.1V), the device is
enabled and the UVLO and VCC pin voltages are checked.
The VCC voltage has fixed under-voltage rising and falling
trip points. If the VCC pin is higher than 4.2V and UVLO pin
voltage is greater than 1.23V, the SC5010H goes into a
startup sequence. The UVLO pin voltage can be used to
program the input power source voltage VIN turn on
threshold and its hysteresis (refer to the Detailed
Application Circuit on page 21) as shown by the following
equations:
VIN_TurnOn [V] = 1.23 X (R1 + R2) / R1
VIN_Hysteresis [V] = 10-5 X R2 [Ω]
In the next phase, the SC5010H checks each IO pin to
determine if the respective LED string is enabled. Each IO
pin is pulled up with a 100µA current source. If any IO pin
is connected to GND, it will be detected as an unused
string, and will be turned off. This unused string checking
procedure takes 1ms (typical). After this the SC5010H
enters into a soft-start sequence.
up the reference voltage fed to the error amplifier. This
closed loop start-up method allows the output voltage
to ramp up without any overshoot. The duration of the
soft-start in SC5010H is controlled by an internal timing
circuit which is used during start-up and it’s based on the
boost converter switching frequency. For example, with
switching frequency at 1MHz, it is typical 8ms and it
becomes typical 4ms when the switching frequency is
2MHz.
If PWMI voltage goes low while the SC5010H is in soft
start operation, the SC5010H switches to standby mode.
Under such mode, the external power MOSFET and the
LED current sources will be turned off immediately. The
internal soft-start timer is turned off and the soft-start
value is saved. When the PWMI voltage goes high again,
the soft-start resumes from the previously saved value.
Each LED current source (IO1 to IO8) tries to regulate the
LED current to its set point. The control loop will regulate
the output voltage such that all the IO pin voltages are at
least typical 0.9V.
Shutdown
When the EN pin is pulled down below 0.8V, the device
enters into shutdown mode. In this mode, all the internal
circuitry is turned off and the supply current is less than
1µA(max).
In the scenario when the EN pin voltage is high, but either
VIN or VCC voltage falls below their respective UVLO
threshold, the SC5010H goes into a suspend mode. In
this mode, all the internal circuitry except the reference
and the oscillator are turned off.
Thermal Shutdown (TSD)
If the thermal shutdown temperature of 150°C is reached,
the boost converter and all IO current sources are turned
off. FLT pin is forced low in this situation. As temperature
falls below the TSD trip point by 10°C, the SC5010H will
restart following the startup sequence as described
before. The FLT pin is latched and will stay low, it is reset
by cycling the EN, VCC, or UVLO.
The soft-start function helps to prevent excess inrush
current through the input rail during startup. In the
SC5010H, the soft-start is implemented by slowly ramping
15
SC5010H
Applications Information (continued)
Boost Converter Operation
The SC5010H includes a boost controller with programmable switching frequency. It applies current-mode
control method with integrated compensation loop. The
clock (see block diagram) from the oscillator sets the latch
and turns on the external power MOSFET, which serves as
the main power switch. The current flowing through this
switch is sensed by the current sense resistor in series
with the switch. The sensed switch current is summed
with the slope-compensated ramp and fed into the modulating input of the PWM comparator. When the modulating ramp intersects the error amplifier output (COMP),
the latch is reset and the power MOSFET is turned off. The
sense resistor also sets the peak current limit of the power
MOSFET, IOCP using the following equation:
IOCP[A] = 0.4 / RCS [Ω]
The current-mode control system contains two loops. For
the inner current loop, the Error Amplifier (EA) output
(COMP) controls the peak inductor current. In the outer
loop, the EA regulates the output voltage for driving the
LED strings.
Boost Converter Switching Frequency Selection
The resistor between FSET and GND sets the boost converter switching frequency (200kHz to 2.2MHz) using the
following equation:
fSW [kHz] = 105/ RFSET [kΩ]
Higher switching frequency allows the use of low profile
height inductor for space-constrained and cost-sensitive
applications.
Over-Voltage Protection (OVP)
SC5010H features programmable output over-voltage protection preventing damage to the IC and output capacitor
in the event of LED string open-circuit. The boost converter
output voltage is sensed at the OVP pin through resistor
voltage divider. The OVP trip threshold (refer to detailed
application circuit on page 21) can be calculated using the
following equation.
Output OVP Trip Voltage [V] = 1.2 X (R11 + R10) / R10
When the OVP pin voltage exceeds 1.23V, the boost converter turns off and the FLT pin is pulled low. When the
OVP pin voltage falls below the OVP threshold (falling),
the boost converter restarts and the FLT pin is released.
There is 10mV hysteresis between OVP pin threshold
(falling) and OVP pin threshold (rising). This results in an
output voltage hysteresis given by:
Output OVP Hysteresis[mV] = 10 X (R11 + R10) / R10
LED Current Sink
The SC5010H provides 8 current sinks and each can sink
up to 50mA current. It incorporates LED string shortcircuit protection (trip level programmable and can be
disabled as well), LED string open-circuit protection.
LED String Peak Current Programming
LED string peak current (at 100% dimming) can be set by
selecting resistor RISET, connected between ISET and GND.
The relationship between RISET resistance and single LED
string peak current is calculated using the following
equation:
ILED [mA] = (1055 X 1.23) / RISET [kΩ]
The LED string current can be programmed up to 50mA.
Unused Strings
The SC5010H may be operated with less than 8 strings. In
this mode of operation, all unused IO pins should be connected to ground. During startup, these unused strings are
detected and disabled while other active strings work
normally.
LED Short-Circuit Protection (SCP)
SC5010H features a programmable LED short protection.
This allows the part to be customized based on the LED VF
mismatches between the LED strings. If one or more LEDs
are detected as short-circuited, the corresponding string
will be latched off. The voltages on all IO pins are monitored
to check if any IO pin exceeds the SCP trip point (The IO
voltage for LED string with faulty short-circuit LED(s) will be
higher than other normal IO pin voltages). This LED ShortCircuit Protection (SCP) trip level (see detailed application
circuit on page 21) is given by the following equation.
VSCP_Trip [V] = 20 X (1.23 X R4) / (R4 + R5)
16
SC5010H
Applications Information (continued)
If any IO pin voltage exceeds the trip voltage, the IO current
sink will be latched off and the FLT will go low. This latch can
be reset by cycling UVLO, VCC or EN. Other LED strings are
unaffected and continue in normal operation. This protection will be disabled if SCP is tied to VCC.
LED Analog Dimming Control
In many applications, LED strings are connected to the IO
pins through a mechanical connector which cannot support
an electrical connection at specific times. This connection
might cause noise on the IO pins. If this noise is large enough,
it may trigger false SCP mode. In this condition, a ceramic
decoupling capacitors (100pF ~ 8.2nF) between IO pin to
GND can help prevent the SC5010H from entering the protection mode by false trigger. This feature can be disabled
by connecting SCP pin to VCC pin.
SC5010H has a unique DAC architecture which allows it to
have excellent LED current accuracy and string-to-string
matching over the entire DAC range.
LED Open-Circuit Protection
If any LED string becomes open, the respective IO pin
voltage will be pulled to GND. Consequently, the internal
COMP node (output of error amplifier) is driven high, which
causes the boost output voltage to increase. The output
voltage will be eventually clamped to a voltage set by the
OVP resistor divider. Under this condition, the faulty string
is latched off and the FLT pin is pulled low. The boost voltage
gets regulated to the voltage required to set all non-faulty
IO pins above 0.9V (typ). The remaining strings remain in
normal operation. The FLT and the fault-out LED current
sink latch-off can be reset by cycling UVLO, VCC or EN.
LED PWM Dimming Control
The LED current in SC5010H can be dimmed via the 5-bit
analog dimming register (Register 0x02). The LED current
can be adjusted in 32 steps from 0mA to the maximum
value, determined by the RISET resistor.
Analog dimming method can be used in conjunction
with PWM dimming to increase the dimming resolution.
The fast loop response of SC5010H allows the LED current
to transition to a new value within 100µs or so. Please
refer to the graphs in the typical characteristics section.
The SC5010H supports 3 modes of PWM dimming for
controlling the brightness of the LEDs. It provides flexibility in setting the duty cycle and frequency of the LED
PWM signal. The PWM dimming mode is set through the
device control register (register address: 0x01) DCR [1:0]
bits. Refer to Table 1 for more details.
Mode 1 — PWMI Direct Control
The PWMI input needs to be held high for normal operation. PWM dimming can be done by cycling the PWMI
input at a given frequency where a “low” on the PWMI
input turns off all IO current sinks and a “high” turns on all
IO current sinks. The PWMI pin can be toggled by external
circuitry to allow PWM dimming. In a typical application,
Table 1 — LED PWM Dimming Control Methods
PWM Dimming Mode
Register
Settings
DCR[1:0]
PWM
Input
Source
PWM Frequency
PWM Duty Cycle
Phase
Shift
Option
PWMI Direct
Control
00
PWMI Pin
Input
Same as the PWMI input
(Range 100 Hz to 30kHz)
Same as the PWMI input
NO
01
PWMI Pin
Input
Set via the FREQ Register
(0x05) and FAST_FREQ bit
10kHz (max): FAST_FREQ=0
20kHz(max): FAST_FREQ=1
Same as the duty cycle of the PWMI input
10 bits @ 10kHz output
9 bits @ 20kHz output
YES
11
I2C
Control
Set via the FREQ Register
(0x05) and FAST_FREQ bit
10kHz (max): FAST_FREQ=0
20kHz(max): FAST_FREQ=1
Set via the Duty Cycle Control
Register (0x03, 0x04)
10 bits @ 10kHz output
9 bits @ 20kHz output
YES
PWMI Indirect
Control
(Default
Option)
I2C
Control
LED PWM Output
17
SC5010H
Applications Information (continued)
a micro-controller sets a register or counter that varies the
pulse width on a GPIO pin. The SC5010H allows dimming
over a wide frequency range (100Hz-30kHz) in order to
allow compatibility with a wide range of devices. This
includes the newest dimming strategies that avoid the
audio band by using high frequency PWM dimming. In
this manner, a wide range of illumination can be generated while keeping the instantaneous LED current at its
peak value for high efficiency and color temperature. The
SC5010H provides 1000:1 dimming range at 1kHz PWM
frequency. The LED current sinks turn on /off very rapidly
(<25ns, typical). This allows wide dimming ratio. An additional advantage of PWM dimming comes to customers
who prefer to avoid in-rush currents when filling the boost
output capacitor. Apply the PWMI signal to the device at
10% duty for a millisecond or two, and in-rush current is
reduced. This dimming time will vary based on the number
of LEDs and the size of the output capacitor. This can be
easily determined during testing and programmed into
the micro-controller firmware.
Mode 2 — Indirect Control
This is the default mode for LED PWM dimming in SC5010H.
In this mode, the input signal applied on PWMI pin is passed
through a duty cycle extractor block. The extractor mea-
PW MI
Input
D uty C ycle
E xtractor
E xtracted duty
cycle from
P W M I Input
10
10
sures the duty cycle of the PWMI input, and depending on
the value of FAST_FREQ, the duty cycle is converted to a 9bit value (FAST_FREQ = 1) or a 10-bit value (FAST_FREQ = 0).
This value is then passed to the PWM generator block as
shown in the Figure 1 below.
The LED PWM dimming frequency is set via the FREQ register (address 0x05) and the FAST_FREQ bit.
With FAST_FREQ = 0, low dimming frequency option is
selected and the PWM dimming frequency will be according to the following equation.
PWM Dimming Frequency
10MHz
1024 u [FREQ[7 : 0] 1]
10kHz(max)
With FAST_FREQ = 1, high dimming frequency option is
selected and the PWM dimming frequency is shown by
the following equation.
PWM Dimming Frequency
10MHz
512 u [FREQ[7 : 0] 1]
20kHz(max)
The default option is FAST_FREQ = 1. This gives 9-bit duty
cycle resolution and up to 20kHz dimming frequency
LE D F requency and P haseS hifter B lock
0
PW MI
10
PW M
G enerator
1
1
P hase S hifting
(45 º)
EN
0
P W M [8:1]
8
8
P W M _ ps[8:1]
1
A ll bits identical
w hen phase
shifting disabled
8
S oftstart
D [9 :0 ] B its
IN T _D U T Y B it
F R E Q B its
F astF req B it
P H _S H IF T B it
IN T _P W M B it
I 2 C In te rfa ce
Figure 1— LED PWM Dimming Control
18
SC5010H
Applications Information (continued)
range. The PWMI input is usually generated by the system
graphics processor. This mode allows the user to set the
PWM output dimming frequency independent of the
PWMI input.
And the dimming duty cycle with FAST_FREQ = 1 can be
calculated as:
If the PWMI signal has jitter, then SC5010H provides an
option to filter it out. Hysteresis is also provided by selecting the WND[1:0] bits in the DCR register (address 0x01).
WND[1:0] bits set the window comparator such that if a
change in the duty cycle is detected which is smaller than
the set window, then it is ignored.
In both cases mentioned above, duty cycle is fixed to be 0
when D[9:0] is set as 0x00.
Mode 3 — I2C Control
In this mode (refer to Figure 1 on page 18), both the output
LED dimming duty cycle and the dimming frequency are
set via the internal registers. PWMI pin should be connected to ground in this mode. In this mode, the LED
dimming duty cycle is set via the duty cycle registers
(address 0x03, 0x04); and the dimming frequency is set via
the FREQ register (address 0x05) and the FAST_FREQ bit.
Phase-Shifted PWM Dimming
The SC5010H provides an option for the phase shifted LED
PWM dimming. This option is available in both PWMI indirect control and I2C control. Phase-shift option is set by the
PH_SHIFT bit in the Device Control Register (register address
0x01). This option delays the turn-on of the LED strings
based on the number of the strings in operation (the
number of the strings in operation is determined during
the start-up). The delay time can be calculated by the following equation:
With FAST_FREQ = 0, the LED duty cycle can achieve 10-bit
resolution, D[9:0], which is combined by two portions: (1)
MSB portion - register address 0x03 [1:0] and (2) LSB portion
- register address 0x04 [7:0] as shown below.
LED Dimming Duty Cycle = {D[9:1]decimal + 1}/29
As for the PWM dimming frequency, it is controlled the
same way as used in “Indirect Control” introduced in the
previous page.
1
fPWM
TIphase
,
N
N number of strings in operation
fPWM LED PWM dimming frequency
Phase-shift mode is disabled during soft-start, this allows
the output to ramp up to the correct voltage in a controlled fashion.
And the dimming duty cycle with FAST_FREQ = 0 can be
calculated as:
LED Dimming Duty Cycle = {D[9:0]decimal + 1}/210
With FAST_FREQ = 1, the LED duty cycle can achieve 9-bit
resolution, D[9:1], which is combined by two portions: (1)
MSB portion - register address 0x03 [1:0] and (2) LSB portion
- register address 0x04 [7:1] as shown below.
Phase-shifting reduces the peak input current, decreases
EMI and improves the dimming linearity. The figures in the
Typical Characteristic Section shows the reduction in the
input current with phase shift feature enabled compared
to the non-phase shifted mode of operation.
Backlight Fade-in and Fade-out Options
The SC5010H features an option for fade-in and fade-out
brightness control, which allows smooth transition from
one brightness level to another.
Registers associated with this fading functions are shown
in this section.
1. Fade Option (register address 0x09) — sets fade
19
SC5010H
Applications Information (continued)
enable options, fade time, fade type.
2. Fade Rate (register address 0x0A) — sets fade step
size option.
fading time. The default setting is fading enabled with
logarithmic mode. The fading time is determined by the
LED PWM dimming frequency. Fade setting is shown in
the table on page 21.
Fade option register allows user to select fading, choose
between linear or logarithmic fading, and to set up the
Table 2 — Fault Protection Descriptions
Action on Fault
Type of
Fault
User
Disable?
Fault Criteria
Input
Under-voltage
at VIN
(UVLO)
No
Input
Under-volage
at VCC
(UVLO)
Recovery
Device
FLT pin (latching
/ non-latching
Condition(s)
FLT pin
VIN < 1 + R2/R1)
x 1.23 (rising)
No Startup
Not Active
VUVLO > 1.23V
(rising)
High
No
VIN < (1 + R2/R1) × 1.23V - IUVLO
× R1 (falling)
Shutdown
Not active
VUVLO > 1.23V
(rising)
High
No
VCC < 4.2V
(rising)
No Startup
Not active
VCC > 4.2V
(rising)
High
No
VCC < 4.0V
(falling)
Shutdown
Not active
VCC > 4.2V
(rising)
High
Over-voltage
Protection
(OVP)
No
VOVP > 1.23V
(rising)
Regulate to OVP
threshold:
IO(n) = “on”
Low
(non-latching)
VOVP < 1.22V
(falling)
High on removal of fault
condition
Over-current
Protection
(OCP)
No
VCS > 0.4V
Limit Q1 FET drain
current < 0.4V/R3
(typ)
High
VCS > 0.4V
High
VIO(n) > 20 x VSCP
Device on:
IO(n) = “off”
Other IO(All) = “on”
Low
(latching)
Replace shorted
LED(s) and Toggle
EN, VCC or UVLO
High
VIO(All) > 20 x VSCP
Device latch-off;
IO(All) = “off”
Low
(latching)
Replace shorted
LED(s) and Toggle
EN, VCC or UVLO
High
VIO(n) < 0.1V
and OVP event
Device on:
IO(n) = “off”
Other IO(All) = “on”
Low
(latching)
Replace open
LED(s) and Toggle
EN, VCC or UVLO
High
VIO(All) < 0.1V
and OVP event
Device latch-off;
IO(All) = “off”
Low
(latching)
Replace open
LED(s) and Toggle
EN, VCC or UVLO
High
Low
(latching)
Satisfy THYS > 10ºC;
Device on;
IO(All) = “on”;
Toggle EN, VCC or
UVLO
High
Shorted
LED(s)
Open
LED(s)
Over-Temperature Protection
(OTP)
Yes, tie
SCP to
VCC
No
No
TJ > 150ºC (typ)
Device off;
IO(All) = “off”
Note: Refer to the application circuit example on page 21.
20
SC5010H
Applications Information (continued)
An example for calculating the fading time is shown in
this section. Assuming LED PWM dimming frequency is
10kHz, then 10 bits are assigned for 1024 duty cycle
settings.
TPWM = 100 µs (with 10kHz dimming frequency)
Cycle in Zone #1 = (511 - Starting Duty Cycle) x [(Zone #1
Step Interval) / (Zone #1 Step Increment)]
Duty
Cycle
Zone
Duty Cycle
Range
Step
Increment
Step
Interval
Total Steps
within the
Range
Cycle in Zone #2 = Total Stpes in Zone #2 x [(Zone #2 Step
Interval) / (Zone #2 Step Increment)]
1
2
3
0 to 511
512 to 767
768 to 1024
1
1
2
2
1
1
512
256
256
Cycle in Zone #3 = (End Duty Cycle - 768) x [(Zone #3 Step
Interval) / (Zone #3 Step Increment)]
In this case, the total cycle will be:
Time required to go from 10% (102/1024) to 90%
(922/1024) duty cycle can be calculated using the following equation:
C1
4.7µF X 2
R2
37 .4 K Ω
C7
Vout
R9
R11
309 K Ω
0.1Ω
10nF
C6
4.7µF X 3
R10
10K Ω
C2
10 WLEDs per channel
2 .2 µF
C3
1µF
4
5
6
R6
100 kΩ
7
IO1
OVP
CS
PGND
EN
IO3
UVLO
IO4
SCP
S C 5010H
IO5
BG
IO6
FSET
IO7
AGND
IO8
R 7, 110 K Ω
8
C4
C5
100pF
2.7pF
9
10
11 12
PWM
R 5, 10 K Ω
3
22
FLT
2
10 K Ω
R4, 10kΩ
23
IO2
SDA
R3
24
VCC
SCL
1
DRVN
U1 28 27 26 25
ISET
R1
10 K Ω
VIN
AGND
Q1
CPLL
Vcc (5V)
D1
DRVP
PGND
L1
4.7µH
Q2
SYNC
Vin
(6.5-27V)
Total cycle = 2 x (511-102) + 1 x 256 + 0.5 x (922 - 768)
= 1151
Total Fading Time = Total Cycle x TPWM
= 1151 x 100 µs = 115.1ms
13
14
21
20
19
18
17
16
15
THP
PAD
R8
25.5kΩ
R15
20 K Ω
SYNC
SCL SDA
FLT
PWMI
Figure 2 — Detailed Application Circuit
21
SC5010H
Applications Information (continued)
the HSYNC input. The turn-on of rest of the strings will be
delayed based on the phase shifting algorithm. Another
figure shows the delay (~500ns) between HSYNC rising
edge and turn-on of the LED string 1 (IO1).
Optional Synchronization to SYNC Input
The SC5010H provides an option to synchronize the LED
dimming to an external clock source connected to the
SYNC pin. In certain applications, it may be beneficial to
synchronize the LED drive signal to the LCD screen refresh
signals such as VSYNC or HSYNC. This helps reduce or
eliminate some of the problems associated with using LED
backlights, such as flickering, shimmering, etc.
Input Disconnect
The SC5010H incorporates a high voltage (up to 27V) pMOSFET gate driver which can be used for controlling an
external p-channel MOSFET. The external p-channel
MOSFET provides load disconnection during shutdown or
fault mode. It also provides input inrush current limiting
during start-up. During shutdown, the DRVP pin is pulled
up to VIN voltage via an internal 1MΩ resistor. At startup,
the boost converter is held off and the DRVP pin is pulled
low via an internal 20µA (typ) current source. When the
DRVP pin is pulled lower than the threshold voltage of the
The phase lock loop available on the SC5010H can be programmed via I2C to synchronize the internal 10MHz oscillator to the SYNC input. Figures on page 11 show
synchronization of SC5010H to a 48kHz HSYNC signal
applied on SYNC pin. The turn-on of the LED string IO1
(falling edge of VIO1) is synchronized to the rising edge of
Vin
(4.5-27V)
Q2
C1
D1
C8
L1
C7
PGND
Vout
L2
R11
R2
Q1
R10
0.1Ω
6
1µF
R6
7
IO1
OVP
CS
IO4
SCP
S C 5010H
IO5
BG
IO6
FSET
IO7
AGND
IO8
R7
C4
PGND
UVLO
8
9
10
11 12
PWM
5
C3
IO3
FLT
4
R5
22
EN
SDA
3
R4
23
IO2
SCL
2
24
VCC
SYNC
1
R3
DRVN
U1 28 27 26 25
ISET
R1
DRVP
2 .2 µF
VIN
AGND
R9
C2
CPLL
Vcc (5V)
13
C6
21
20
19
18
17
16
15
THP
14
PAD
C5
R8
R15
SYNC
SCL SDA
FLT
PWMI
Figure 3 — SEPIC Configuration
22
SC5010H
Applications Information (continued)
Other Possible Configurations
external p-channel MOSFET, the input current starts
charging up the output capacitor to the input voltage.
After that, the boost converter enters into soft start
mode.
Depending on different application requirement, the
SC5010H can also be easily configured to other topology
such as SEPIC (Single-Ended Primary-Inductor Converter)
configuration as shown in Figure 3.
Fault Protection
High Output Voltage Configuration
SC5010H provides fault detection for low supply voltage,
LED related faults, missing VSYNC input, boost converter
over-voltage and thermal shutdown. The open drain
output pin (FLT) indicates a system fault. The nature of the
fault can be read from the fault status resistor (register
address: 0x00) via I2C interface. Refer to Table 2 for a
description of the Fault Protection Modes.
Vout
R9
R11
0.1Ω
10nF
C6
R10
C2
2 .2 µF
R5
C3
1µF
3
4
5
6
R6
100 kΩ
7
IO1
OVP
CS
PGND
DRVN
EN
UVLO
SCP
IO2
21
IO3
20
IO4
19
IO5
S C 5010H
BG
FSET
8
9
10
11 12
13
18
IO6
17
IO7
16
IO8
AGND
R7
C4
22
PWM
R4
23
FLT
2
SDA
10 K Ω
24
VCC
SCL
1
R3
DRVP
U1 28 27 26 25
ISET
R1
10 K Ω
VIN
AGND
Q1
C7
4 .7 µF
R2
30 K Ω
Vcc (5V)
D1
SYNC
PGND
C1
In this case, the upper limit on the output voltage is mainly
determined by the rating of the external MOSFET, heat
dissipation, etc.
L1
Q2
CPLL
Vin
(4.5-27V)
If high output voltage application is required, an additional external cascode MOSFET can be added on each IO
pin to meet such requirement, please refer to figure 4 for
reference.
15
THP
14
PAD
C5
Vcc (5V)
R8
R15
20 K Ω
SYNC
SCL SDA
FLT
PWMI
Figure 4 — Cascode Configuration (for high output voltage application)
23
SC5010H
PCB Layout Considerations
better thermal performance. The pad at the bottom
of the SC5010H should be connected to AGND. AGND
should be connected to PGND at single point for
better noise immunity.
The placements of the power components outside the
SC5010H should follow the layout guidelines of a general
boost converter. The Detailed Application Circuit is used
as an example.
1. Capacitor (C2) should be placed as close as possible to
the VCC and AGND to achieve the best performance.
2. Capacitor (C1) is the input power filtering capacitor
for the boost, it needs to be tied to PGND.
3. The converter power train inductor (L1) is the boost
converter input inductor. Use wide and short traces
connecting these components.
4. The output rectifying diode (D1) uses a Schottky
diode for fast reverse recovery. Transistor (Q1) is the
external switch. Resistor (R9) is the switch current
sensing resistor. To minimize switching noise for the
boost converter, the output capacitor (C6) should be
placed such that the loop formed by Q1, D1, C6 and
R9, is minimized. The output of the boost converter is
used to power up the LEDs. Use wide and short trace
connecting Pin DRVN and the gate of Q1. The GNDs
for R9 and C6 should be PGND. These components
should be close to the SC5010H.
5. Resistor (R8) is the output current adjusting resistor
for IO1 through IO8 and should return to AGND. Place
it next to the IC.
6. Resistor (R6) is the switching frequency adjusting
resistor and should return to AGND. Place it next to
the IC.
7. The decoupling capacitor (C3) for Pin BG should return
to AGND. Place it next to the IC.
8. Resistors (R4, R5) form a divider to set the SCP level, R4
should return to AGND. Place it next to the IC.
9. Resistors (R2, R1) form a divider to set the UVLO level
for VIN. R1 should return to AGND. Place it next to the
IC.
10. R11 and R10 form a divider to set the OVP level for
VOUT, R10 should return to AGND. Place it next to the
IC.
11. All the traces for components with AGND connection
should avoid being routed close to the noisy areas.
12. An exposed pad is located at the bottom of the
SC5010H for heat dissipation. A copper area
underneath the pad is used for better heat dissipation.
On the bottom layer of the PCB another copper area,
connected through vias to the top layer, is used for
Components Selection
Inductor Selection
The choice of the inductor affects the converter’s steady
state operation, transient response, and its loop stability.
Special attention needs to be paid to three specifications
of the inductor, its value, its DC resistance and saturation
current. The inductor’s inductance value also determines
the inductor ripple current. The boost converter will
operate in either CCM (Continuous Conduction Mode) or
DCM (Discontinuous Conduction Mode) depending on its
operating conditions. The inductor DC current or input
current can be calculated using the following equation.
,,1
9287 u ,287
9,1 u Ș
IIN — Input current; IOUT — Output current;
VOUT — Boost output voltage;
VIN — Input voltage;
η — Efficiency of the boost converter.
Then the duty ratio under CCM is shown by the following
equation.
D
VOUT VIN VD
VOUT VD
VD – Forward conduction drop of output rectifying diode
When the boost converter runs under DCM ( L < Lboundary),
it takes the advantages of small inductance and quick
transient response; where as if the boost converter works
under CCM (L > Lboundary), normally the converter has higher
efficiency.
When selecting an inductor, another factor to consider is
the peak-to-peak inductor current ripple, which is given
by the following equation.
24
SC5010H
Components Selection (continued)
ǻ,/
9,1 u '
I6: u /
Usually this peak-to-peak inductor current ripple can be
chosen between 30% to 50% of the maximum input DC
current. This gives the best compromise between the
inductor size and converter efficiency. The peak inductor
current can be calculated using the following equation.
L-peak
IN
IN
SW
For most applications, an inductor with value of 2.2µH to
22µH should be acceptable, (refer to the Typical
Application Circuit on page 21). The inductor peak current
must be less than its saturation rating. When the inductor
current is close to the saturation level, its inductance can
decrease 20% to 35% from the 0A value depending on the
vendor specifications. Using a small value inductor forces
the converter in DCM, in which case the inductor current
ramps down to zero before the end of each switching
cycle. It reduces the boost converter’s maximum output
current and produces larger input voltage ripple. The DCR
of the inductor plays a significant role for the total system
efficiency and usually there is a trade-off between the DCR
and size of the inductor. Table 3 lists some recommended
inductors and their vendors.
Table 3 — Recommended Inductors
Inductor
XFL4020, 2.2µH ~ 4.7µH
Web site
www.coilcraft.com
Output Capacitor Selection
The next design task is targeting the proper amount of
output ripple voltage due to the constant-current LED
loads. Usually X5R or X7R ceramic capacitor is recommended. The ceramic capacitor minimum capacitance
needed for a given ripple can be estimated using the following equation.
VRIPPLE – Peak to peak output ripple.
The ripple voltage should be less than 200mV (pk-pk) to
ensure good LED current sink regulation. For example, a
typical application where 40mA/channel current is
needed, the total output current for 8 channels will be
320mA, and typically a configuration of 3x 4.7µF output
capacitors is recommended.
During load transient, the output capacitor supplies or
absorbs additional current before the inductor current
reaches its steady state value. Larger capacitance helps
with the overshoot/undershoots during load transient
and loop stability.
Input Capacitor Selection
X5R or X7R ceramic capacitor is recommended for input
bypass capacitor. A 1µF capacitor is sufficient for the VCC
input. Bypass the VIN input with a 4.7µF or larger ceramic
capacitor.
Output Freewheeling Diode Selection
Schottky diodes are the ideal choice for SC5010H due to
their low forward voltage drop and fast switching speed.
Table 4 shows several different Schottky diodes that work
properly with the SC5010H. Verify that the diode has a
voltage rating greater than the maximum possible output
voltage. The diode conducts current only when the power
switch is turned off. The diode must be rated to handle the
average output current. A diode rated for 1A average
current will be sufficient for most designs.
Table 4 — Recommended Rectifier Diodes
Rectifier Diode
DFLS140
Vendor Web site
www.diodes.com
External Power MOSFET Selection
The boost converter in SC5010H uses an external power
MOSFET to regulate the output voltage and output power
to drive LED loads. This boost switching structure has an
advantage in that the SC5010H is not directly exposed to
high voltage, only the external power MOSFET, freewheeling diode and the inductor will be exposed to the output
voltage. The external power MOSFET should be selected
with its voltage rating higher than the output voltage by
minimum 30%. The current rating should be enough to
handle the inductor peak current. Low RDS(ON) MOSFETs are
preferred for achieving better efficiency.
25
SC5010H
Components Selection (continued)
The GD (gate driver) on SC5010H provides 1A (peak)
current driving capability which is suitable for most
MOSFETs for high frequency operation. The average
current required to drive the MOSFET is given by the following equation.
IGATE = QG x fSW
QG — Gate charge
The RDS(ON) and its RMS current IS_RMS of the power MOSFET
will generate the conduction loss using the following
equation.
PSW = ½ x VIN x IL_PEAK x fSW x (TON + TOFF)
Where TON and TOFF are the MOSFET’s on and off time
and they can be estimated by the following
equations.
4
5
G
J
ᤢ
J
ᤢᤡ
X
D
H
W
D
O
9S
5
G
J
4 ᤢ
J
ᤡ
X
D
H
W
D
O
9S
WI
)
)
2
7
WU
1
72
ᤡ
Where tr , tf , Qgd and Vplateau can usually be found from datasheet of the selected MOSFET. Rg is the resistance of the
optional resistor connected in series on the gate of the
MOSFET.
Current Sensing Resistor Selection
The switch current is sensed via the current sensing resistor, RSNS. The sensed voltage at this pin is used to set the
peak switch current limit and also used for steady state
regulation of the inductor current. The current limit comparator has a trip voltage of 0.4V. RSNS value is chosen to
set the peak inductor and switch current using the following equation.
PR_SNS = IRMS2 x RSNS
IRMS = D x [IO/(1-D)]2
IO = Output DC Current, D = Duty Cycle
For the typical application circuit shown in the Detailed
Application Circuit (page 21), the power dissipation on the
sensing resistor is shown by the following equations.
Assuming VIN(Min) = 6.5V and VOUT = 30V, thus D = 78.3%,
PCOND = IS_RMS2 x RDS(on)
The MOSFET’s switch loss can be calculated using the following equation.
The power dissipation in RSNS can be calculated using the
following equations.
IO = 50mA/string x 6 string = 300 (mA) = 0.3 (A)
IRMS = D x [IO/(1-D)]2 = 78.3% x [0.3A/(1-78.3%)]2
PR_SNS = 1.52 x 0.1 = 0.22 (W)
= 1.5 (A)
For this example, a 0.1 Ω 1% thick-film chip resistor rated
at 0.25W or higher power can be used.
PLL Filter Component Selection
The Detailed Application Circuit on page 21 shows the
optimal R/C filter components for the PLL compensation.
These are optimized for internal 1MHz switching frequency. Please contact Semtech application group if a
different switching frequency is selected.
Isolation MOSFET Selection
The external p-channel MOSFET provides load disconnection during shutdown or fault condition. Select a MOSFET
with low RDS(on) to limit the power loss.
In order to implement inrush current limiting, a 10nF
capacitor is connected between the gate and source terminal of the MOSFET.
If isolation is not required, then the DRVP pin can be left
floating. Connect the VIN directly to the system input
supply or, to the VCC (5V) supply. Do not leave the VIN pin
floating.
ISW(Peak) = 0.4/RSNS
26
SC5010H
Serial Interface
The I2C General Specification
The SC5010H is a read-write slave-mode I2C device and
complies with the Philips I2C standard Version 2.1, dated
January 2000. The SC5010H has 11 user-accessible internal
8-bit registers. The I2C interface has been designed for
program flexibility, supporting direct format for write
operation. Read operations are supported on both combined format and stop separated format. While there is no
auto increment/decrement capability in the SC5010H I2C
logic, a tight software loop can be designed to randomly
access the next register independent of which register
you begin accessing. The start and stop commands frame
the data-packet and the repeat start condition is allowed
if necessary.
Limitations to the I2C Specifications
The SC5010H only recognizes seven bit addressing. This
means that ten bit addressing and CBUS communication
are not compatible. The device can operate in either standard mode (100kbit/s) or fast mode (400kbit/s).
Slave Address Assignment
The seven bit slave address is 0101 111x. The eighth bit is
the data direction bit. 0x5F is used for a write operation,
and 0x5E is used for a read operation.
master responds with an 8 bit data byte consisting of the
register address. The slave acknowledges and the master
sends the repeated start condition [Sr]. Once again, the
slave address is sent, followed by an eighth bit indicating
a read. The slave responds with an acknowledge and the
8 bit data from the previously addressed register; the
master then sends a non-acknowledge (NACK). Finally, the
master terminates the transfer with the stop condition [P].
(3) Stop Separated Reads
Stop-separated reads can also be used. This format allows
a master to set up the register address pointer for a read
and return to that slave at a later time to read the data. In
this format the slave address followed by a write command
are sent after a start [S] condition. The SC5010H then
acknowledges it is being addressed, and the master
responds with the 8-bit register address. The master sends
a stop or restart condition and may then address another
slave. After performing other tasks, the master can send a
start or restart condition to the SC5010H with a read
command. The device acknowledges this request and
returns the data from the register location that had previously been set up.
Supported Formats
The supported formats are described in the following
subsections.
(1) Direct Format — Write
The simplest format for an I2C write is direct format. After
the start condition [S], the slave address is sent, followed
by an eighth bit indicating a write. The SC5010H I2C then
acknowledges that it is being addressed, and the master
responds with an 8 bit data byte consisting of the register
address. The slave acknowledges and the master sends
the appropriate 8 bit data byte. Once again, the slave
acknowledges and the master terminates the transfer with
the stop condition [P].
(2) Combined Format — Read
After the start condition [S], the slave address is sent, followed by an eighth bit indicating a write. The SC5010H I2C
then acknowledges that it is being addressed, and the
27
SC5010H
I2C Direct Format Write
S
S la ve A d d re ss
W
A
R e g iste r A d d re ss
A
D a ta
A
P
Slave Address – 7-bit
R egister address – 8-bit
D ata – 8-bit
S – Start C ondition
W – W rite = ‘0’
A – Acknow ledge (sent by slave )
P – Stop condition
I2C Stop Separated Format Read
M a ste r A d d re sse s
o th e r S la ve s
R e g iste r A d d re ss S e tu p A cce ss
S S la ve A d d re ss W A
R e g iste r A d d re ss A
P
S – Start C ondition
W – W rite = ‘0’
R – R ead = ‘1’
A – Acknow ledge (sent by slave )
N AK – N on-Acknow ledge (sent by m aster)
Sr – R epeated Start condition
P – Stop condition
S
S la ve A d d re ss B
R e g iste r R e a d A cce ss
S/Sr
S la ve A d d re ss
R A
D a ta
N AC K P
Slave Address – 7-bit
R egister address – 8-bit
D ata – 8-bit
I2C Combined Format Read
S
S la ve A d d re ss
W
A
R e g iste r A d d re ss
S – Start C ondition
W – W rite = ‘0’
R – R ead = ‘1’
A – Acknow ledge (sent by slave )
N AK – N on-Acknow ledge (sent by m aster)
Sr – R epeated Start condition
P – Stop condition
A
Sr
S la ve A d d re ss
R
A
D a ta
N AC K P
Slave Address – 7-bit
R egister address – 8-bit
D ata – 8-bit
28
SC5010H
Register Map
Address
Name
Reset
Value
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x00
Fault Status
0x00
CLF
-
LED_
SHORT
LED_
OPEN
SYNC_GD
OTP
OVP
FAULT
0x01
Device Control
0xB5
WND1
WND0
FAST_
FREQ
FLT_EN
SYNC_EN
PHASE_
SHIFT
INT_
DUTY
INT_PWM
0x02
Analog Dimming
Control
0x1F
-
-
-
IDAC4
IDAC3
IDAC2
IDAC1
IDAC0
0x03
Dimming Duty
Cycle Control 1
0x00
-
-
-
-
-
-
D9
D8
0x04
Dimming Duty
Cycle Control 2
0x00
D7
D6
D5
D4
D3
D2
D1
D0
0x05
Dimming Frequency Select
0x00
FREQ7
FREQ6
FREQ5
FREQ4
FREQ3
FREQ2
FREQ1
FREQ0
0x06
PLL Divider MSB
0x00
-
-
-
-
-
-
NPLL17
NPLL16
0x07
PLL Divider LSB2
0x00
NPLL15
NPLL14
NPLL13
NPLL12
NPLL11
NPLL10
NPLL9
NPLL8
0x08
PLL Divider LSB1
0x08
NPLL7
NPLL6
NPLL5
NPLL4
NPLL3
NPLL2
NPLL1
NPLL0
0x09
Fade Options
0x80
FADE_EN
FADE_
TYPE
-
-
-
STEP_
MUL2
STEP_
MUL1
STEP_
MUL0
0x0A
Fade Rate
0x00
-
FADE_
RATE6
FADE_
RATE5
FADE_
RATE4
FADE_
RATE3
FADE_
RATE2
FADE_
RATE1
FADE_
RATE0
29
SC5010H
Definition of Registers and Bits
Fault Status Register
This register monitors various fault conditions.
Bit Field
Definition
Read / Write Description
0x00 [7]
CLF
W
Clear latching flags bit.
(Set = 1 to clear OTP, LED_OPEN, LED_SHORT and mask OVP for 32 to 64μs)
0x00 [5]
LED_SHORT
R
LED string short circuit fault status
1 = One or more LED strings short-circuit detected
0 = no LED string short-circuit detected
0x00 [4]
LED_OPEN
R
LED string open circuit fault status
1 = One or more LED strings open-circuit detected
0 = no LED string open-circuit detected
0x00 [3]
SYNC_GD
R
SYNC good signal indication
1 = SYNC input is detected
0 = no SYNC signal detected
0x00 [2]
OTP
R
Thermal shutdown status
1 = OTP (Over-Temperature Protection) fault detected
0 = no OTP (Over-Temperature Protection) fault detected
0x00 [1]
OVP
R
Output Over-Voltage (OVP) fault
1 = Output OVP fault detected
0 = no output OVP fault detected
0x00 [0]
FAULT
R
OR of all fault conditions
1 = any one, or some, or all of the fault conditions detected
0 = no fault detected
30
SC5010H
Definition of Registers and Bits (continued)
Device Control Register
This register provides different control features of the device.
Bit Field
0x01 [7:6]
Definition
WIN[1:0]
Read / Write Description
R/W
A modified duty cycle sent into the PWMI pin replaces the existing saved duty cycle when its
deviation from the saved duty is outside the window for two consecutive samples.
00 = 0 bits (no window)
01 = ±1 bit window
10 = ±2 bit window
11 = ±3 bit window
0x01 [5]
FAST_FREQ
R/W
Determines the LED PWM dimming frequency selection:
0 = Low PWM dimming frequency mode assuming 10-bit PWM duty cycle dimming, dividing
the system clock 10MHz / (1024 x (FREQ+1)).
1 = High PWM dimming frequency mode assuming 9-bit PWM duty cycle dimming, dividing
the system clock 10MHz / (512 x (FREQ+1)).
0x01 [4]
FLT_EN
R/W
This bit enables fault checking:
0 = LED_OPEN and LED_SHORT faults are not checked.
1 = LED_OPEN and LED_SHORT faults are checked.
0x01 [3]
SYNC_EN
R/W
Enables video signal synchronization with the PLL:
0 = SYNC is disabled.
1 = PLL tracks the SYNC input signal.
0x01 [2]
PH_SHIFT
R/W
Enables String-by-String phase shifting. This is a don’t care if INT_PWM=0.
0 = Phase shifting disabled.
1 = Phase shifting is enabled
0x01 [1]
INT_DUTY
R/W
Determines the duty cycle source. This is a don’t care if INT_PWM = 0.
0 = LED duty cycle is set by the PWMI input
1 = LED duty cycle is set by the 10-bit duty cycle control registers
R/W
Sets the LED PWM dimming source.
0 = LED PWM dimming driven directly from the PWMI input source (direct PWM dimming)
1 = LED PWM dimming driven from an internal oscillator (required for phase-shifted PWM
dimming); enables the PLL.
0x01 [0]
INT_PWM
31
SC5010H
Definition of Registers and Bits (continued)
Analog Dimming Control Register
This register is used to program the LED string current through the on-chip 5-bit DAC.
Bit Field
0x02 [4:0]
Definition
IDAC [4:0]
Read / Write Description
R/W
5-bit analog dimming register — The LED string current can be evenly adjusted in 32 steps
from 0mA to the maximum value determined by RISET.
For example, if the maximum LED string current set by RISET is 20mA/string, when IDAC[4:0] is
set to be 0b00101, the LED string current will be 20mA x 5/(25-1) = 3.2mA/string.
Dimming Duty Cycle Control Register
These two registers (0x03 and 0x04) combine together as a 10-bit or 9-bit register for controlling the PWM dimming duty
cycle, depending on the value of FAST_FREQ (FAST_FREQ=1, 9-bit; FAST_FREQ=0, 10-bit).
Bit Field
Definition
0x03 [1:0]
0x04 [7:0]
D [9:0]
Read / Write Description
R/W
PWM brightness setting — This value is spread over registers: 0x03 (MSB portion) and 0x04
(LSB portion). The LED PWM dimming duty cycle can be evenly adjusted by the 10-bit register
from 0 to 100% with D[9:0] value changes from 0 to 0x3FF.
Dimming Frequency Select Register
This register is used to program the LED PWM dimming frequency.
Bit Field
Definition
0x05 [7:0]
FREQ [7:0]
Read / Write Description
R/W
This register sets the LED dimming frequency.
FAST_FREQ = 1, then LED dimming frequency is equal to 10MHz / (512 x (FREQ+1))
FAST_FREQ = 0, then LED dimming frequency is equal to 10MHz / (1024 x (FREQ+1))
PLL Control Registers
This register is used to set the PLL divider value.
Bit Field
Definition
0x06 [1:0]
0x07 [7:0]
0x08 [7:0]
NPLL [17:0]
Read / Write Description
R/W
These registers set the PLL divider value — The system clock is intended to run at 10MHz; this
value divides the system clock down to a frequency comparable to the SYNC signal’s frequency to allow PLL synchronization. Typical values are shown below.
FIN
PLL Divider N
Register Values
FPLL = (N+2) × FIN
60 Hz
169,982
0x02 - 0x97 - 0xFE
10MHz
1 MHz
8
0x00 - 0x00 - 0x08
10MHz
32
SC5010H
Definition of Registers and Bits (continued)
Fade Options Registers
This register is used to select the fade in and fade out related features.
Bit Field
Definition
Read / Write Description
0x09 [7]
FADE_EN
R/W
Enables the fading feature.
FADE_EN = 0: No Fading; Jumps directly to new PWM value.
FADE_EN = 1: Enables fading.
0x09 [6]
FADE_TYPE
R/W
Selects the fading type.
FADE_TYPE = 0: Logarithmic Fading
FADE_TYPE = 1: Linear Fading
R/W
Used to speed up fade time, when selected LED PWM dimming frequency is low. Define a 2N
multiplier of the fade amount.
STEP_MUL[2:0] = 000, N=0, multiplier = 1
STEP_MUL[2:0] = 001, N=1, multiplier = 21 = 2
STEP_MUL[2:0] = 010, N=2, multiplier = 22 = 4
STEP_MUL[2:0] = 011, N=3, multiplier = 23 = 8
STEP_MUL[2:0] = 100, N=4, multiplier = 24 = 16
STEP_MUL[2:0] = 101~111, N=5, multiplier = 25 = 32
0x09 [2:0]
STEP_MUL
[2:0]
Fade Rate Register
This register is used to program the rate of the duty cycle change during the fade in and fade out operation.
Bit Field
Definition
0x0A [6:0]
FADE_RATE
[6:0]
Read / Write Description
R/W
Defines how often the duty is changed during a fade.
Fade rate = PWM Output Rate / (1 + FADE_RATE[6:0])
33
SC5010H
Outline Drawing — MLPQ-UT-28 4x4
34
SC5010H
Land Pattern — MLPQ-UT-28 4x4
35
SC5010H
© Semtech 2011
All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright
owner. The information presented in this document does not form part of any quotation or contract, is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. Semtech assumes no responsibility or liability whatsoever for any failure or unexpected operation
resulting from misuse, neglect improper installation, repair or improper handling or unusual physical or electrical stress
including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the
specified range.
SEMTECH PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED OR WARRANTED TO BE SUITABLE FOR USE IN LIFESUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF SEMTECH PRODUCTS
IN SUCH APPLICATIONS IS UNDERSTOOD TO BE UNDERTAKEN SOLELY AT THE CUSTOMER’S OWN RISK. Should a customer
purchase or use Semtech products for any such unauthorized application, the customer shall indemnify and hold
Semtech and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs damages
and attorney fees which could arise.
Notice: All referenced brands, product names, service names and trademarks are the property of their respective
owners.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805) 498-2111 Fax: (805) 498-3804
www.semtech.com
36