TD352 Advanced IGBT/MOSFET Driver ■ ■ ■ ■ ■ ■ 1A sink / 0.75A source min. gate drive Active Miller clamp feature Desaturation detection Adjustable and accurate turn-on delay UVLO protection 2kV ESD protection N DIP-8 (Plastic Package) Description TD352 is an advanced gate driver for IGBT and power MOSFET. Control and protection functions are included and allow the design of high reliability systems. D SO-8 (Plastic Micropackage) Innovative active Miller clamp function avoids the need of negative gate drive in most applications and allows the use of a simple bootstrap supply for the high side driver. TD352 includes an adjustable turn-on delay. This feature can be used to implement reliable deadtime between high and low sides of a half bridge. External resistor and capacitor are used to provide accurate timing. Pin Connections (top view) IN Applications ■ ■ ■ 1200V 3-phase inverter Motor control systems UPS VH VREF TD352 CD OUT VL CLAMP DESAT Order Codes Part Number Temperature Range TD352IN TD352ID TD352IDT -40°C, +125°C December 2004 Package DIP SO Revision 1 Packaging Tube Tape & Reel Marking TD352I TD352I TD352I 1/13 TD352 Block Diagram 1 Block Diagram Figure 1. System and internal block diagram 16V VH 4.7k UVLO VREF CD DESAT Vref Delay VH Control Block IN OUT VL CLAMP Desat TD352 Table 1. Pin Description Name IN VREF CD DESAT CLAMP VL OUT VH 2/13 Pin Number 1 2 3 4 5 6 7 8 Type Analog input Analog output Timing capacitor Analog input Analog output Power supply Analog output Power supply Function Input +5V reference voltage Turn on delay Desaturation protection Miller clamp Signal ground Gate drive output Positive supply Absolute Maximum Ratings TD352 2 Absolute Maximum Ratings Table 2. Key parameters and their absolute maximum ratings Symbol VHL Vout Vter Pd Tstg Tj Rhja ESD Parameter Maximum Supply Voltage (VH - VL) Voltage on OUT, CLAMP, LVOFF pins Voltage on other pins (IN, CD, VREF) Power dissipation Storage temperature Maximum Junction Temperature Thermal Resistance Junction-Ambient Electrostatic discharge Value Unit 28 VL-0.3 to VH+0.3 -0.3 to 7 500 -55 to 150 150 150 2 V V V mW °C °C °C/W kV Value Unit UVLO to 26 -40 to 125 V °C Table 3. Operating Conditions Symbol VH Toper Parameter Positive Supply Voltage vs. VL Operating Free Air Temperature Range 3/13 TD352 Electrical Characteristics 3 Electrical Characteristics Table 4. Tamb = -20 to 125°C, VH=16V (unless otherwise specified) Symbol Parameter Input Vton IN turn-on threshold voltage Vtoff IN turn-off threshold voltage Iinp IN Input current Voltage reference - Note 1 Vref Voltage reference Iref Maximum output current Clamp Vtclamp CLAMP pin voltage threshold VCL Clamp low voltage Delay Vtdel Voltage threshold Rdel Discharge resistor Desaturation protection Vdes Desaturation threshold Ides Source current Outputs Isink Output sink current Isrc Output source current VOL1 Output low voltage 1 VOL2 Output low voltage 2 VOH1 Output high voltage 1 VOH2 Output high voltage 2 tr Rise time tf Fall time tdon Turn on propagation delay tdoff Turn off propagation delay Under Voltage Lockout (UVLO) UVLOH UVLO top threshold UVLOL UVLO bottom threshold Vhyst UVLO hysteresis Supply current Iin Quiescent current Test Condition Typ 0.8 1.0 4.0 IN input voltage < 4.5V T=25°C 4.85 10 5.00 Max Unit 4.2 1 V V µA 5.15 2.0 Icsink=500mA Vout=6V Vout=VH-6V Iosink=20mA Iosink=500mA Iosource=20mA Iosource=500mA CL=1nF, 10% to 90% CL=1nF, 90% to 10% 10% output change: Rd=4.7k, no Cd Rd=11k, Cd=220pF 10% output change Vhyst=UVLOH-UVLOL input low, no load 1000 750 V mA 2.5 V V 500 V Ω 2.5 I=1mA Note: 1.Recommended capacitor range on VREF pin is 10nF to 100nF 4/13 Min VH-2 250 ς µA 1700 1300 100 100 mA mA V V V V ns ns 500 2.2 400 ns µs ns 12 11 V V V 2.5 mA 0.35 2.5 VH-2.5 VH-4.0 1.8 2.0 10 9 0.5 11 10 1 Functional Description TD352 4 Functional Description 4.1 Input stage TD352 IN input is clamped at about 5V to 7V. The input is triggered by the signal edge. When using an open collector optocoupler, the resistive pull-up resistor can be connected to either VREF or VH. Recommended pull-up resistor value with VH=16V are from 4.7k to 22k. 4.2 Voltage reference A voltage reference is used to create accurate timing for the turn-on delay with external resistor and capacitor. The same circuitry is also used for the two-level turn-off delay. A decoupling capacitor (10nF to 100nF) on VREF pin is required to ensure good noise rejection. 4.3 Active Miller clamp: The TD352 offers an alternative solution to the problem of the Miller current in IGBT switching applications. Instead of driving the IGBT gate to a negative voltage to increase the safety margin, the TD352 uses a dedicated CLAMP pin to control the Miller current. When the IGBT is off, a low impedance path is established between IGBT gate and emitter to carry the Miller current, and the voltage spike on the IGBT gate is greatly reduced. During turn-off, the gate voltage is monitored and the clamp output is activated when gate voltage goes below 2V (relative to VL). The clamp voltage is VL+4V max for a Miller current up to 500mA. The clamp is disabled when the IN input is triggered again. The CLAMP function doesn’t affect the turn-off characteristic, but only keeps the gate to the low level throughout the off time. The main benefit is that negative voltage can be avoided in many cases, allowing a bootstrap technique for the high side driver supply. 4.4 Turn-on delay Turn-on (Ta) delay is programmable through external resistor Rd and capacitor Cd for accurate timing. Ta is approximately given by: Ta (µs) = 0.7 * Rd (kohms) * Cd (nF) The turn-on delay can be disabled by connecting the CD pin to VREF with a 4.7k resistor. Input signals with ON-time smaller than Ta are ignored. 4.5 Desaturation protection Desaturation protection ensures the protection of the IGBT in the event of overcurrent. When the DESAT voltage goes higher than VH-2V, the TD352 OUT pin is driven low. The fault state is only exit after powerdown and power-up. A programmable blanking time is used to allow enough time for IGBT saturation. Blanking time is provided by an internal current source and external Cdes capacitor, the Tbdes blanking time value is given by: Tbdes = Vdes * Cdes / Ides At VH=16V, Tbdes is approximately given by: Tbdes (µs) = 0.056 * Cdes (pF) 4.6 Output stage The output stage is able to sink/source 1.7A/1.3A typical at 25°C and 1.0A/0.75A min. over the full temperature range. This current capability is specified near the usual IGBT Miller plateau. 5/13 TD352 Functional Description 4.7 Undervoltage protection Undervoltage detection protects the application in the event of a low VH supply voltage (during start-up or a fault situation). During undervoltage, the OUT pin is driven low (active pull-down for VH>2V, passive pull-down for VH<2V. Figure 2. Undervoltage protection UVH VH UVL Vccmin 2V OUT FAULT 6/13 Functional Description TD352 Figure 3. Detailed internal schematic UVLO Comp_Input IN 7V 1V-4V VREF 5V Vref Comp_DelayOff Control Block CD 2.5V S2 VH 250uA Comp_Clamp CLAMP Comp_Desat DESAT 2V VH-2V S1 VH OUT VL rev. 2 7/13 TD352 Timing Diagrams 5 Timing Diagrams Figure 4. General turn-on and turn-off sequence Twin IN CD Ta VH level OUT VL level Twout Open CLAMP VH level Miller plateau Vge Clamp threshold VL level Vce Figure 5. input and output waveform dynamic parameters Twin Vtoff IN (level mode) Vton IN (edge mode) Vtoff Vton VH level tdoff OUT VL level Twout tdon Figure 6. Desaturation fault IN 2.5V CD Ta VH level OUT VL level VH-2V DESAT Desat Blanking Time 8/13 Typical Performance Curves TD352 6 Typical Performance Curves Figure 7. Quiescent current vs. temperature Figure 8. Low level output voltage vs. temperature 2.5 3.0 VOL-VL (V) In (mA) 2.0 1.5 1.0 2.0 Iosink=500mA 1.0 0.5 Iosink=20mA 0.0 0.0 -50 -25 0 25 50 75 100 125 -50 -25 0 Temp (°C) 50 75 100 125 Figure 10. Rdel resistance vs. temperature 2000 500 1800 400 Rdel (Ohms) Isink (mA) Figure 9. Sink current vs. temperature 1600 1400 1200 300 200 100 1000 0 -50 -25 0 25 50 75 100 125 -50 -25 0 Temp (°C) 50 75 100 125 Figure 12. Source current vs. temperature 1600 3.0 1400 Iosource=500mA 2.0 Isrc (mA) 4.0 1.0 25 Temp (°C) Figure 11. High level output voltage vs. temperature VH-VOH (V) 25 Temp (°C) 1200 1000 Iosource=20mA 800 0.0 -50 -25 0 25 50 Temp (°C) 75 100 125 -50 -25 0 25 50 Temp (°C) 75 100 125 9/13 TD352 Application Diagrams 7 Application Diagrams Figure 13. Single supply IGBT drive with active Miller clamp 16V VH 4.7k UVLO VREF Vref CD Delay DESAT VH Control Block IN OUT VL CLAMP Desat TD352 Figure 14. Use of DESAT input for direct overcurrent detection 16V VH 4.7k UVLO VREF Vref CD DESAT VH Control Block IN Vref Delay OUT VL CLAMP Desat TD352 Figure 15. Large IGBT drive with negative voltage gate drive and optional current buffers VH 4.7k UVLO 16V -10V VREF CD DESAT Vref Delay VH Control Block IN OUT VL CLAMP Desat TD352 10/13 Optional Optional Package Mechanical Data TD352 8 Package Mechanical Data 8.1 DIP-8 Package Plastic DIP-8 MECHANICAL DATA mm. inch DIM. MIN. A MAX. MIN. 3.3 a1 0.7 B 1.39 B1 0.91 b b1 TYP TYP. 0.028 1.65 0.055 1.04 0.036 0.5 0.38 0.065 0.041 0.020 0.5 D 0.015 0.020 9.8 E 0.386 8.8 0.346 e 2.54 0.100 e3 7.62 0.300 e4 7.62 F I Z 0.300 7.1 0.280 4.8 L 0.189 3.3 0.44 MAX. 0.130 0.130 1.6 0.017 0.063 P001F 11/13 TD352 Package Mechanical Data 8.2 SO-8 Package SO-8 MECHANICAL DATA DIM. mm. MIN. TYP inch MAX. MIN. TYP. MAX. A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.04 0.010 A2 1.10 1.65 0.043 0.065 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 3.80 4.00 0.150 0.157 e 1.27 0.050 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 k ddd 8˚ (max.) 0.1 0.04 0016023/C 12/13 Revision History TD352 9 Revision History Date Revision 01 Dec. 2004 1 Description of Changes First Release Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners © 2004 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Repubic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 13/13