FAIRCHILD FSL136MRT

FSL136MRT
Green-Mode Fairchild Power Switch (FPS™)
Features
Description
 Internal Avalanched-Rugged 650V SenseFET
 Advanced Soft Burst-Mode Operation for Low
The FSL136MRT is an integrated Pulse Width
Modulation (PWM) controller and SenseFET specifically
designed for offline Switch-Mode Power Supplies
(SMPS) with minimal external components. The PWM
controller includes an integrated fixed-frequency
oscillator, Under-Voltage Lockout (UVLO), LeadingEdge Blanking (LEB), optimized gate driver, internal
soft-start, temperature-compensated precise current
sources for loop compensation, and self-protection
circuitry. Compared with a discrete MOSFET and PWM
controller solution, the FSL136MRT can reduce total
cost, component count, size, and weight; while
simultaneously increasing efficiency, productivity, and
system reliability. This device provides a basic platform
suited for cost-effective design of a flyback converter.
Standby Power and Low Audible Noise
 Random Frequency Fluctuation for Low EMI
 Pulse-by-Pulse Current Limit
 Various Protection Functions: Overload Protection
(OLP), Over-Voltage Protection (OVP), Abnormal
Over-Current Protection (AOCP), Internal Thermal
Shutdown (TSD) with Hysteresis, and Under-Voltage
Lockout (UVLO) with Hysteresis
 Low Operating Current (0.4mA) in Burst Mode
 Internal Startup Circuit
 Built-in Soft-Start: 15ms
 Auto-Restart Mode
Applications
 Power Supply for STB Home Appliances and
DVD Combination
Ordering Information
(2)
Part Number
Package
FSL136MRT
TO-220F
6-Lead(1)
W-Forming
Output Power Table
Operating
Current RDS(ON) 230VAC ± 15%(3)
85~265VAC
Junction
Limit (Max.)
Open
Open
(4)
Temperature
Adapter
Adapter(4)
Frame(5)
Frame(5)
-40°C ~
+125°C
2.15A
4Ω
35W
50W
24W
35W
Replaces
Device
KA5M0365RY
DTU
Notes:
1. Pb-free package per JEDEC J-STD-020B.
2. The junction temperature can limit the maximum output power.
3. 230VAC or 100/115VAC with voltage doubler.
4. Typical continuous power in a non-ventilated enclosed adapter measured at 50°C ambient temperature.
5. Maximum practical continuous power in an open-frame design at 50°C ambient temperature.
© 2012 Fairchild Semiconductor Corporation
FSL136MRT • Rev. 1.0.0
www.fairchildsemi.com
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™)
May 2012
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™)
Application Circuit
VO
AC
IN
VSTR
Drain
GND
VCC
FB
Figure 1.
Typical Application Circuit
Internal Block Diagram
VSTR
VCC
Drain
6
3
1
VBURST
ICH
0.30V / 0.45V
Soft Burst
VREF
VCC Good
7.5V / 12V
Random
VCC
VREF
2.0 A
IDELAY
FB
Soft-Start
90 A
IFB
OSC
PWM
4
S
Q
R
Q
Gate
Driver
3R
R
NC
LEB (350ns)
5
VAOCP
VSD
TSD
S
Q
R
Q
2
GND
7.0V
VCC
VCC Good
VOVP
24.5V
Figure 2.
© 2012 Fairchild Semiconductor Corporation
FSL136MRT • Rev. 1.0.0
Internal Block Diagram
www.fairchildsemi.com
2
Figure 3.
Pin Configuration (Top View)
Pin Definitions
Pin #
Name
1
Drain
SenseFET Drain. High-voltage power SenseFET drain connection.
2
GND
Ground. This pin is the control ground and the SenseFET source.
3
VCC
Power Supply. This pin is the positive supply input, which provides the internal operating
current for both startup and steady-state operation.
4
FB
Feedback. This pin is internally connected to the inverting input of the PWM comparator.
The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor
should be placed between this pin and GND. If the voltage of this pin reaches 7V, the
overload protection triggers, which shuts down the FPS.
5
NC
No Connection
VSTR
Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link.
At startup, the internal high-voltage current source supplies internal bias and charges the
external capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current
source (ICH) is disabled.
6
Description
© 2012 Fairchild Semiconductor Corporation
FSL136MRT • Rev. 1.0.0
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™)
Pin Configuration
www.fairchildsemi.com
3
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min.
Max.
Unit
VSTR
VSTR Pin Voltage
650
V
VDS
Drain Pin Voltage
650
V
VCC
VCC Pin Voltage
26
V
VFB
Feedback Pin Voltage
10.0
V
-0.3
(6)
IDM
Drain Current Pulsed
12
A
IDS
Continuous Switching Drain Current
3
A
EAS
Single Pulsed Avalanche Energy(7)
230
mJ
PD
TJ
TSTG
Total Power Dissipation (TC=25°C)
(8)
Maximum Junction Temperature
50
W
150
°C
Operating Junction Temperature(9)
-40
+125
°C
Storage Temperature
-55
+150
°C
Notes:
6. Repetitive peak switching current when the inductive load is assumed: Limited by maximum duty (DMAX=0.74)
and junction temperature (see Figure 4).
7. L=45mH, starting TJ=25°C.
8. Infinite cooling condition (refer to the SEMI G30-88).
9. Although this parameter guarantees IC operation, it does not guarantee all electrical characteristics.
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™)
Absolute Maximum Ratings
IDS
DMAX
fSW
Figure 4.
Repetitive Peak Switching Current
ESD Capability
Symbol
ESD
Parameter
Value
Human Body Model, JESD22-A114
5
Charged Device Model, JESD22-C101
2
Unit
KV
Thermal Impedance
TA=25°C unless otherwise specified.
Symbol
Parameter
θJA
Junction-to-Ambient Thermal Impedance
θJC
Junction-to-Case Thermal Impedance(11)
Value
(10)
Unit
63.5
°C/W
2.8
°C/W
Notes:
10. Free standing without heat sink under natural convection condition, per JEDEC 51-2 and 1-10.
11. Infinite cooling condition per Mil Std. 883C method 1012.1.
© 2012 Fairchild Semiconductor Corporation
FSL136MRT • Rev. 1.0.0
www.fairchildsemi.com
4
TJ = 25°C unless otherwise specified.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Unit
SenseFET Section
BVDSS
Drain-Source Breakdown Voltage
VCC=0V, ID=250μA
IDSS
Zero-Gate-Voltage Drain Current
VDS=520V, TA=125°C
Drain-Source On-State Resistance
VGS=10V, ID =1A
3.5
CISS
Input Capacitance(12)
VDS=25V, VGS=0V, f=1MHz
290
pF
COSS
Output Capacitance(12)
VDS=25V, VGS=0V, f=1MHz
45
pF
CRSS
Reverse Transfer Capacitance(12)
VDS=25V, VGS=0V, f=1MHz
5.5
pF
Rise Time
VDS=325V, ID=3.5A
22
ns
RDS(ON)
tr
tf
650
V
250
μA
4.0
Ω
Fall Time
VDS=325V, ID=3.5A
19
ns
td(on)
Turn-On Delay
VDS=325V, ID=3.5A
12
ns
td(off)
Turn-Off Delay
VDS=325V, ID= 3.5A
20
ns
Control Section
fS
ΔfS
Switching Frequency(12)
VCC=14V, VFB=4V
Switching Frequency Variation
(12)
-25°C < TJ < 125°C
DMAX
Maximum Duty Ratio
VCC=14V, VFB=4V
DMIN
Minimum Duty Ratio
VCC=14V, VFB=0V
Feedback Source Current
VFB=0
IFB
VSTART
VSTOP
tS/S
UVLO Threshold Voltage
Internal Soft-Start Time
61
61
65
67
73
kHz
±5
±10
%
67
73
%
0
%
115
μA
90
VFB=0V, VCC Sweep
11
12
13
V
After Turn-on, VFB=0V
7.0
7.5
8.0
V
VCC Sweep
15
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™)
Electrical Characteristics
ms
Burst-Mode Section
VBURH
VBURL
Burst-Mode Voltage
VCC=14V, VFB Sweep
0.39
0.45
0.51
V
0.26
0.30
0.34
V
Hys
150
mV
Protection Section
ILIM
Peak Drain Current Limit
di/dt=300mA/μs
1.89
2.15
2.41
A
VSD
Shutdown Feedback Voltage
VCC=14V, VFB Sweep
6.45
7.00
7.55
V
VCC=14V, VFB=4V
1.2
2.0
2.8
μA
VCC Sweep
23.0
24.5
26.0
V
Shutdown Temperature
130
140
150
°C
IDELAY
Shutdown Delay Current
(12,14)
tLEB
Leading-Edge Blanking Time
VOVP
Over-Voltage Protection
TSD
Hys
(12)
Thermal Shutdown Temperature
350
Hysteresis
60
ns
°C
Continued on the following page…
© 2012 Fairchild Semiconductor Corporation
FSL136MRT • Rev. 1.0.0
www.fairchildsemi.com
5
TJ=25°C unless otherwise specified.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Unit
0.3
0.4
0.5
mA
1.00
1.35
mA
Total Device Section
IOP
Operating Supply Current,
(Control Part in Burst Mode)
VCC=14V, VFB=0V
IOPS
Operating Switching Current,
(Control Part and SenseFET Part)
VCC=14V, VFB=2V
Start Current
VCC=11V (Before VCC
Reaches VSTART)
85
120
155
μA
Startup Charging Current
VCC=VFB=0V, VSTR=40V
0.7
1.0
1.3
mA
Minimum VSTR Supply Voltage
VCC=VFB=0V, VSTR Sweep
ISTART
ICH
VSTR
26
V
Notes:
12. Although these parameters are guaranteed, they are not 100% tested in production.
13. Average value.
14. tLEB includes gate turn-on time.
Comparison of KA5M0365R and FSL136MRT
Function
KA5M0365RYDTU
FSL136MRT
Random Frequency
Fluctuation
N/A
Built-in
Operating Current
7mA
0.4mA
High-Voltage Startup
Circuit
N/A
Built-in
Protections
OLP
OVP
TSD
OLP
OVP
AOCP
TSD with Hysteresis
Power Balance
Long tCLD
Very Short tCLD
© 2012 Fairchild Semiconductor Corporation
FSL136MRT • Rev. 1.0.0
Advantages of FSL136MRT
Low EMI
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™)
Electrical Characteristics (Continued)
Very low stand-by power
Enhanced protections and high reliability
The difference of input power between the
low and high input voltage is quite small
www.fairchildsemi.com
6
Characteristic graphs are normalized at TA=25°C.
1.40
1.30
1.30
1.20
1.20
1.10
1.10
Normalized
Normalized
1.40
1.00
1.00
0.90
0.90
0.80
0.80
0.70
0.70
0.60
-40'C -20'C 0'C
0.60
25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
-40'C -20'C 0'C
25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
Figure 5.
Operating Supply Current (IOP) vs. TA
Figure 6.
1.30
1.30
1.20
1.20
1.10
1.10
Normalized
1.40
Normalized
1.40
Operating Switching Current (IOPS)
vs. TA
1.00
1.00
0.90
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™)
Typical Performance Characteristics
0.90
0.80
0.80
0.70
0.70
0.60
0.60
-40'C -20'C 0'C
25'C 50'C 75'C 90'C 110'C 120'C 125'C
-40'C -20'C 0'C
Temperature [ °C]
Figure 7.
25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
Startup Charging Current (ICH) vs. TA
Figure 8.
1.30
1.30
1.20
1.20
1.10
1.10
Normalized
1.40
Normalized
1.40
Peak Drain Current Limit (ILIM) vs. TA
1.00
1.00
0.90
0.90
0.80
0.80
0.70
0.70
0.60
0.60
-40'C -20'C 0'C
25'C 50'C 75'C 90'C 110'C 120'C 125'C
-40'C -20'C 0'C
Temperature [ °C]
Figure 9.
Temperature [ °C]
Feedback Source Current (IFB) vs. TA
© 2012 Fairchild Semiconductor Corporation
FSL136MRT • Rev. 1.0.0
25'C 50'C 75'C 90'C 110'C 120'C 125'C
Figure 10. Shutdown Delay Current (IDELAY) vs. TA
www.fairchildsemi.com
7
1.40
1.40
1.30
1.30
1.20
1.20
1.10
1.10
Normalized
Normalized
Characteristic graphs are normalized at TA=25°C.
1.00
0.90
1.00
0.90
0.80
0.80
0.70
0.70
0.60
0.60
-40'C -20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
-40'C -20'C 0'C
Temperature [ °C]
Figure 11. UVLO Threshold Voltage (VSTART) vs. TA
Figure 12. UVLO Threshold Voltage (VSTOP) vs. TA
1.40
1.30
1.30
1.20
1.20
1.10
1.10
Normalized
Normalized
1.40
1.00
0.90
1.00
0.90
0.80
0.80
0.70
0.70
0.60
0.60
-40'C -20'C 0'C
-40'C -20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
Figure 14. Over-Voltage Protection (VOVP) vs. TA
Figure 13. Shutdown Feedback Voltage (VSD)
vs. TA
1.40
1.40
1.30
1.30
1.20
1.20
1.10
1.10
Normalized
Normalized
25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™)
Typical Performance Characteristics
1.00
0.90
1.00
0.90
0.80
0.80
0.70
0.70
0.60
0.60
-40'C -20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
-40'C -20'C 0'C 25'C 50'C 75'C 90'C 110'C 120'C 125'C
Temperature [ °C]
Temperature [ °C]
Figure 15. Switching Frequency (fS) vs. TA
© 2012 Fairchild Semiconductor Corporation
FSL136MRT • Rev. 1.0.0
Figure 16. Maximum Duty Ratio (DMAX) vs. TA
www.fairchildsemi.com
8
3. Feedback Control: This device employs CurrentMode control, as shown in Figure 18. An opto-coupler
(such as the FOD817) and shunt regulator (such as the
KA431) are typically used to implement the feedback
network. Comparing the feedback voltage with the
voltage across the RSENSE resistor makes it possible to
control the switching duty cycle. When the reference pin
voltage of the shunt regulator exceeds the internal
reference voltage of 2.5V, the opto-coupler LED current
increases, pulling down the feedback voltage and
reducing drain current. This typically occurs when the
input voltage is increased or the output load is decreased.
1. Startup: At startup, an internal high-voltage current
source supplies the internal bias and charges the
external capacitor (CVCC) connected to the VCC pin, as
illustrated in Figure 17. When VCC reaches 12V, the
FSL136MRT begins switching and the internal highvoltage current source is disabled. Normal switching
operation continues and the power is supplied from the
auxiliary transformer winding unless VCC goes below the
stop voltage of 7.5V.
3.1 Pulse-by-Pulse Current Limit: Because CurrentMode control is employed, the peak current through
the SenseFET is limited by the inverting input of PWM
comparator (VFB*), as shown in Figure 18. Assuming
that the 90μA current source flows only through the
internal resistor (3R + R =27kΩ), the cathode voltage
of diode D2 is about 2.4V. Since D1 is blocked when
the feedback voltage (VFB) exceeds 2.4V, the
maximum voltage of the cathode of D2 is clamped at
this voltage. Therefore, the peak value of the current
through the SenseFET is limited.
Figure 17. Startup Block
3.2 Leading-Edge Blanking (LEB): At the instant the
internal SenseFET is turned on, a high-current spike
usually occurs through the SenseFET, caused by
primary-side capacitance and secondary-side rectifier
reverse recovery. Excessive voltage across the RSENSE
resistor leads to incorrect feedback operation in the
Current-Mode PWM control. To counter this effect, the
leading-edge blanking (LEB) circuit inhibits the PWM
comparator for tLEB (350ns) after the SenseFET is
turned on.
2. Soft-Start: The internal soft-start circuit increases
PWM comparator inverting input voltage, together with
the SenseFET current, slowly after startup. The typical
soft-start time is 15ms. The pulse width to the power
switching device is progressively increased to establish
the correct working conditions for the transformers,
inductors, and capacitors. The voltage on the output
capacitors is progressively increased to smoothly
establish the required output voltage. This helps prevent
transformer saturation and reduces stress on the
secondary diode during startup.
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™)
Functional Description
Figure 18. Pulse Width Modulation Circuit
© 2012 Fairchild Semiconductor Corporation
FSL136MRT • Rev. 1.0.0
www.fairchildsemi.com
9
B
increasing until it reaches 7.0V, when the switching
operation is terminated, as shown in Figure 20. The
delay for shutdown is the time required to charge CFB
from 2.4V to 7.0V with 2.0µA. This protection is
implemented in Auto-Restart Mode.
B
Figure 20. Overload Protection
4.2 Abnormal Over-Current Protection (AOCP):
When the secondary rectifier diodes or the
transformer pins are shorted, a steep current with
extremely high di/dt can flow through the SenseFET
during the minimum turn-on time. Even though the
FSL136MRT has overload protection, it is not enough
to protect the FSL136MRT in that abnormal case; due
to the severe current stress imposed on the
SenseFET until OLP is triggered. The internal AOCP
circuit is shown in Figure 21. When the gate turn-on
signal is applied to the power SenseFET, the AOCP
block is enabled and monitors the current through the
sensing resistor. The voltage across the resistor is
compared with a preset AOCP level. If the sensing
resistor voltage is greater than the AOCP level, the
set signal is applied to the S-R latch, resulting in the
shutdown of the SMPS.
Figure 19. Auto-Restart Protection Waveforms
4.1 Overload Protection (OLP): Overload is defined
as the load current exceeding its normal level due to
an unexpected abnormal event. In this situation, the
protection circuit should trigger to protect the SMPS.
However, even when the SMPS is in normal
operation, the overload protection circuit can be
triggered during the load transition. To avoid this
undesired operation, the overload protection circuit is
designed to trigger only after a specified time to
determine whether it is a transient situation or a true
overload situation. Because of the pulse-by-pulse
current limit capability, the maximum peak current
through the SenseFET is limited and, therefore, the
maximum input power is restricted with a given input
voltage. If the output consumes more than this
maximum power, the output voltage (VOUT) decreases
below the set voltage. This reduces the current
through the opto-coupler LED, which also reduces the
opto-coupler transistor current, increasing the
feedback voltage (VFB). If VFB exceeds 2.4V, D1 is
blocked and the 2.0µA current source starts to charge
CFB slowly up. In this condition, VFB continues
© 2012 Fairchild Semiconductor Corporation
FSL136MRT • Rev. 1.0.0
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™)
4. Protection Circuits: The FSL136MRT has several
self-protective functions, such as Overload Protection
(OLP), Abnormal Over-Current Protection (AOCP),
Over-Voltage Protection (OVP), and Thermal Shutdown
(TSD). All the protections are implemented as autorestart. Once the fault condition is detected, switching is
terminated and the SenseFET remains off. This causes
VCC to fall. When VCC falls to the Under-Voltage Lockout
(UVLO) stop voltage of 7.5V, the protection is reset and
the startup circuit charges the VCC capacitor. When VCC
reaches the start voltage of 12.0V, the FSL136MRT
resumes normal operation. If the fault condition is not
removed, the SenseFET remains off and VCC drops to
stop voltage again. In this manner, the auto-restart can
alternately enable and disable the switching of the
power SenseFET until the fault condition is eliminated.
Because these protection circuits are fully integrated
into the IC without external components, reliability is
improved without increasing cost.
Figure 21. Abnormal Over-Current Protection
www.fairchildsemi.com
10
6. Random Frequency Fluctuation (RFF): Fluctuating
switching frequency of an SMPS can reduce EMI by
spreading the energy over a wide frequency range. The
amount of EMI reduction is directly related to the
switching frequency variation, which is limited internally.
The switching frequency is determined randomly by
external feedback voltage and an internal free-running
oscillator at every switching instant. This random
frequency fluctuation scatters the EMI noise around
typical switching frequency (67kHz) effectively and can
reduce the cost of the input filter included to meet the
EMI requirements (e.g. EN55022).
4.5 Thermal Shutdown (TSD): The SenseFET and
the control IC on a die in one package makes it easier
for the control IC to detect the over temperature of the
SenseFET. If the temperature exceeds 140°C, the
thermal shutdown is triggered and stops operation.
The FSL136MRT operates in Auto-Restart Mode until
the temperature decreases to around 80°C, when
normal operation resumes.
Figure 23. Random Frequency Fluctuation
5. Soft Burst-Mode Operation: To minimize power
dissipation in Standby Mode, the FSL136MRT enters
Burst-Mode operation. As the load decreases, the
feedback voltage decreases. The device automatically
enters Burst Mode when the feedback voltage drops
below VBURL (300mV), as shown in Figure 22. At this
point, switching stops and the output voltages start to
drop at a rate dependent on standby current load. This
causes the feedback voltage to rise. Once it passes
VBURH (450mV), switching resumes. The feedback
voltage then falls and the process repeats. Burst Mode
alternately enables and disables switching of the
SenseFET, reducing switching loss in Standby Mode.
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™)
4.4 Over-Voltage Protection (OVP): If the
secondary-side feedback circuit malfunctions or a
solder defect causes an opening in the feedback path,
the current through the opto-coupler transistor
becomes almost zero. Then VFB climbs up in a similar
manner to the overload situation, forcing the preset
maximum current to be supplied to the SMPS until the
overload protection is triggered. Because more
energy than required is provided to the output, the
output voltage may exceed the rated voltage before
the overload protection is triggered, resulting in the
breakdown of the devices in the secondary side. To
prevent this situation, an OVP circuit is employed. In
general, the VCC is proportional to the output voltage
and the FS136MRT uses VCC instead of directly
monitoring the output voltage. If VCC exceeds 24.5V,
an OVP circuit is triggered, resulting in the termination
of the switching operation. To avoid undesired
activation of OVP during normal operation, VCC should
be designed to be below 24.5V.
Figure 22. Burst-Mode Operation
© 2012 Fairchild Semiconductor Corporation
FSL136MRT • Rev. 1.0.0
www.fairchildsemi.com
11
10.16
9.96
2.74
2.34
(7.00)
3.40
3.20
(0.70)
Ø3.28
3.08
(5.40)
16.07
15.67
6.90
6.50
20.00
19.00
(13.05)
24.00
23.00
(0.48)
R0.55
R0.55
8.13 1.40
7.13 1.20
(1.13)
3.06
2.46 (7.15)
0.80
0.70
1
0.70
0.50
6
2.19
2,4,6
1,3,5
0.60
0.45
1.75
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™)
Physical Dimensions
3.48
2.88
1.27
3.81
5°
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE DOES NOT COMPLY
TO ANY CURRENT PACKAGING STANDARD.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS.
D) LEADFORM OPTION A
E) DFAWING FILENAME: TO220A06REV4
5°
Figure 24. TO-220F-6L (W-Forming)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2012 Fairchild Semiconductor Corporation
FSL136MRT • Rev. 1.0.0
www.fairchildsemi.com
12
FSL136MRT — Green-Mode Fairchild Power Switch (FPS™)
© 2012 Fairchild Semiconductor Corporation
FSL136MRT • Rev. 1.0.0
www.fairchildsemi.com
13