UNISONIC TECHNOLOGIES CO., LTD UPS604 LINEAR INTEGRATED CIRCUIT HIGH PERFORMANCE CURRENT MODE POWER SWITCH DESCRIPTION The UTC UPS604 is designed to provide several special enhancements to satisfy the needs, for example, Power-Saving mode for low standby power (<0.3W), Frequency Hopping , Constant Output Power Limiting , Slope Compensation ,Over Current Protection (OCP), Over Voltage Protection (OVP), Over Load Protection (OLP), Under Voltage Lock Out (UVLO), Short Circuit Protection (SCP) , Over Temperature Protection (OTP) etc. IC will be shutdown or can auto-restart in situations. DIP-8 FEATURE * Low startup current (about 22μA) * Fixed switching frequency(Norm. is 68KHz) * Frequency hopping for Improved EMI Performance. * Lower than 0.3W Standby Power Design * Linearly decreasing frequency to 26KHz during light load * Soft start * Internal Slope Compensation * Constant Power Limiting for universal AC input Range * Gate Output Maximum Voltage Clamp(15V) * Max duty cycle 74% * Over temperature protection * Overload protection * Over voltage protection * Leading edge blanking * Cycle-by-Cycle current limiting * Under Voltage Lock Out * Short Circuit Protection ORDERING INFORMATION Ordering Number Lead Free Halogen Free UPS604L-D08-T UPS604G-D08-T www.unisonic.com.tw Copyright © 2011 Unisonic Technologies Co., Ltd Package Packing DIP-8 Tube 1 of 12 QW-R119-006.E UPS604 LINEAR INTEGRATED CIRCUIT PIN CONFIGURATION DRAIN 1 8 DRAIN VIN 2 7 CS VCC 3 6 FB GND 4 5 SS PIN DESCRIPTION PIN 1 2 3 4 5 6 7 8 NAME DRAIN VIN VCC GND SS FB CS DRAIN FUNCTION Power MOSFET drain For startup and constant power limit, this pin is pulled to the line input via resistor Supply voltage Ground Soft-start Feedback Controller current sense input Power MOSFET drain UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 12 QW-R119-006.E UPS604 LINEAR INTEGRATED CIRCUIT BLOCK DIAGRAM VCC 3 Frequency Hopping OVP Logic Control SS 1 DRAIN 8 DRAIN 7 CS Oscillator UVLO Reference voltage Soft Start 5 Latch Delay Time OTP S Q R Q Driver Burstmode OLP FB 6 PWM COMP Slope Compensation Constant Power Limit 4 2 GND VIN OCP LEB Notes: OLP (Over Load Protection) OVP (Over Voltage Protection) OTP (Over Temperature Protection) OCP (Over Current Protection) UVLO (Under Voltage Latch-Out) LEB (Led Edge Blanking) SS (Soft Start) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 12 QW-R119-006.E UPS604 LINEAR INTEGRATED CIRCUIT ABSOLUTE MAXIMUM RATINGS (Ta＝25°C, unless otherwise specified) PARAMETER SYMBOL RATINGS UNIT Supply Voltage VCC 30 V Input Voltage to Vin Pin Vin 30 V Input Voltage to FB Pin VFB -0.3 ~ 6.2 V Input Voltage to CS Pin VCS -0.3 ~ 2.8 V Junction Temperature TJ +150 °C Operating Temperature TOPR -40 ~ +125 °C Storage Temperature TSTG -50 ~ +150 °C Absolute maximum ratings are those values beyond which the device could be permanently damaged. Note: Absolute maximum ratings are stress ratings only and functional device operation is not implied. OPERATING RANGE PARAMETER Supply Voltage SYMBOL VCC RATINGS 8.6 ~ 22 UNIT V ELECTRICAL CHARACTERISTICS (Ta＝25°C, VCC=15V, unless otherwise specified) PARAMETER SUPPLY SECTION Start Up Current Supply Current with switch UNDER-VOLTAGE LOCKOUT SECTION Start Threshold Voltage Min. Operating Voltage Hysteresis INTERNAL VOLTAGE REFERENCE Reference Voltage CONTROL SECTION VFB Operating Level Burst-Mode Out FB Voltage Reduce-Frequency end FB Voltage Burst-Mode Enter FB Voltage Normal Switch Frequency Power-Saving Duty Cycle Frequency Hopping Frequency Variation VS VCC Deviation Frequency Variation VS Temperature Deviation Feedback Resistor Soft-Start Time PROTECTION SECTION OVP threshold OLP threshold Delay Time Of OLP OTP threshold OVP Disable threshold OLP Enable threshold SYMBOL ISTR IOFF ION VREF VMIN VMAX VFB(OUT) VFB(END) VFB(IN) MIN TYP MAX UNIT 22 7 7 45 9 9 μA mA mA 13.5 7.5 14.2 8.2 6 15 9 V V V 6.3 6.5 6.7 V VCC = VCC(ON)-0.1V VSS = 0, IFB = 0 VSS = 4.8V, IFB = 0 VTHD(ON) VCC(MIN) VCC(HY) measured at pin VFB VCC=10 to 20V ±4.5 5 V V V V V kHz kHz % % kHz % FDT T=-40 to 105°C 5 % RFB TSS VFB=0V CSS=0.47μF 26 12.6 kΩ ms 5.1 70 150 4.3 5.7 V V V ms °C V V F(SW) DMAX DMIN FJ(SW) FDV VOVP1 VOVP2 VFB(OLP) TD-OLP T(THR) VSS(DEACT) VSS(ACT) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw TEST CONDITIONS 0.5 4.4 VCS =0 VCS =0 VCS =0 VFB = 4V Before enter burst mode VFB=4.4V, VCS =0 VFB<0.5V VSS<3.5V,VFB>5V VSS=4.8V, VFB=3V VCS=0, SS OPEN CSS=0.47μF VFB>5V, VCC = 22V VFB>5V 61 20 68 0 ±1.5 1.7 1.6 1.5 68 74 ±3 16 9.9 21 11.2 4.7 55 120 3.9 5.1 19 28 4.9 62 135 4.1 5.4 75 40 80 4 of 12 QW-R119-006.E UPS604 LINEAR INTEGRATED CIRCUIT ELECTRICAL CHARACTERISTICS(Cont.) PARAMETER SYMBOL TEST CONDITIONS CURRENT LIMITING SECTION Peak Current Limitation VCS VFB=4.4V Threshold Voltage For IVIN =60μA VSENSE-L IVIN=60μA POWER MOS-TRANSISTOR SECTION Drain-Source Breakdown Voltage VDSS VGS=0V, ID=250μA Turn-on voltage between gate and source VTH VDS=VGS, ID=250μA Drain-Source Diode Continuous Source IS Current Static Drain-Source On-State Resistance RDS(ON) VGS=10V,ID=2.2A VDD =300V, ID =4.0A Rise Time tR RG=25Ω (Note 1,2) Fall Time tF Notes: 1. Pulse Test: Pulse width≤300μs, Duty cycle≤2% 2. Essentially independent of operating temperature UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MIN TYP MAX UNIT 0.86 0.77 1 V V 600 2 45 35 4 V V 4.4 A 2.5 100 80 Ω ns ns 5 of 12 QW-R119-006.E UPS604 LINEAR INTEGRATED CIRCUIT FUNCTIONAL DESCRIPTION The internal reference voltages and bias circuit work at VCC> VTHD (ON), and shutdown at VCC<VCC (MIN). (1) Soft-Start When every IC power on, driver output duty cycle will be decided by voltage VSS on soft-start capacitor and VCS on current sense resistor at beginning. After VSS reach 4.2V, the whole soft-start phase end, and driver duty cycle depend on VFB and VCS. The relation among VSS, VFB and VOUT as followed FIG.3. Furthermore, soft-start phase should end before VCC reach VCC (MIN) during VCC power on. Otherwise, if soft-start phase remain not end before VCC reach VCC (MIN) during VCC power on, IC will enter auto-restart phase and not set up VOUT. So the value of CSS should be between 0.1μFand 4.7μF. Finally soft-start also set OVP1 active phase. OVP1 active phase between 0 and VSS(DEACT), OVP1 will not be sensed after VSS reach VSS(DEACT).The Soft-start phase TSS：TSS = 23.8×CSS (ms) (Example: CSS=0.47μF, then TSS=23.8×0.47=11.2ms). VSS 4.2V TSOFT-START t VFB 4.8V t VOUT TSTRAT-UP t Driver t Fig.3 Soft-start phase UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 12 QW-R119-006.E UPS604 LINEAR INTEGRATED CIRCUIT FUNCTIONAL DESCRIPTION(Cont.) fsw (kHz) (2) Switch Frequency Set The maximum switch frequency is set to 68kHz. Switch frequency is modulated by output power POUT during IC operating. At no load or light load condition, most of the power dissipation in a switching mode power supply is from switching loss on the MOSFET transistor, the core loss of the transformer and the loss on the subber circuit. The magnitude of power loss is in proportion to the number of switching events within a fixed period of time. So lower switch frequency at lower load, which more and more improve IC’s efficiency at light load. At from no load to light load condition, The IC will operate at from Burst mode to Reducing Frequency Mode. The relation curve between fSW and POUT/POUT (MAX) as followed FIG.4. FIG.4 The relation curve between fSW and relative output power POUT/ POUT (MAX) (3) Internal Synchronized Slope Compensation Built-in slope compensation circuit adds voltage ramp onto the current sense input voltage for PWM generation, this greatly improves the close loop stability at CCM and prevents the sub-harmonic oscillation and thus reduces the output ripple voltage. (4) Frequency Hopping For EMI Improvement The Frequency hopping is implemented in the IC; there are two oscillators built-in the IC. The first oscillator is to set the normal switching frequency; the switching frequency is modulated with a period signal generated by the 2nd oscillator. The relation between the first oscillator and the 2nd oscillator as followed FIG.5. So the tone energy is evenly spread out, the spread spectrum minimizes the conduction band EMI and therefore eases the system design in meeting stringent EMI requirement. Fosc (kHz) FSW_MAX FSW_TYP FSW_MIN THopping t(ms) FIG.5 Frequency Hopping UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 7 of 12 QW-R119-006.E UPS604 LINEAR INTEGRATED CIRCUIT FUNCTIONAL DESCRIPTION(Cont.) (5) Constant Output Power Limit When the SENSE voltage, across the sense resistor RS, reaches the threshold voltage, around 0.8V, the output GATE drive will be turned off after a small propagation delay tD. This propagation delay will introduce an additional current proportional to tD×VIN/Lp. Since the propagation delay is nearly constant regardless of the input line voltage VIN. Higher input line voltage will result in a larger additional current and hence the output power limit is also higher than that under low input line voltage. To compensate this variation for wide AC input range, the threshold voltage is adjusted by the VIN current. Since VIN pin is connected to the rectified input line voltage through a resistor RVIN, a higher line voltage will generate higher VIN current into the VIN pin. The threshold voltage is decreased if the VIN current is increased. Smaller threshold voltage, forces the output GATE drive to terminate earlier, thus reduce the total PWM turn-on time and make the output power equal to that of low line input. This proprietary internal compensation ensures a constant output power limit for wide AC input voltage from 90VAC to 264VAC. (6) Protection section The IC takes on more protection functions such as OLP, OVP and OTP etc. In case of those failure modes for continual blanking time, the driver is shut down. At the same time, IC enters auto-restart, VCC power on and driver is reset after VCC power on again. OLP After soft-start phase end, IC will shutdown driver if over load state occurs for continual TD-OLP. OLP function will not inactive during soft-start phase. OLP case as followed FIG. 6. The test circuit as followed FIG.8. TD-OLP=5.53×TSS. OVP There are two kinds of OVP circuits, the first OVP function are enabled only when VSS<VSS (DEACT) & VFB>VFB (OLP) during soft-start phase. During above condition, driver will be shutdown if over voltage state occurs (VCC>VOVP1) for continual a blanking time. The first OVP function will not inactive after soft-start phase. The second OVP will shutdown the switching of the power MOSFET whenever VCC>VOVP2. The first OVP case as followed FIG.7. The test circuit as followed FIG.9. FIG.6 OLP case UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw FIG.7 OVP case 8 of 12 QW-R119-006.E UPS604 LINEAR INTEGRATED CIRCUIT FUNCTIONAL DESCRIPTION(Cont.) FIG.8 OLP test circuit FIG.9 OVP test circuit OTP OTP will shut down driver when junction temperature TJ>T (THR) for continual a blanking time. (7) Driver Output Section The driver-stage drives the gate of the MOSFET and is optimized to minimize EMI and to provide high circuit efficiency. This is done by reducing the switch on slope when reaching the MOSFET threshold. This is achieved by a slope control of the rising edge at the driver’s output. The output driver is clamped by an internal 15V Zener diode in order to protect power MOSFET transistors against undesirable gate over voltage. (8) Inside power switch MOS transistor Specific power MOS transistor parameter is as “POWER MOS TRANSISTOR SECTION” in electrical characteristics table. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 9 of 12 QW-R119-006.E UPS604 LINEAR INTEGRATED CIRCUIT TYPICAL APPLICATION CIRCUIT FIG.10 UPS604 Typical Application Circuit Table1. Components reference description for UPS604 application circuit DESIGNATOR C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 PART TYPE 33μF 0.001μF 22μF 470μF 470μF 0.1μF 0.01μF 0.001μF 0.1μF 220μF DESIGNATOR R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw PART TYPE 2.2MΩ 2.2MΩ 68KΩ 100Ω 1MΩ 15Ω 560Ω 1KΩ 3.9KΩ 15KΩ 10KΩ 1.5MΩ~4MΩ 1.0Ω 1.8KΩ DESIGNATOR PART TYPE D1 FR107 D2 SB5100 D3 RS1D UPS604 IC1 IC2 PC-817 IC3 TL431 YC1 222 T1 EE25 L1 UU10.5 L2 2μH L3 Ring Choke LD1 LED F1 2A/250V ZNR1 7D471K TR1 SCK102R55A XC1 334/275V BD1 KBP205 10 of 12 QW-R119-006.E UPS604 LINEAR INTEGRATED CIRCUIT TYPICAL CHARACTERISTICS 12V Feedback Voltage During Loadjump From 10% Up To 100% Load (VAC=90V) 12V 10V 10V 8V 8V 6V 6V 4V 4V 2V 2V 0 0 -2V -2V 0 2000 Time (400μs/div) 4000 Startup With Full Load Condition at VAC=90V, VSS and VOUT 8V 0 6V 4V 4V 2V 2V VSS 4000 2000 Time (400μs/div) Startup With Full Load Condition at VAC=264V, VSS and VOUT 8V 6V 0 Feedback Voltage During Loadjump From 10% Up To 100% Load (VAC=264V) VSS 0 10V 10V 5V 5V VOUT 0 0 50 Time (10ms/div) 0 100 Startup Behavior At Nominal Load Condition VAC=90V 8V 6V 4V 4V 2V VSS 0 50 Time (10ms/div) 100 Startup Behavior At Nominal Load Condition VAC=264V 8V 6V 2V VOUT 0 VSS 0 4V 4V 2V 2V VFB 0 VFB 0 0 20 Time (4ms/div) 40 UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 0 20 Time (4ms/div) 40 11 of 12 QW-R119-006.E UPS604 TYPICAL CHARACTERISTICS(Cont.) Input Power (W) Frequency(KHz) LINEAR INTEGRATED CIRCUIT UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 12 of 12 QW-R119-006.E