25AA02E48
2K SPI Bus Serial EEPROM with EUI-48™ Node Identity
Device Selection Table
Part Number
VCC Range
Page Size
Temp. Ranges
Packages
25AA02E48
1.8-5.5V
16 Bytes
I
SN, OT
Features:
Description:
• Pre-programmed Globally Unique, 48-bit Node
Address
• Compatible with EUI-48™ and EUI-64™
• 10 MHz max. Clock Frequency
• Low-Power CMOS Technology:
- Max. Write Current: 5 mA at 5.5V
- Read Current: 5 mA at 5.5V, 10 MHz
- Standby Current: 1 μA at 2.5V
• 256 x 8-bit Organization
• Write Page mode (up to 16 bytes)
• Sequential Read
• Self-Timed Erase and Write Cycles (5 ms max.)
• Block Write Protection:
- Protect none, 1/4, 1/2 or all of array
• Built-in Write Protection:
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
• High Reliability:
- Endurance: 1,000,000 erase/write cycles
- Data retention: >200 years
- ESD protection: >4000V
• Temperature Ranges Supported:
- Industrial (I):
-40°C to +85°C
The Microchip Technology Inc. 25AA02E48 is a 2 Kbit
Serial Electrically Erasable Programmable Read-Only
Memory (EEPROM). The memory is accessed via a
simple Serial Peripheral Interface (SPI) compatible
serial bus. The bus signals required are a clock input
(SCK) plus separate data in (SI) and data out (SO)
lines. Access to the device is controlled through a Chip
Select (CS) input.
• Pb-Free and RoHS Compliant
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused, transitions on its inputs will be ignored, with the exception of
Chip Select, allowing the host to service higher priority
interrupts.
The 25AA02E48 is available in the standard 8-lead
SOIC and 6-lead SOT-23 packages.
Package Types (not to scale)
Name
CS
Serial Data Output
Write-Protect
VSS
Ground
SCK
VCC
6
VSS
2
5
CS
SI
3
4
SO
Note:
VDD
CS
SO
1
2
8
7
VCC
HOLD
WP
3
6
SCK
VSS
4
5
SI
This document is supplemented by the
“25AA020A Data Sheet” (DS21833). See
Section 2.0 “Functional Description”.
Chip Select Input
SO
HOLD
(SN)
Function
WP
SI
SOIC
(OT)
1
SCK
Pin Function Table
SOT-23
Serial Data Input
Serial Clock Input
Hold Input
Supply Voltage
© 2008 Microchip Technology Inc.
Preliminary
DS22123A-page 1
25AA02E48
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings(†)
VCC .............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature .................................................................................................................................-65°C to 150°C
Ambient temperature under bias .................................................................................................................-40°C to 85°C
ESD protection on all pins ..........................................................................................................................................4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an
extended period of time may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
DC CHARACTERISTICS
Param.
No.
Sym.
Characteristic
Industrial (I):
TA = -40°C to +85°C
Min.
Max.
Units
D001
VIH1
High-level Input
voltage
0.7 VCC
VCC +1
V
D002
VIL1
-0.3
0.3 VCC
V
D003
VIL2
Low-level Input
Voltage
D004
VOL
VCC = 1.8V to 5.5V
Test Conditions
VCC ≥ 2.7V (Note 1)
-0.3
0.2 VCC
V
VCC < 2.7V (Note 1)
Low-level Output
Voltage
—
0.4
V
IOL = 2.1 mA
—
0.2
V
IOL = 1.0 mA, VCC < 2.5V
VCC -0.5
—
V
IOH = -400 μA
D005
VOL
D006
VOH
High-level Output
Voltage
D007
ILI
Input Leakage
Current
—
±1
μA
CS = VCC, VIN = VSS TO VCC
D008
ILO
Output Leakage
Current
—
±1
μA
CS = VCC, VOUT = VSS TO VCC
D009
CINT
Internal Capacitance
(all inputs and
outputs)
—
7
pF
TA = 25°C, CLK = 1.0 MHz,
VCC = 5.0V (Note 1)
D010
ICC Read
—
5
mA
—
2.5
mA
VCC = 5.5V; FCLK = 10.0 MHz;
SO = Open
VCC = 2.5V; FCLK = 5.0 MHz;
SO = Open
—
—
5
3
mA
mA
VCC = 5.5V
VCC = 2.5V
—
1
μA
CS = VCC = 2.5V, Inputs tied to VCC or
VSS, TA = +85°C
Operating Current
D011
ICC Write
D012
ICCS
Note:
Standby Current
This parameter is periodically sampled and not 100% tested.
DS22123A-page 2
Preliminary
© 2008 Microchip Technology Inc.
25AA02E48
TABLE 1-2:
AC CHARACTERISTICS
AC CHARACTERISTICS
Param.
Sym.
No.
Characteristic
Industrial (I):
TA = -40°C to +85°C
VCC = 1.8V to 5.5V
Min.
Max.
Units
Test Conditions
—
—
—
10
5
3
MHz
MHz
MHz
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
1
FCLK
Clock Frequency
2
TCSS
CS Setup Time
50
100
150
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
3
TCSH
CS Hold Time
100
200
250
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
4
TCSD
CS Disable Time
50
—
ns
—
5
Tsu
Data Setup Time
10
20
30
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
6
THD
Data Hold Time
20
40
50
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
7
TR
CLK Rise Time
—
100
ns
(Note 1)
8
TF
CLK Fall Time
—
100
ns
(Note 1)
9
THI
Clock High Time
50
100
150
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
10
TLO
Clock Low Time
50
100
150
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
11
TCLD
Clock Delay Time
50
—
ns
—
12
TCLE
Clock Enable Time
50
—
ns
—
13
TV
Output Valid from Clock
Low
—
—
—
50
100
160
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
14
THO
Output Hold Time
0
—
ns
(Note 1)
15
TDIS
Output Disable Time
—
—
—
40
80
160
ns
ns
ns
4.5V ≤ VCC < 5.5V (Note 1)
2.5V ≤ VCC < 4.5V (Note 1)
1.8V ≤ VCC < 2.5V (Note 1)
16
THS
HOLD Setup Time
20
40
80
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
Note 1: This parameter is periodically sampled and not 100% tested.
2: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site
at www.Microchip.com.
3: TWC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycle
is complete.
© 2008 Microchip Technology Inc.
Preliminary
DS22123A-page 3
25AA02E48
TABLE 1-2:
AC CHARACTERISTICS (CONTINUED)
AC CHARACTERISTICS
Param.
Sym.
No.
Industrial (I):
Characteristic
TA = -40°C to +85°C
Min.
Max.
Units
VCC = 1.8V to 5.5V
Test Conditions
17
THH
HOLD Hold Time
20
40
80
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
18
THZ
HOLD Low to Output
High-Z
30
60
160
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V (Note 1)
2.5V ≤ VCC < 4.5V (Note 1)
1.8V ≤ VCC < 2.5V (Note 1)
19
THV
HOLD High to Output
Valid
30
60
160
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
20
TWC
Internal Write Cycle Time
(byte or page)
—
5
ms
(Note 3)
21
—
Endurance
1M
—
E/W (NOTE 2)
Cycles
Note 1: This parameter is periodically sampled and not 100% tested.
2: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site
at www.Microchip.com.
3: TWC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycle
is complete.
TABLE 1-3:
AC TEST CONDITIONS
AC Waveform:
VLO = 0.2V
—
VHI = VCC - 0.2V
(Note 1)
VHI = 4.0V
(Note 2)
CL = 100 pF
—
Timing Measurement Reference Level
Input
0.5 VCC
Output
0.5 VCC
Note 1: For VCC ≤ 4.0V
2: For VCC > 4.0V
DS22123A-page 4
Preliminary
© 2008 Microchip Technology Inc.
25AA02E48
FIGURE 1-1:
HOLD TIMING
CS
17
16
17
16
SCK
18
SO
n+2
SI
n+2
n+1
19
High-Impedance
n
n
5
Don’t Care
n+1
n-1
n
n
n-1
HOLD
FIGURE 1-2:
SERIAL INPUT TIMING
4
CS
2
12
11
7
8
Mode 1,1
3
SCK Mode 0,0
5
SI
6
MSB in
LSB in
High-Impedance
SO
FIGURE 1-3:
SERIAL OUTPUT TIMING
CS
9
3
10
Mode 1,1
SCK
Mode 0,0
13
14
SO
MSB out
SI
© 2008 Microchip Technology Inc.
15
ISB out
Don’t Care
Preliminary
DS22123A-page 5
25AA02E48
2.0
FUNCTIONAL DESCRIPTION
2.1
Principles of Operation
The 25AA02E48 is a 256-byte Serial EEPROM
designed to interface directly with the Serial Peripheral
Interface (SPI) port of many of today’s popular
microcontroller families, including Microchip’s PIC®
microcontrollers. It may also interface with microcontrollers that do not have a built-in SPI port by using
discrete I/O lines programmed properly in software to
match the SPI protocol.
BLOCK DIAGRAM
STATUS
Register
I/O Control
Logic
HV Generator
Memory
Control
Logic
X
EEPROM
Array
Dec
Page Latches
SI
SO
Y Decoder
CS
SCK
Sense Amp.
R/W Control
HOLD
WP
VCC
VSS
Note:
This data sheet documents only the
device’s features and specifications that
are in addition to the features and specifications of the 25AA020A device. For information on the features and specifications
shared by the 25AA02E48 and 25AA020A
devices, see the “25AA020A Data Sheet”
(DS21833).
DS22123A-page 6
Preliminary
© 2008 Microchip Technology Inc.
25AA02E48
3.0
PRE-PROGRAMMED EUI-48™
NODE ADDRESS
The 25AA02E48 is programmed at the factory with a
globally unique, EUI-48™ and EUI-64™ compatible
node address stored in the upper 1/4 of the array and
write-protected through the STATUS register. The
remaining 1,536 bits are available for application use.
The 6-byte EUI-48™ node address value is stored in
array locations 0xFA through 0xFF, as shown in
Figure 3-2. The first 3 bytes are the Organizationally
Unique Identifier (OUI) assigned to Microchip by the
IEEE Registration Authority. The remaining 3 bytes are
the Extension Identifier, and are generated by
Microchip to ensure a globally-unique, 48-bit value.
3.1
FIGURE 3-1:
MEMORY ORGANIZATION
00h
Standard
EEPROM
Write-Protected
EUI-48™ Block
FIGURE 3-2:
EUI-64™ Support
The pre-programmed EUI-48 node address can easily
be encapsulated at the application level to form a globally unique, 64-bit node address for systems utilizing
the EUI-64 standard. This is done by adding 0xFFFE
between the OUI and the Extension Identifier, as
shown below.
C0h
FFh
EUI-48 NODE ADDRESS PHYSICAL MEMORY MAP EXAMPLE
24-bit Organizationally
Unique Identifier
Description
Data
00h
Array
Address
FAh
04h
A3h
24-bit Extension
Identifier
12h
34h
56h
FFh
Corresponding EUI-48™ Node Address: 00-04-A3-12-34-56
Corresponding EUI-64™ Node Address: 00-04-A3-FF-FE-12-34-56
3.2
Factory-Programmed Write
Protection
In order to help guard against accidental corruption of
the EUI-48 node address, the BP1 and BP0 bits of the
STATUS register are programmed at the factory to ‘0’
and ‘1’, respectively, as shown in the following table:
7
X
—
6
X
—
5
X
—
4
X
—
3
BP1
0
2
BP0
1
1
WEL
—
0
WIP
—
This protects the upper 1/4 of the array (0xC0 to 0xFF)
from write operations. This array block can be utilized
for writing by clearing the BP bits with a Write Status
Register (WRSR) instruction. Note that if this is performed, care must be taken to prevent overwriting the
EUI-48 value.
© 2008 Microchip Technology Inc.
Preliminary
DS22123A-page 7
25AA02E48
4.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 4-1.
4.5
TABLE 4-1:
The SCK is used to synchronize the communication
between a master and the 25AA02E48. Instructions,
addresses or data present on the SI pin are latched on
the rising edge of the clock input, while data on the SO
pin is updated after the falling edge of the clock input.
PIN FUNCTION TABLE
Name
SOIC
SOT-23
Function
Chip Select Input
Serial Clock (SCK)
CS
1
5
SO
2
4
Serial Data Output
WP
3
—
Write-Protect Pin
4.6
VSS
4
2
Ground
SI
5
3
Serial Data Input
Serial Clock Input
The HOLD pin is used to suspend transmission to the
25AA02E48 while in the middle of a serial sequence
without having to retransmit the entire sequence again.
It must be held high any time this function is not being
used. Once the device is selected and a serial
sequence is underway, the HOLD pin may be pulled
low to pause further serial communication without
resetting the serial sequence. The HOLD pin must be
brought low while SCK is low, otherwise the HOLD
function will not be invoked until the next SCK high-tolow transition. The 25AA02E48 must remain selected
during this sequence. The SI, SCK and SO pins are in
a high-impedance state during the time the device is
paused and transitions on these pins will be ignored. To
resume serial communication, HOLD must be brought
high while the SCK pin is low, otherwise serial
communication will not resume. Lowering the HOLD
line at any time will tri-state the SO line.
SCK
6
1
HOLD
7
—
Hold Input
VCC
8
6
Supply Voltage
4.1
Chip Select (CS)
A low level on this pin selects the device. A high level
deselects the device and forces it into Standby mode.
However, a programming cycle which is already
initiated or in progress will be completed, regardless of
the CS input signal. If CS is brought high during a
program cycle, the device will go into Standby mode as
soon as the programming cycle is complete. When the
device is deselected, SO goes to the high-impedance
state, allowing multiple parts to share the same SPI
bus. A low-to-high transition on CS after a valid write
sequence initiates an internal write cycle. After powerup, a low level on CS is required prior to any sequence
being initiated.
4.2
Hold (HOLD)
Serial Output (SO)
The SO pin is used to transfer data out of the
25AA02E48. During a read cycle, data is shifted out on
this pin after the falling edge of the serial clock.
4.3
Write-Protect (WP)
The WP pin is a hardware write-protect input pin.
When it is low, all writes to the array or STATUS register are disabled, but any other operations function
normally. When WP is high, all functions, including
nonvolatile writes operate normally. At any time, when
WP is low, the write enable Reset latch will be reset
and programming will be inhibited. However, if a write
cycle is already in progress, WP going low will not
change or disable the write cycle. See Table 2-4 for
the Write-Protect Functionality Matrix.
4.4
Serial Input (SI)
The SI pin is used to transfer data into the device. It
receives instructions, addresses and data. Data is
latched on the rising edge of the serial clock.
DS22123A-page 8
Preliminary
© 2008 Microchip Technology Inc.
25AA02E48
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
Example:
8-Lead SOIC
25A2E48I
SN e3 0827
1L7
XXXXXXXT
XXXXYYWW
NNN
6-Lead SOT-23
Example:
20L7
XXNN
1st Line Marking Code
Part Number
SOT-23
I Temp.
25AA02E48
Note:
Legend: XX...X
T
Y
YY
WW
NNN
e3
Note:
Note:
Note:
20NN
NN = Alphanumeric traceability code
Part number or part number code
Temperature (I, E)
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
For very small packages with no room for the Pb-free JEDEC designator
e3 , the marking will only appear on the outer carton or reel label.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.
*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.
© 2008 Microchip Technology Inc.
Preliminary
DS22123A-page 9
25AA02E48
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DS22123A-page 10
Preliminary
© 2008 Microchip Technology Inc.
25AA02E48
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© 2008 Microchip Technology Inc.
Preliminary
DS22123A-page 11
25AA02E48
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DS22123A-page 12
Preliminary
© 2008 Microchip Technology Inc.
25AA02E48
APPENDIX A:
REVISION HISTORY
Revision A (12/08)
Original release of this document.
© 2008 Microchip Technology Inc.
Preliminary
DS22123A-page 13
25AA02E48
NOTES:
DS22123A-page 14
Preliminary
© 2008 Microchip Technology Inc.
25AA02E48
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© 2008 Microchip Technology Inc.
Preliminary
DS22123A-page 15
25AA02E48
READER RESPONSE
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Questions:
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2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS22123A-page 16
Preliminary
© 2008 Microchip Technology Inc.
25AA02E48
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
X
Device
Tape & Reel
–
X
Temperature
/XX
Package
Examples:
a)
b)
Device:
25AA02E48
2k-Bit, 1.8V, 16 Byte Page, SPI Serial EEPROM
with EUI-48™ Node Identity
Tape & Reel:
Blank
T
=
=
Standard packaging
Tape & Reel
Temperature
Range:
I
=
-40°C to+85°C
Package:
SN
OT
=
=
Plastic SOIC (3.90 mm body), 8-lead
SOT-23, 6-lead (Tape and Reel only)
© 2008 Microchip Technology Inc.
Preliminary
c)
25AA02E48-I/SN = 2k-bit, 16-byte page, 1.8V
Serial EEPROM, Industrial temp., SOIC package
25AA02E48T-I/SN = 2k-bit, 16-byte page, 1.8V
Serial EEPROM, Industrial temp., Tape &
Reel, SOIC package
25AA02E48T-I/OT = 2k-bit, 16-byte page, 1.8V
Serial EEPROM, Industrial temp., Tape & Reel,
SOT-23 package
DS22123A-page 17
25AA02E48
NOTES:
DS22123A-page 18
Preliminary
© 2008 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, rfPIC, SmartShunt and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Linear Active Thermistor, MXDEV, MXLAB,
SEEVAL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM,
PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo,
PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total
Endurance, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2008, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2008 Microchip Technology Inc.
Preliminary
DS22123A-page 19
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
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Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
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Tel: 852-2401-1200
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Tel: 91-80-4182-8400
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Tel: 91-11-4160-8631
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Fax: 886-3-572-6459
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Tel: 86-755-8203-2660
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Tel: 886-7-536-4818
Fax: 886-7-536-4803
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Fax: 66-2-694-1350
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
09/10/07
DS22123A-page 20
Preliminary
© 2008 Microchip Technology Inc.