LTC3550 Dual Input USB/AC Adapter Li-Ion Battery Charger with 600mA Buck Converter U FEATURES DESCRIPTIO ■ The LTC®3550 is a standalone linear charger with a 600mA monolithic synchronous buck converter. It is capable of charging a single-cell Li-Ion battery from both wall adapter and USB inputs. The charger automatically selects the appropriate power source for charging. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Charges Single-Cell Li-Ion Battery from Wall Adapter and USB Inputs Automatic Input Power Detection and Selection Charge Current Programmable Up to 950mA from Wall Adapter Input Adjustable Output, High Efficiency 600mA Synchronous DC/DC Converter No External MOSFET, Sense Resistor or Blocking Diode Needed Thermal Regulation Maximizes Charge Rate Without Risk of Overheating* Preset Charge Voltage with ±0.6% Accuracy Programmable Charge Current Termination 1.5MHz Constant Frequency Operation (Step-Down Converter) 18μA USB Suspend Current in Shutdown “Power Present” Status Output Charge Status Output Automatic Recharge Available in a Thermally Enhanced, Low Profile (0.75mm) 16-Lead (5mm × 3mm) DFN Package U APPLICATIO S ■ Internal thermal feedback regulates the battery charge current to maintain a constant die temperature during high power operation or high ambient temperature conditions. The float voltage is fixed at 4.2V and the charge currents are programmed with external resistors. The LTC3550 terminates the charge cycle when the charge current drops below the programmed termination threshold after the final float voltage is reached. With power applied to both inputs, the LTC3550 can be put into shutdown mode reducing the DCIN supply current to 20μA, the USBIN supply current to 10μA, and the battery drain current to less than 2μA. The DC/DC converter switching frequency is internally set at 1.5MHz, allowing the use of small surface mount inductors and capacitors. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. *Protected by U.S. patents, includng 6522118, 6700364, 6580258, 5481178, 6304066, 6127815, 6498466, 6611131 Cellular Telephones U TYPICAL APPLICATIO 2.2µH SW LTC3550 WALL ADAPTER DCIN 22pF 1µF 2k 1% 1µF COUT 10µF CER VFB 301k RUN USB PORT 301k USBIN VCC IUSB BAT ITERM IDC GND 1.24k 1% 800mA (WALL) 500mA (USB) 4.7µF 2k 1% + 4.2V SINGLE-CELL Li-Ion BATTERY 3550 TA01 VOUT 1.2V 600mA BATTERY CHARGE VOLTAGE (V) CURRENT (mA) Dual Input Battery Charger and DC/DC Converter 1000 800 600 400 200 0 4.2 4.0 3.8 3.6 3.4 DCIN VOLTAGE (V) Complete Charge Cycle (1100mA Battery) 5.0 CONSTANT VOLTAGE USBIN = 5V TA = 25°C RIDC = 1.24k RIUSB = 2k 2.5 0 0 0.5 1.0 2.0 1.5 TIME (HR) 2.5 3.0 3550 TA02 3550fa 1 LTC3550 U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO (Note 1) TOP VIEW DCIN, USBIN .............................................. –0.3V to 10V EN, ⎯C⎯H⎯R⎯G, ⎯P⎯W⎯R, HPWR ............................ –0.3V to 10V BAT, IDC, IUSB, ITERM ................................ –0.3V to 7V VCC ............................................................... –0.3V to 6V RUN, VFB .....................................................–0.3V to VCC SW (DC)........................................–0.3V to (VCC + 0.3V) DCIN Pin Current (Note 2) ..........................................1A USBIN Pin Current (Note 2) .................................700mA BAT Pin Current (Note 2) ............................................1A P-Channel SW Source Current (DC).....................800mA N-Channel SW Source Current (DC) ....................800mA Peak SW Sink and Source Current ...........................1.3A Operating Temperature Range (Note 3) ... –40°C to 85°C Maximum Junction Temperature .......................... 125°C Storage Temperature Range................... –65°C to 125°C USBIN 1 16 DCIN IUSB 2 15 BAT ITERM 3 14 IDC PWR 4 CHRG 5 12 EN 17 13 HPWR VFB 6 11 RUN VCC 7 10 SW GND 8 9 GND DHC PACKAGE 16-LEAD (5mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 40°C (NOTE 4) EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB ORDER PART NUMBER DHC PART MARKING LTC3550EDHC 3550 Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VDCIN = 5V, VUSBIN = 5V, VCC = 3.6V unless otherwise noted. SYMBOL PARAMETER VDCIN Wall Adapter Input Supply Voltage CONDITIONS ● MIN 4.3 TYP MAX 8 UNITS V VUSBIN USB Port Input Supply Voltage ● 4.3 8 V VCC Buck Regulator Input Supply Voltage ● 2.5 5.5 V VEN EN Input Threshold Voltage 0.4 0.7 1.0 REN EN Pull-Down Resistance 1.2 2 5 VRUN RUN Threshold Voltage ● 0.3 1 1.5 V IRUN RUN Leakage Current ● ±0.01 ±1 µA V⎯C⎯H⎯R⎯G ⎯C⎯H⎯R⎯G Output Low Voltage I⎯C⎯H⎯R⎯G = 5mA 0.35 0.6 V V⎯P⎯W⎯R ⎯P⎯W⎯R Output Low Voltage I⎯P⎯W⎯R = 5mA VHPWR HPWR Input Threshold Voltage RHPWR HPWR Pull-Down Resistance VUVDC DCIN Undervoltage Lockout Voltage VUVUSB USBIN Undervoltage Lockout Voltage VASD-DC VASD-USB V MΩ 0.35 0.6 V 0.4 0.7 1 V 1 2 5 MΩ From Low to High Hysteresis 4.0 4.15 200 4.3 V mV From Low to High Hysteresis 3.8 3.95 200 4.1 V mV VDCIN – VBAT Lockout Threshold Voltage VDCIN from Low to High, VBAT = 4.2V VDCIN from High to Low, VBAT = 4.2V 140 20 180 50 220 80 mV mV VUSBIN – VBAT Lockout Threshold Voltage 140 20 180 50 220 80 mV mV ● VUSBIN from Low to High, VBAT = 4.2V VUSBIN from High to Low, VBAT = 4.2V 3550fa 2 LTC3550 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VDCIN = 5V, VUSBIN = 5V, VCC = 3.6V unless otherwise noted. SYMBOL PARAMETER CONDITIONS DCIN Supply Current Charge Mode (Note 5) Standby Mode Shutdown Mode RIDC = 10k Charge Terminated ENABLE = 5V USBIN Supply Current Charge Mode (Note 6) Standby Mode Shutdown Mode Shutdown Mode RIUSB = 10k, VDCIN = 0V Charge Terminated VDCIN = 0V, ENABLE = 0V VDCIN > VUSBIN MIN TYP MAX UNITS ● ● 250 50 20 800 100 40 µA µA µA ● ● 250 50 18 10 800 100 36 20 µA µA µA µA 4.175 4.158 4.2 4.2 4.225 4.242 V V 760 450 93 800 476 100 –3 –1 ±1 840 500 107 –6 –2 ±2 mA mA mA µA µA µA Battery Charger IDCIN IUSBIN VFLOAT Regulated Output (Float) Voltage IBAT BAT Pin Current Constant-Current Mode Constant-Current Mode Constant-Current Mode Standby Mode Shutdown Mode Sleep Mode RIDC = 1.25k RIUSB = 2.1k RIDC = 10k or RIUSB = 10k Charge Terminated Charger Disabled DCIN = 0V, USBIN = 0V IBAT = 1mA IBAT = 1mA, 0°C < TA < 85°C ● ● ● VIDC IDC Pin Regulated Voltage Constant-Current Mode 0.95 1.0 1.05 V VIUSB IUSB Pin Regulated Voltage Constant-Current Mode 0.95 1.0 1.05 V ITERMINATE Charge Current Termination Threshold RITERM = 1k RITERM = 2k RITERM = 10k RITERM = 20k 90 45 8.5 4 100 50 10 5 110 55 11.5 6 mA mA mA mA ITRIKL Trickle Charge Current VBAT < VTRIKL; RIDC = 1.25k VBAT < VTRIKL; RIUSB = 2.1k 60 30 80 47.5 100 65 mA mA VTRIKL Trickle Charge Threshold Voltage VBAT Rising Hysteresis 2.8 2.9 100 3 V mV ● ● ● ● ΔVRECHRG Recharge Battery Threshold Voltage VFLOAT – VRECHRG, 0°C < TA < 85°C 65 100 135 mV tRECHRG Recharge Comparator Filter Time VBAT from High to Low 3 6 9 ms tTERMINATE Termination Comparator Filter Time IBAT Drops Below Termination Threshold 0.8 1.5 2.2 ms tSS Soft-Start Time IBAT = 10% to 90% Full-Scale 175 250 325 µs RON-DC Power FET On-Resistance (Between DCIN and BAT) 400 mΩ RON-USB Power FET On-Resistance (Between USBIN and BAT) 550 mΩ TLIM Junction Temperature in ConstantTemperature Mode 105 °C Switching Regulator VFB Regulated Feedback Voltage ΔVFB Reference Voltage Line Regulation IPK Peak Inductor Current VLOADREG Output Voltage Load Regulation TA = 25°C 0°C ≤ TA ≤ 85°C –40°C ≤ TA ≤ 85°C ● 0.5880 0.5865 0.5850 ● VCC = 3V, VFB = 0.5V 0.75 0.6 0.6 0.6 0.6120 0.6135 0.6150 V V V 0.04 0.4 %/V 1 1.25 A 0.5 % 3550fa 3 LTC3550 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VDCIN = 5V, VUSBIN = 5V, VCC = 3.6V unless otherwise noted. SYMBOL PARAMETER CONDITIONS IS VCC Supply Current Active Mode Sleep Mode Shutdown (Note 7) VFB = 0.5V, ILOAD = 0A VFB = 0.62V, ILOAD = 0A VRUN = 0V, VCC = 5.5V fOSC Oscillator Frequency VFB = 0.6V VFB = 0V RPFET RDS(ON) of P-Channel FET 0.4 Ω RNFET RDS(ON) of N-Channel FET 0.35 Ω ILSW SW Leakage Current 0.01 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Guaranteed by long term current density limitations. Note 3: The LTC3550E is guaranteed to meet the performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 4: Failure to solder the exposed backside of the package to the PC board will result in a thermal resistance much higher than 40°C/W. See Thermal Considerations. MIN 1.2 TYP MAX UNITS 300 20 0.1 400 35 1 µA µA µA 1.5 210 1.8 MHz kHz ±1 µA Note 5: Supply Current includes IDC and ITERM pin current (approximately 100μA each) but does not include any current delivered to the battery through the BAT pin (approximately 100mA). Note 6: Supply Current includes IUSB and ITERM pin current (approximately 100μA each) but does not include any current delivered to the battery through the BAT pin (approximately 100mA). Note 7: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. 3550fa 4 LTC3550 U W TYPICAL PERFOR A CE CHARACTERISTICS Regulated Charger Output (Float) Voltage vs Charge Current 1.008 4.215 1.006 4.22 4.210 1.004 4.20 4.205 1.002 4.18 VIDC (V) 4.24 4.16 4.200 0.998 4.14 4.190 0.996 4.12 4.185 0.994 RIDC = 1.25k 4.180 –50 100 200 300 400 500 600 700 800 CHARGE CURRENT (mA) 0 0 25 50 TEMPERATURE (°C) –25 75 1.006 0.206 1.004 0.204 1.002 0.202 VIUSB (V) VUSBIN = 4.3V 0.994 0.194 0 25 50 TEMPERATURE (°C) 75 100 VUSBIN = 8V VUSBIN = 4.3V 400 200 0 –25 0 50 25 TEMPERATURE (°C) 75 100 0 0.6 0.8 VIDC (V) 700 25 600 IPWR (mA) 1.2 1.0 3550 G05 ⎯C⎯H⎯R⎯G Pin I-V Curve VDCIN = VUSBIN = 5V 300 0.4 35 30 RIUSB = 1.25k 400 0.2 3550 G43 VUSBIN = 5V RIUSB = 2k RIDC = 10k 100 ⎯P⎯W⎯R Pin I-V Curve 500 RIDC = 2k 500 300 35 800 RIDC = 1.25k 600 3550 G04 900 VDCIN = 5V 700 0.192 –50 Charge Current vs IUSB Pin Voltage 100 800 0.198 0.196 –25 900 HPWR = 0V 0.200 0.996 0.992 –50 75 0 25 50 TEMPERATURE (°C) Charge Current vs IDC Pin Voltage VDCIN = VUSBIN = 5V TA = –40°C 30 TA = 25°C 25 TA = 90°C 20 ICHRG (mA) VIUSB (V) 0.208 VUSBIN = 8V –25 3550 G03 IUSB Pin Voltage vs Temperature (Constant-Current Mode) HPWR = 5V 0.998 0.992 –50 IBAT (mA) IUSB Pin Voltage vs Temperature (Constant-Current Mode) 1.000 VDCIN = 4.3V 3550 G02 3550 G01 1.008 100 VDCIN = 8V 1.000 4.195 RIDC = RIUSB = 2k 4.10 IBAT (mA) IDC Pin Voltage vs Temperature (Constant-Current Mode) VDCIN = VUSBIN = 5V VDCIN = VUSBIN = 5V VFLOAT (V) VFLOAT (V) Regulated Charger Output (Float) Voltage vs Temperature 4.220 4.26 TA = 25°C, unless otherwise noted. 15 TA = – 40°C TA = 25°C TA = 90°C 20 15 10 10 5 5 200 RIUSB = 10k 100 0 0 0 0 0.2 0.4 0.6 0.8 VIUSB (V) 1.0 1.2 3550 G06 0 1 2 4 3 VPWR (V) 5 6 7 3550 G07 0 1 2 4 3 VCHRG (V) 5 6 7 3550 G08 3550fa 5 LTC3550 U W TYPICAL PERFOR A CE CHARACTERISTICS Charge Current vs Ambient Temperature TA = 25°C, unless otherwise noted. Charge Current vs DCIN Voltage 1000 900 ONSET OF THERMAL REGULATION Charge Current vs Battery Voltage 1000 ONSET OF THERMAL REGULATION 800 800 800 RIDC = 1.25k RIDC = RIUSB = 2k 400 IBAT (mA) IBAT (mA) IBAT (mA) 700 600 600 600 400 500 200 VDCIN = VUSBIN = 5V VBAT = 4V θJA = 40°C/W 0 –50 –25 400 50 25 75 0 TEMPERATURE (°C) 100 300 4.0 4.5 125 200 RIDC = 1.25k VBAT = 4V θJA = 40°C/W 7.0 5.5 6.0 6.5 VDCIN (V) 5.0 7.5 0 8.0 2.4 2.7 3.0 3.3 3.6 VBAT (V) 3.9 4.2 3550 G11 3550 G10 DCIN Power FET On-Resistance vs Temperature 550 VDCIN = VUSBIN = 5V θJA = 40°C/W RIDC = 1.25k 3550 G12 USBIN Power FET On-Resistance vs Temperature 800 VBAT = 4V IBAT = 200mA 750 4.5 EN Pin Threshold Voltage (On-to-Off) vs Temperature 900 VBAT = 4V IBAT = 200mA VDCIN = VUSBIN = 5V 850 500 400 350 650 800 VEN (mV) RDS(ON) (mΩ) RDS(ON) (mΩ) 700 450 600 550 500 750 700 450 650 300 400 250 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 350 –50 –25 125 50 25 75 0 TEMPERATURE (°C) 100 3550 G13 45 45 40 15 10 HPWR Pin Threshold Voltage (Rising) vs Temperature 900 VDCIN = VUSBIN = 5V VUSBIN = 8V 30 800 VHPWR (mV) VDCIN = 5V 25 20 VUSBIN = 5V 15 VDCIN = 4.3V 10 750 700 VUSBIN = 4.3V 650 5 0 –50 100 35 VDCIN = 8V IUSBIN (µA) IDCIN (µA) 20 75 850 30 25 50 25 0 TEMPERATURE (°C) 3550 G15 USBIN Shutdown Current vs Temperature 50 35 –25 3550 G14 DCIN Shutdown Current vs Temperature 40 600 –50 125 ENABLE = 5V –25 50 25 0 TEMPERATURE (°C) 75 100 3550 G16 5 0 –50 ENABLE = 0V –25 50 25 0 TEMPERATURE (°C) 75 100 3550 G17 600 –50 –25 50 25 0 TEMPERATURE (°C) 75 100 3550 G44 3550fa 6 LTC3550 U W TYPICAL PERFOR A CE CHARACTERISTICS HPWR Pin Pull-Down Resistance vs Temperature TA = 25°C, unless otherwise noted. Undervoltage Lockout Threshold vs Temperature EN Pin Pull-Down Resistance vs Temperature 2.8 2.8 2.6 2.6 4.25 4.20 DCIN UVLO 2.4 2.4 2.2 2.0 4.10 VUV (V) REN (MΩ) RHPWR (MΩ) 4.15 2.2 4.05 4.00 2.0 USBIN UVLO 3.95 1.8 1.8 1.6 –50 50 25 0 TEMPERATURE (°C) –25 1.6 –50 100 75 3.90 50 25 0 TEMPERATURE (°C) –25 75 3550 G45 5 4.14 4 4.12 3 IBAT (µA) VRECHRG (V) 4.16 VDCIN = VUSBIN = 8V 1 4.06 0 –25 75 0 25 50 TEMPERATURE (°C) ENABLE 5V/DIV 0 25 50 TEMPERATURE (°C) –25 VDCIN = 5V RIDC = 1.25k 100 IOUT = 10mA Buck Regulator Efficiency vs Output Current 95 VOUT = 1.8V 90 VCC = 2.7V VOUT = 1.5V 90 75 70 IOUT = 0.1mA 65 80 EFFICIENCY (%) IOUT = 600mA 80 VCC = 2.7V 85 85 EFFICIENCY (%) EFFICIENCY (%) 90 85 IOUT = 1mA 100µs/DIV 3550 G22 Buck Regulator Efficiency vs Output Current 95 95 75 3550 G21 Buck Regulator Efficiency vs VCC IOUT = 100mA Charge Current During Turn-On and Turn-Off IBAT 500mA/DIV 3550 G20 100 100 VBAT = 4.2V VDCIN, VUSBIN (NOT CONNECTED) –1 –50 100 75 2 4.08 4.04 –50 0 25 50 TEMPERATURE (°C) 3550 G19 Battery Drain Current vs Temperature VDCIN = VUSBIN = 4.3V –25 3550 G18 Recharge Threshold Voltage vs Temperature 4.10 3.85 –50 100 VCC = 4.2V VCC = 3.6V 75 VCC = 4.2V 80 VCC = 3.6V 75 70 70 65 65 60 55 50 VOUT = 1.8V 2 3 4 VCC (V) 5 6 3550 G23 60 0.1 1 10 100 OUTPUT CURRENT (mA) 1000 3550 G24 60 0.1 1 10 100 OUTPUT CURRENT (mA) 1000 3550 G25 3550fa 7 LTC3550 U W TYPICAL PERFOR A CE CHARACTERISTICS 1.65 0.609 85 VCC = 4.2V 75 70 1.60 FREQUENCY (MHz) VCC = 2.7V VCC = 3.6V EFFICIENCY (%) VCC = 3.6V VCC = 3.6V 90 80 1.70 0.614 VOUT = 2.5V REFERENCE VOLTAGE (V) 95 0.604 0.599 0.594 60 0.1 10 100 1 OUTPUT CURRENT (mA) 50 25 75 0 TEMPERATURE (°C) 100 3550 G26 1.844 1.6 1.5 1.4 1.3 5 100 RDS(ON) vs VCC VCC = 3.6V 1.834 0.6 1.824 0.5 1.814 1.804 0.3 0.2 1.784 0.1 0 VCC (V) MAIN SWITCH 0.4 1.794 6 125 0.7 1.774 4 50 25 75 0 TEMPERATURE (°C) 3550 G28 RDS(ON) (Ω) OUTPUT VOLTAGE (V) 1.7 FREQUENCY (MHz) 1.30 –50 –25 125 3550 G27 Oscillator Frequency vs VCC 3 1.45 Buck Regulator Output Voltage vs Load Current 1.8 2 1.50 1.35 0.584 –50 –25 1000 1.55 1.40 0.589 65 1.2 Oscillator Frequency vs Temperature Buck Regulator Reference Voltage vs Temperature Buck Regulator Efficiency vs Output Current 100 TA = 25°C, unless otherwise noted. SYNCHRONOUS SWITCH 0 100 200 300 400 500 600 700 800 900 LOAD CURRENT (mA) 0 1 2 4 3 VCC (V) 5 7 6 3550 G29 3550 G30 Buck Regulator Switches RDS(0N) vs Temperature Buck Regulator Supply Current vs VCC VCC = 2.7V VCC = 3.6V 45 40 0.4 0.3 0.2 SUPPLY CURRENT (µA) 40 0.5 RDS(ON) (Ω) VOUT = 1.875V ILOAD = 0A 45 SUPPLY CURRENT (µA) VCC = 4.2V Buck Regulator Supply Current vs Temperature 50 50 0.7 0.6 35 30 25 20 15 100 125 3550 G32 VCC = 3.6V VOUT = 1.875V ILOAD = 0A 35 30 25 20 15 10 10 0.1 MAIN SWITCH SYNCHRONOUS SWITCH 0 50 –50 –25 25 75 0 TEMPERATURE (°C) 3550 G31 5 5 0 0 –50 –25 2 3 4 VCC (V) 5 6 3550 G33 50 25 0 75 TEMPERATURE (°C) 100 125 3550 G34 3550fa 8 LTC3550 U W TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C, unless otherwise noted. Switch Leakage Current vs Temperature Switch Leakage Current vs VCC 300 120 VCC = 5.5V RUN = 0V 100 SWITCH LEAKAGE (pA) 250 SWITCH LEAKAGE (nA) RUN = 0V 200 150 100 SYNCHRONOUS SWITCH 80 60 MAIN SWITCH 40 MAIN SWITCH 50 20 SYNCHRONOUS SWITCH 0 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 0 125 0 1 2 3 VCC (V) 4 3550 G35 Burst Mode Operation Load Step RUN 2V/DIV VOUT 1V/DIV VOUT 100mV/DIV AC COUPLED VOUT 100mV/DIV AC COUPLED IL 500mA/DIV ILOAD 500mA/DIV IL 200mA/DIV VCC = 3.6V VOUT = 1.8V ILOAD = 50mA 4µs/DIV ILOAD 500mA/DIV VCC = 3.6V VOUT = 1.8V ILOAD = 600mA 3550 G37 Load Step 40µs/DIV VCC = 3.6V 20µs/DIV VOUT = 1.8V ILOAD = 0mA TO 600mA 3550 G38 Load Step VOUT 100mV/DIV AC COUPLED VOUT 100mV/DIV AC COUPLED IL 500mA/DIV IL 500mA/DIV IL 500mA/DIV ILOAD 500mA/DIV ILOAD 500mA/DIV ILOAD 500mA/DIV 3550 G40 VCC = 3.6V 20µs/DIV VOUT = 1.8V ILOAD = 100mA TO 600mA 3550 G39 Load Step VOUT 100mV/DIV AC COUPLED VCC = 3.6V 20µs/DIV VOUT = 1.8V ILOAD = 50mA TO 600mA 6 3550 G36 Start-Up from Shutdown SW 5V/DIV 5 3550 G41 VCC = 3.6V 20µs/DIV VOUT = 1.8V ILOAD = 200mA TO 600mA 3550 G42 3550fa 9 LTC3550 U U U PI FU CTIO S USBIN (Pin 1): USB Input Supply Pin. Provides power to the battery charger. The maximum supply current is 650mA. This should be bypassed with a 1µF capacitor. VFB (Pin 6): Voltage Feedback Pin. Receives the feedback voltage from an external resistor divider across the buck regulator output. IUSB (Pin 2): USB Charge Current Program and Monitor Pin. The charge current can be set by connecting a resistor, RIUSB, to ground. When charging in constant-current mode, this pin servos to 1V. The voltage on this pin can be used to measure the charge current delivered from the USB input using the following formula: VCC (Pin 7): Buck Regulator Input Supply Pin. Must be closely decoupled to GND (Pins 8, 9) with a 2.2µF or greater ceramic capacitor. IBAT = VIUSB • 1000 RIUSB ITERM (Pin 3): Termination Current Threshold Program Pin. The current termination threshold, ITERMINATE, can be set by connecting a resistor, RITERM, to ground. ITERMINATE is set by the following formula: ITERMINATE = 100 V RITERM When the charge current, IBAT, falls below the termination threshold, charging stops and the ⎯C⎯H⎯R⎯G output becomes high impedance. This pin is internally clamped to approximately 1.5V. Driving this pin to voltages beyond the clamp voltage should be avoided. ⎯P⎯W⎯R (Pin 4): Open-Drain Power Supply Status Output. When the DCIN or USBIN pin voltage is sufficient to begin charging (i.e., when the supply is greater than the undervoltage lockout threshold and at least 180mV above the battery terminal), the ⎯P⎯W⎯R pin is pulled low by an internal N-channel MOSFET. Otherwise, ⎯P⎯W⎯R is high impedance. The output is capable of sinking up to 10mA, making it suitable for driving an LED. ⎯C⎯H⎯R⎯G (Pin 5): Open-Drain Charge Status Output. When the LTC3550 is charging, the ⎯C⎯H⎯R⎯G pin is pulled low by an internal N-channel MOSFET. When the charge cycle is completed, ⎯C⎯H⎯R⎯G becomes high impedance. This output is capable of sinking up to 10mA, making it suitable for driving an LED. GND (Pins 8, 9): Ground. SW (Pin 10): Buck Regulator Switch Node Connection to Inductor. This pin connects to the drains of the internal main (top) and synchronous (bottom) power MOSFET switches. RUN (Pin 11): Buck Regulator Run Control Input. Forcing this pin above 1.5V enables the regulator. Forcing this pin below 0.3V shuts it down. In shutdown, all buck regulator functions are disabled drawing <1µA supply current from VCC. Do not leave RUN floating. EN (Pin 12): Charger Enable Input. A logic low on this pin enables the charger. If this input is left floating, an internal 2MΩ pull-down resistor defaults the LTC3550 to charge mode. Pull this pin high to disable the charger. HPWR (Pin 13): USB High/Low Power Mode Select Input. Used to control the amount of current drawn from the USB port. A logic high on the HPWR pin sets the charge current to 100% of the current programmed by the IUSB pin. A logic low on the HPWR pin sets the charge current to 20% of the current programmed by the IUSB pin. An internal 2MΩ pull-down resistor defaults the charger to its low current state. IDC (Pin 14): Wall Adapter Charge Current Program and Monitor Pin. The charge current is set by connecting a resistor, RIDC, to ground. When charging in constantcurrent mode, this pin servos to 1V. The voltage on this pin can be used to measure the charge current using the following formula: IBAT = VIDC • 1000 RIDC BAT (Pin 15): Charger Output. This pin provides charge current to the battery and regulates the final float voltage to 4.2V. 3550fa 10 LTC3550 U U U PI FU CTIO S DCIN (Pin 16): Wall Adapter Input Supply Pin. Provides power to the battery charger. The maximum supply current is 950mA. This should be bypassed with a 1µF capacitor. Exposed Pad (Pin 17): GND. The exposed backside of the package is ground and must be soldered to the PCB ground for electrical connection and maximum heat transfer. W BLOCK DIAGRA DCIN BAT USBIN 16 15 1 CC/CV REGULATOR CC/CV REGULATOR FREQ SHIFT OSC + 4.15V PWR 4 DC SOFTSTART – USB SOFTSTART – DCIN UVLO 10mA MAX ITH 3.95V 6 VFB 0.6V EA – RHPWR + + HPWR 13 SLOPE COMP BURST CLAMP USBIN UVLO + + – – 7 VCC BAT CHRG 5 10mA MAX BAT – 5Ω + ICOMP RECHRG 4.1V RECHARGE S Q – R Q RS LATCH BAT TRICKLE CHARGE USB_ENABLE + 2.9V + 100mV TDIE THERMAL REGULATION CHARGER CONTROL + TERM DC_ENABLE – TRICKLE – 105°C SWITCHING LOGIC AND BLANKING CIRCUIT ANTISHOOTTHRU 10 SW + + LOGIC IRCMP – EN 12 REN IBAT /1000 TERMINATION IBAT /1000 IBAT /1000 – 3 ITERM RITERM 14 IDC RIDC 2 IUSB RIUSB 11 RUN 8, 9, 17 GND 3550 BD 3550fa 11 LTC3550 U OPERATIO The LTC3550 consists of two main blocks: a lithium-ion battery charger and a high-efficiency buck converter that can be powered from the battery. The charger is designed to efficiently manage charging of a single-cell lithium-ion battery from two separate power sources: a wall adapter and USB power bus. The internal P-channel MOSFETs can supply up to 950mA from the wall adapter source and 500mA from the USB power source. The final float voltage accuracy is ±0.6%. The buck converter uses a constant frequency, current mode step-down architecture. Both the main (P-channel MOSFET) and synchronous (N-channel MOSFET) switches for the buck converter are internal. The LTC3550 requires no external diodes or sense resistors. Lithium-Ion Battery Charger A charge cycle begins when the voltage at either the DCIN pin or USBIN pin rises above the UVLO threshold level and the charger is enabled through the EN pin. When either input is supplying power, logic low enables the charger and logic high disables it (a 2MΩ pull-down defaults the charger to the charging state). The DCIN input draws 20µA when the charger is in shutdown. The USBIN input draws 18µA during shutdown if no power is applied to DCIN, but draws only 10µA when VDCIN > VUSBIN. Once the charger is enabled, it enters constant-current mode, where the programmed charge current is supplied to the battery. When the BAT pin approaches the final float voltage (4.2V), the charger enters constant-voltage STARTUP DCIN POWER APPLIED ONLY USB POWER APPLIED POWER SELECTION DCIN POWER REMOVED BAT < 2.9V TRICKLE CHARGE MODE USBIN POWER REMOVED OR DCIN POWER APPLIED TRICKLE CHARGE MODE 1/10th FULL CURRENT CHRG STATE: PULLDOWN CHRG STATE: PULLDOWN BAT > 2.9V 2.9V < BAT BAT > 2.9V CHARGE MODE CHARGE MODE FULL CURRENT FULL CURRENTÞHPWR = HIGH 1/5 FULL CURRENTÞHPWR = LOW CHRG STATE: PULLDOWN CHRG STATE: PULLDOWN EN DRIVEN LOW 2.9V < BAT IBAT < ITERMINATE IN VOLTAGE MODE IBAT < ITERMINATE IN VOLTAGE MODE BAT < 4.1V BAT < 2.9V 1/10th FULL CURRENT STANDBY MODE STANDBY MODE NO CHARGE CURRENT NO CHARGE CURRENT CHRG STATE: Hi-Z CHRG STATE: Hi-Z EN DRIVEN HIGH SHUTDOWN MODE EN DRIVEN HIGH IDCIN DROPS TO 20mA CHRG STATE: Hi-Z SHUTDOWN MODE BAT < 4.1V EN DRIVEN LOW IUSBIN DROPS TO 18mA DCIN POWER REMOVED USBIN POWER REMOVED OR DCIN POWER APPLIED CHRG STATE: Hi-Z 3550 F01 Figure 1. LTC3550 State Diagram of a Charge Cycle 3550fa 12 LTC3550 U OPERATIO mode and the charge current begins to decrease. Once the charge current drops below the programmed termination threshold (set by the external resistor RITERM), the internal P-channel MOSFET is shut off and the charger enters standby mode. In standby mode, the charger sits idle and monitors the battery voltage using a comparator with a 6ms filter time (tRECHRG). A charge cycle automatically restarts when the battery voltage falls below 4.1V (which corresponds to approximately 80% to 90% battery capacity). This ensures that the battery is kept near a fully charged condition and eliminates the need for periodic charge cycle initiations. Figure 1 uses a state diagram to describe the behavior of the LTC3550 battery charger. 600mA Step-Down Regulator The LTC3550 regulator uses a constant frequency, current mode step-down architecture. Both the top (P-channel MOSFET) and bottom (N-channel MOSFET) switches are internal. During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch, and is turned off when the current comparator, ICOMP, resets the RS latch. The peak inductor current at which ICOMP resets the RS latch, is controlled by the output of error amplifier EA. When the load current increases, it causes a slight decrease in the output voltage (VOUT), relative to the internal reference, which in turn causes the EA amplifier’s output voltage to increase until the average inductor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse, as indicated by the current reversal comparator IRCMP, or the beginning of the next clock cycle. Burst Mode® Operation The LTC3550 buck regulator is capable of Burst Mode operation in which the internal power MOSFETs operate intermittently based on load current demand. In Burst Mode operation, the peak current of the inductor is set to approximately 200mA regardless of the output load. Each burst event can last from a few cycles at light loads to almost continuously cycling with short sleep intervals at moderate loads. In between these burst events, the power MOSFETs and any unneeded circuitry are turned off, reducing the quiescent current to 20µA. In this sleep state, the load current is being supplied solely from the output capacitor. As the output voltage droops, the EA amplifier’s output rises above the sleep threshold signaling the BURST comparator to trip and turn the top MOSFET on. This process repeats at a rate that is dependent on the load demand. Dropout Operation As the input supply voltage decreases to a value approaching the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. The output voltage will then be determined by the input voltage minus the voltage drop across the P-channel MOSFET and the inductor. An important detail to remember is that at low input supply voltages, the RDS(ON) of the P-channel switch increases (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the LTC3550 is used at 100% duty cycle with low input voltage (See Thermal Considerations in the Applications Information section). Short-Circuit Protection When the regulator output is shorted to ground, the frequency of the oscillator is reduced to about 210kHz, one seventh the nominal frequency. This frequency foldback ensures that the inductor current has more time to decay, thereby preventing runaway. The oscillator’s frequency will progressively increase to 1.5MHz when VFB rises above 0V. Burst Mode is a registered trademark of Linear Technology Corporation. 3550fa 13 LTC3550 U OPERATIO Battery Charger Power Source Selection Low-Battery Charge Conditioning (Trickle Charge) The LTC3550 can charge a battery from either the wall adapter input or the USB port input. The charger automatically senses the presence of voltage at each input. If both power sources are present, the charger defaults to the wall adapter source provided sufficient power is present at the DCIN input. “Sufficient power” is defined as: This feature ensures that deeply discharged batteries are gradually charged before applying full charge current . If the BAT pin voltage is below 2.9V, the LTC3550 supplies 1/10th of the full charge current to the battery until the BAT pin rises above 2.9V. For example, if the charger is programmed to charge at 800mA from the wall adapter input and 500mA from the USB input, the charge current during trickle charge mode would be 80mA and 50mA, respectively. • Supply voltage is greater than the UVLO threshold. • Supply voltage is greater than the battery voltage by 50mV (180mV rising, 50mV falling). Table 1 describes the behavior of the PWR status output. Table 1. Power Source Selection VUSBIN > 3.95V and VUSBIN > BAT + 50mV VUSBIN < 3.95V or VUSBIN < BAT + 50mV VDCIN > 4.15V and VDCIN > BAT + 50mV Charger Powered from Wall Adapter Source; USBIN Current < 25µA ⎯P⎯W⎯R: LOW Charger Powered from Wall Adapter Source ⎯P⎯W⎯R: LOW VDCIN < 4.15V or VDCIN < BAT + 50mV Charger Powered from USB Source; ⎯P⎯W⎯R: LOW No Charging ⎯P⎯W⎯R: Hi-Z Status Indicators The charge status output (⎯C⎯H⎯R⎯G) has two states: pulldown and high impedance. The pull-down state indicates that the LTC3550 is in a charge cycle. Once the charge cycle has terminated or the LTC3550 is disabled, the pin state becomes high impedance. The pull-down state is strong enough to drive an LED and is capable of sinking up to 10mA. ⎯ W ⎯ R ⎯ ) has two states: pullThe power supply status output (P down and high impedance. The pull-down state indicates that power is present at either DCIN or USBIN. If no power is applied at either pin, the ⎯P⎯W⎯R pin is high impedance, indicating that the LTC3550 lacks sufficient power to charge the battery. The pull-down state is strong enough to drive an LED and is capable of sinking up to 10mA. Thermal Limiting An internal thermal feedback loop reduces the programmed charge current if the die temperature attempts to rise above a preset value of approximately 105°C. This feature protects the LTC3550 from excessive temperature and allows the user to push the limits of the power handling capability of a given circuit board without risk of damaging the device. The charge current can be set according to typical (not worst-case) ambient temperature with the assurance that the charger will automatically reduce the current in worst case conditions. DFN package power considerations are discussed further in the Applications Information section. Charge Current Soft-Start and Soft-Stop The battery charger includes a soft-start circuit to minimize the inrush current at the start of a charge cycle. When a charge cycle is initiated, the charge current ramps from zero to full-scale current over a period of 250µs. Likewise, internal circuitry ramps the charge current from full-scale to zero in approximately 30µs when the charger shuts down or self terminates. This minimizes the transient current load on the power supply during start-up and shutdown. 3550fa 14 LTC3550 U U W U APPLICATIO S I FOR ATIO Figure 2 shows the basic LTC3550 application circuit. External component selection is driven by the charging requirements and the buck regulator load requirements. VOUT 1.2V 600mA L1 SW LTC3550 WALL ADAPTER DCIN CF R2 R1 RUN USB PORT C2 RIUSB C1 RIDC USBIN VCC IUSB BAT IDC COUT VFB ITERM GND CIN RITERM + 4.2V SINGLE CELL Li-Ion BATTERY 3550 F02 Figure 2. LTC3550 Basic Circuit Programming and Monitoring Charge Current The charge current delivered to the battery from the wall adapter supply is programmed using a single resistor from the IDC pin to ground. RIDC 1000 V 1000 V = , ICHRG(DC) = ICHRG(DC) RIDC Similarly, the charge current from the USB supply is programmed using a single resistor from the IUSB pin to ground. Setting HPWR pin to its high state will select 100% of the programmed charge current, while setting HPWR to its low state will select 20% of the programmed charge current. RIUSB = 1000 V ICHRG(USB) (HPWR = HIGH) ICHRG(USB) = 1000 V (HPWR = HIGH) RIUSB ICHRG(USB) = 200 V (HPWR = LOW) RIUSB Charge current out of the BAT pin can be determined at any time by monitoring the IDC or IUSB pin voltage and using the following equations: IBAT = VIDC • 1000, (ch arg ing from wall adapter ) RIDC IBAT = VIUSB • 1000, (ch arg ing from USB sup ply, RIUSB HPWR = HIGH) IBAT = VIUSB • 200, (ch arg ing from USB sup ply, RIUSB HPWR = LOW) Programming Charge Termination The charge cycle terminates when the charge current falls below the programmed termination threshold during constant-voltage mode. This threshold is set by connecting an external resistor, RITERM, from the ITERM pin to ground. The charge termination current threshold (ITERMINATE) is set by the following equation: RITERM = 100 V ITERMINATE , ITERMINATE = 100 V RITERM The termination condition is detected by using an internal filtered comparator to monitor the ITERM pin. When the ITERM pin voltage drops below 100mV* for longer than tTERMINATE (typically 1.5ms), charging is terminated. The charge current is latched off and the LTC3550 enters standby mode. When charging, transient loads on the BAT pin can cause the ITERM pin to fall below 100mV for short periods of time before the DC charge current has dropped below the programmed termination current. The 1.5ms filter time (tTERMINATE) on the termination comparator ensures that transient loads of this nature do not result in premature charge cycle termination. Once the average charge current drops below the programmed termination threshold, the LTC3550 terminates the charge cycle and stops providing any current out of the BAT pin. In this state, any load on the BAT pin must be supplied by the battery. *Any external sources that hold the ITERM pin above 100mV will prevent the LTC3550 from terminating a charged cycle. 3550fa 15 LTC3550 U W U U APPLICATIO S I FOR ATIO Buck Regulator Inductor Selection Table 2. Representative Surface Mount Inductors For most applications, the value of the inductor will fall in the range of 1µH to 4.7µH. Its value is chosen based on the desired inductor ripple current. Large value inductors lower ripple current and small value inductors result in higher ripple currents. Higher VCC or VOUT also increases the ripple current as shown in Equation 1. A reasonable starting point for setting ripple current is ΔIL = 240mA (40% of 600mA). ∆IL = VOUT fO • L ⎞ ⎛ V • ⎜ 1− OUT ⎟ VCC ⎠ ⎝ (1) The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. Thus, a 720mA rated inductor should be enough for most applications (600mA + 120mA). For best efficiency, choose a low DC-resistance inductor. The inductor value also has an effect on Burst Mode operation. The transition to low current operation begins when the inductor current peaks fall to approximately 200mA. Lower inductor values (higher ΔIL) will cause this to occur at lower load currents, which can cause a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to increase. Inductor Core Selection Different core materials and shapes will change the size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don’t radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on what the LTC3550 requires to operate. Table 2 shows some typical surface mount inductors that work well in LTC3550 applications. PART NUMBER VALUE (µH) DCR (Ω MAX) MAX DC CURRENT (A) SIZE W × L × H (mm) Sumida CDRH3D16 1.5 2.2 3.3 4.7 0.043 0.075 0.110 0.162 1.55 1.20 1.10 0.90 3.8 × 3.8 × 1.8 Sumida CMD4D06 2.2 3.3 4.7 0.116 0.174 0.216 0.950 0.770 0.750 3.5 × 4.3 × 0.8 Panasonic ELT5KT 3.3 4.7 0.17 0.20 1.00 0.95 4.5 × 5.4 × 1.2 Murata LQH32CN 1.0 2.2 4.7 0.060 0.097 0.150 1.00 0.79 0.65 2.5 × 3.2 × 2.0 CIN and COUT Selection In continuous mode, the source current of the top MOSFET is a square wave of duty cycle VOUT/VCC. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: CIN required IRMS ≅ IOMAX VOUT ( VCC − VOUT ) VCC (2) This formula has a maximum at VCC = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that the capacitor manufacturer’s ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. The output ripple ΔVOUT is determined by: ⎛ 1 ⎞ ∆ VOUT ≅ ∆ IL ⎜ ESR + 8 fCOUT ⎟⎠ ⎝ (3) 3550fa 16 LTC3550 U W U U APPLICATIO S I FOR ATIO where f = operating frequency, COUT = output capacitance and ΔIL = ripple current in the inductor. For a fixed output voltage, the output ripple voltage is highest at maximum input voltage since ΔIL increases with input voltage. Aluminum electrolytic and solid tantalum capacitors are both available in surface mount configurations. In the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalum. These are specially constructed and tested for low ESR so they give the lowest ESR for a given volume. Other capacitor types include Sanyo POSCAP, Kemet T510 and T495 series, and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Using Ceramic Input and Output Capacitors Higher capacitance values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. Because the LTC3550’s control loop does not depend on the output capacitor’s ESR for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. 0.6V ≤ VOUT ≤ 5.5V R2 VFB LTC3550 3550 F03 Figure 3. Setting the LTC3550 Output Voltage limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC3550 circuits: VCC quiescent current and I2R losses. The VCC quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence as illustrated in Figure 4. 1. The VCC quiescent current is due to two components: the DC bias current as given in the Electrical Characteristics and the internal main switch and synchronous Output Voltage Programming 1 The output voltage is set by a resistive divider according to the following formula: (4) The external resistive divider is connected to the output, allowing remote voltage sensing as shown in Figure 3. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is 0.1 POWER LOSS (W) ⎛ R2 ⎞ VOUT = 0.6 V ⎜ 1+ ⎟ ⎝ R1⎠ R1 GND 0.01 0.001 0.0001 0.00001 0.1 1 10 100 LOAD CURRENT (mA) 1000 3550 F04 Figure 4. Power Lost vs Load Current 3550fa 17 LTC3550 U W U U APPLICATIO S I FOR ATIO switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge, dQ, moves from VCC to ground. The resulting dQ/dt is the current out of VCC that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT + QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VCC and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches, RSW, and external inductor RL. In continuous mode, the average output current flowing through inductor L is “chopped” between the main switch and the synchronous switch. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% total additional loss. Thermal Considerations The battery charger’s thermal regulation feature and the buck regulator’s high efficiency make it unlikely that enough power will be dissipated to exceed the LTC3550 maximum junction temperature. Nevertheless, it is a good idea to do some thermal analysis for worst-case conditions. The junction temperature, TJ, is given by: TJ = TA + TRISE where TA is the ambient temperature. The temperature rise is given by: TRISE = PD • θJA where PD is the power dissipated and θJA is the thermal resistance from the junction of the die to the ambient temperature. In most applications the buck regulator does not dissipate much heat due to its high efficiency. The majority of the LTC3550 power dissipation occurs when charging a battery. Fortunately, the LTC3550 automatically reduces the charge current during high power conditions using a patented thermal regulation circuit. Thus, there is no need to design for worst-case power dissipation scenarios because the LTC3550 ensures that the battery charger power dissipation never raises the junction temperature above a preset value of 105°C. In the unlikely case that the junction temperature is forced above 105°C (due to abnormally high ambient temperatures or excessive buck regulator power dissipation), the battery charge current will be reduced to zero and thus dissipate no heat. As an added measure of protection, even if the junction temperature reaches approximately 150°C, the buck regulator’s power switches will be turned off and the SW node will become high impedance. The conditions that cause the LTC3550 to reduce charge current through thermal feedback can be approximated by considering the power dissipated in the IC. The approximate ambient temperature at which the thermal feedback begins to protect the IC is: TA = 105°C – TRISE TA = 105°C – (PD • θJA) TA = 105°C – (PD(CHARGER) + PD(BUCK)) • θJA (5) Most of the charger’s power dissipation is generated from the internal charger MOSFET. Thus, the power dissipation is calculated to be: PD(CHARGER) = (VIN – VBAT) • IBAT (6) VIN is the charger supply voltage (either DCIN or USBIN), VBAT is the battery voltage and IBAT is the charge current. Example: An LTC3550 operating from a 5V wall adapter (on the DCIN input) is programmed to supply 650mA full-scale current to a discharged Li-Ion battery with a voltage of 3V. The charger power dissipation is calculated to be: PD(CHARGER) = (5V – 3V) • 650mA = 1.3W 3550fa 18 LTC3550 U W U U APPLICATIO S I FOR ATIO For simplicity, assume the buck regulator is disabled and dissipates no power (PD(BUCK) = 0). For a properly soldered DHC16 package, the thermal resistance (θJA) is 40°C/W. Thus, the ambient temperature at which the LTC3550 charger will begin to reduce the charge current is: Battery Charger Stability Considerations TA = 105°C – (1.3W • 40°C/W) TA = 105°C – 52°C TA = 53°C The LTC3550 can be used above 53°C ambient, but the charge current will be reduced from 650mA. Assuming no power dissipation from the buck converter, the approximate current at a given ambient temperature can be approximated by: IBAT = 105 °C – TA ( VIN – VBAT ) • θ JA (7) Using the previous example with an ambient temperature of 60°C, the charge current will be reduced to approximately: IBAT = 105 °C – 60 °C 45 °C = (5V – 3V) • 40 °C/W 80 °C/A IBAT = 563mA Because the regulator typically dissipates significantly less power than the charger (even in worst-case situations), the calculations here should work well as an approximation. However, the user may wish to repeat the previous analysis to take the buck regulator’s power dissipation into account. Equation (7) can be modified to take into account the temperature rise due to the buck regulator: IBAT = 105 °C – TA − (PD(BUCK ) • θ JA ) ( VIN – VBAT ) • θ JA an example, a correctly soldered LTC3550 can deliver over 800mA to a battery from a 5V supply at room temperature. Without a good backside thermal connection, this number would drop to much less than 500mA. (8) For optimum performance, it is critical that the exposed metal pad on the backside of the LTC3550 package is properly soldered to the PC board ground. When correctly soldered to a 2500mm2 double sided 1oz copper board, the LTC3550 has a thermal resistance of approximately 40°C/W. Failure to make thermal contact between the exposed pad on the backside of the package and the copper board will result in thermal resistances far greater than 40°C/W. As The constant-voltage mode feedback loop is stable without any compensation provided a battery is connected to the charger output. When the charger is in constant-current mode, the charge current program pin (IDC or IUSB) is in the feedback loop, not the battery. The constant-current mode stability is affected by the impedance at the charge current program pin. With no additional capacitance on this pin, the charger is stable with program resistor values as high as 20k (ICHG = 50mA); however, additional capacitance on these nodes reduces the maximum allowed program resistor value. Checking Regulator Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to (ΔILOAD • ESR), where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its steady state value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem. For a detailed explanation of switching control loop theory, see Application Note 76. A second, more severe transient is caused by switching in loads with large (>1µF) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 • CLOAD). Thus, a 10µF capacitor charging to 3.3V would require a 250µs rise time, limiting the charging current to about 130mA. 3550fa 19 LTC3550 U W U U APPLICATIO S I FOR ATIO Protecting the USB Pin and Wall Adapter Input from Overvoltage Transients Caution must be exercised when using ceramic capacitors to bypass the USBIN pin or the wall adapter inputs. High voltage transients can be generated when the USB or wall adapter is hot-plugged. When power is supplied via the USB bus or wall adapter, the cable inductance along with the self resonant and high Q characteristics of ceramic capacitors can cause substantial ringing which could exceed the maximum voltage ratings and damage the LTC3550. Refer to Linear Technology Application Note 88, entitled “Ceramic Input Capacitors Can Cause Overvoltage Transients” for a detailed discussion of this problem. The long cable lengths of most wall adapters and USB cables makes them especially susceptible to this problem. To bypass the USB and the wall adapter inputs, add a 1Ω resistor in series with a ceramic capacitor to lower the effective Q of the network and greatly reduce the ringing. A tantalum, OS-CON, or electrolytic capacitor can be used in place of the ceramic and resistor, as their higher ESR reduces the Q, thus reducing the voltage ringing. The oscilloscope photograph in Figure 5 shows how serious the overvoltage transient can be for the USB and wall adapter inputs. For both traces, a 5V supply is hot-plugged using a three foot long cable. For the top trace, only a 4.7µF ceramic X5R capacitor (without the recommended 1Ω series resistor) is used to locally bypass the input. This trace shows excessive ringing when the 5V cable is inserted, with the overvoltage spike reaching 10V. For the bottom trace, a 1Ω resistor is added in series with the 4.7µF ceramic capacitor to locally bypass the 5V input. This trace shows the clean response resulting from the addition of the 1Ω resistor. Even with the additional 1Ω resistor, bad design techniques and poor board layout can often make the overvoltage problem even worse. System designers often add extra inductance in series with input lines in an attempt to minimize the noise fed back to those inputs by the application. In reality, adding these extra inductances only makes the overvoltage transients worse. Since cable inductance is one of the fundamental causes of the excessive ringing, adding a series ferrite bead or inductor increases the effective cable inductance, making the problem even worse. For this reason, do not add additional inductance (ferrite beads or inductors) in series with the USB or wall adapter inputs. For the most robust solution, 6V transorbs or zener diodes may also be added to further protect the USB and wall adapter inputs. Two possible protection devices are the SM2T from STMicroelectronics and the EDZ series devices from ROHM. Always use an oscilloscope to check the voltage waveforms at the USBIN and DCIN pins during USB and wall adapter hot-plug events to ensure that overvoltage transients have been adequately removed. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3550. These items are also illustrated graphically in Figures 6 and 7. Check the following in your layout: 6 4.7μF ONLY 2V/DIV VCC 7 + – R1 4.7μF + 1Ω 2V/DIV R2 BOLD LINES INDICATE HIGH CURRENT PATHS LTC3550 VFB SW VCC 10 CIN 8 GND GND 9 L1 – 17 COUT + VOUT 3550 F06 20μs/DIV 3550 F04 Figure 5. Waveforms Resulting from Hot-Plugging a 5V Input Supply When Using Ceramic Bypass Capacitors CF Figure 6. DC-DC Converter Layout Diagram 3550fa 20 LTC3550 U U W U APPLICATIO S I FOR ATIO CF VIA TO VOUT R2 VIA TO GND VIA TO VCC R1 VFB RUN SW CIN L1 VCC GND COUT VOUT 3550 F07 Figure 7. DC-DC Converter Suggested Layout 1. The power traces, consisting of the GND trace, the SW trace and the VCC trace should be kept short, direct and wide. 2. Does the VFB pin connect directly to the feedback resistors? The resistive divider R1/R2 must be connected between the (+) plate of COUT and ground. 3. Does the (+) plate of CIN connect to VCC as closely as possible? This capacitor provides the AC current to the internal power MOSFETs. 4. Keep the switching node, SW, away from the sensitive VFB node. 5. Keep the (–) plates of CIN and COUT as close as possible. 6. Solder the exposed pad on the backside of the package to PC board ground for optimum thermal performance. The thermal resistance of the package can be further enhanced by increasing the area of the copper used for PC board ground. Design Example As a design example, assume the LTC3550 is used in a single lithium-ion battery-powered cellular phone application. The battery is charged by either plugging a wall adapter cable into the phone or putting the phone in a USB cradle. The optimum charge current for this particular lithium-ion battery is determined to be 800mA. The buck regulator output voltage needs to be 1.8V. Starting with the charger, choosing RIDC to be 1.24k programs the charger for 806mA. Choosing RIUSB to be 2.1k programs the charger for 475mA when charging from the USB cradle, ensuring that the charger never exceeds the 500mA maximum current supplied by the USB port. A good rule of thumb for ITERMINATE is onetenth the full charge current, so RITERM is picked to be 1.24k (ITERMINATE = 80mA). Moving on to the step-down converter, VCC will be powered from the battery which can range from a maximum of 4.2V down to about 2.7V. The load current requirement 3550fa 21 LTC3550 U U W U APPLICATIO S I FOR ATIO is a maximum of 600mA but most of the time it will be in standby mode, requiring only 2mA. Efficiency at both low and high load currents is important. With this information we can calculate L using Equation (1), ∆ IL = VOUT fO • L ⎞ ⎛ V • ⎜ 1− OUT ⎟ VCC ⎠ ⎝ Substituting VOUT = 1.8V, VCC = 4.2V, ΔIL = 240mA and fO = 1.5MHz in Equation (3) gives: 1 . 8V ⎛ 1 . 8V ⎞ L= = 2 . 86 µ H • ⎜1− 1 . 5MHz • (240mA) ⎝ 4 . 2V ⎟⎠ A 2.2µH inductor works well for this application. For best efficiency choose a 720mA or greater inductor with less than 0.2Ω series resistance. CIN will require an RMS current rating of at least 0.3A = ILOAD(MAX)/2 at temperature and COUT will require an ESR of less than 0.25Ω. In most cases, a ceramic capacitor will satisfy this requirement. For the feedback resistors, choose R1 = 301k. R2 can then be calculated from equation (4) to be: ⎛V ⎞ R2 = R1⎜ OUT – 1⎟ = 604k ⎝ 0.6 ⎠ Figure 8 shows the complete circuit along with its efficiency curve. 95 2.2µH* VOUT 1.8V 10µF** 600mA CER SW DCIN 1µF 2.1k 1% 1µF USBIN VCC IUSB BAT IDC 1.24k 1% 301k RUN 800mA (WALL) 475mA (USB) 4.2V SINGLE-CELL Li-Ion BATTERY + 1.24k 1% * MURATA LQH32CN2R2M33 ** TAIYO YUDEN JMK316BJ106ML † TAIYO YUDEN LMK212BJ475MG VCC = 4.2V 80 VCC = 3.6V 75 70 4.7µF† ITERM GND VCC = 2.7V 85 604k VFB EN USB PORT 22pF EFFICIENCY (%) LTC3550 WALL ADAPTER VOUT = 1.8V 90 65 60 0.1 3550 F08a 1 10 100 OUTPUT CURRENT (mA) 1000 3550 G24 Figure 8a. Design Example Circuit Figure 8b. Buck Regulator Efficiency vs Output Current U TYPICAL APPLICATIO S Full Featured Dual Input Charger Plus Step-Down Converter 800mA (WALL) 475mA (USB) WALL ADAPTER DCIN BAT LTC3550 USB POWER 1mF 1mF 1k 1% + 4.2V SINGLE-CELL Li-Ion BATTERY RUN IUSB VCC IDC SW VFB ITERM 1.24k 1% 1k CHRG EN 2.1k 1% 4.7mF 1k PWR USBIN GND 2.2mH 22mF 10mF CER VOUT 1.8V 600mA 604k 301k 3550 TA03 3550fa 22 LTC3550 U PACKAGE DESCRIPTIO DHC Package 16-Lead Plastic DFN (5mm × 3mm) (Reference LTC DWG # 05-08-1706) 0.65 ±0.05 3.50 ±0.05 1.65 ±0.05 2.20 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 4.40 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 5.00 ±0.10 (2 SIDES) R = 0.20 TYP 3.00 ±0.10 (2 SIDES) 9 0.40 ± 0.10 16 1.65 ± 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) PIN 1 NOTCH (DHC16) DFN 1103 8 0.200 REF 1 0.25 ± 0.05 0.50 BSC 0.75 ±0.05 4.40 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3550fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LTC3550 U TYPICAL APPLICATIO Dual Input Charger Plus Step-Down Converter with Wall Adapter PowerPath™ EN WALL ADAPTER DCIN LTC3550 1µF RUN USB POWER VCC USBIN 1k 4.7µF 1µF IUSB BAT IDC SW ITERM VFB 800mA (WALL) 475mA (USB) 2.2µH 2.1k 1% 1.24k 1% 10µF CER GND 1k 1% 22pF 604k VOUT 1.8V 600mA + 4.2V SINGLE-CELL Li-Ion BATTERY 301k PowerPath is a trademark of Linear Technology Corporation 3550 TA04 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20µA, ThinSOT Package LTC3406/LTC3406B 1.5MHz, 600mA Synchronous Step-Down DC/DC Converter in ThinSOTTM LTC3455 Dual DC/DC Converter with USB Power Management and Li-Ion Battery Charger Efficiency >96%, Accurate USB Current Limiting (500mA/100mA), 4mm × 4mm QFN-24 Package LTC3456 2-Cell Multi-Output DC/DC Converter with USB Power Manager Seamless Transition Between 2-Cell Battery, USB and AC Wall Adapter Input Power Sources, QFN Package LTC3550-1 Dual Input USB/AC Adapter Li-Ion Battery Synchronous Buck Converter, Efficiency = 93%, Output = 1.875V at 600mA, Charge Charger with 600mA Buck Converter Current = 950mA Programmable 5mm × 3mm 16-Lead DFN Package LTC3552-1 Standalone Linear Li-Ion Battery Charger with Dual Synchronous Buck Converter LTC4055 USB Power Controller and Battery Charger Charges Single-Cell Li-Ion Batteries Directly from USB Port, Thermal Regulation, 4mm × 4mm QFN-16 Package LTC4058 Standalone 950mA Lithium-Ion Charger in DFN C/10 Charge Termination, Battery Kelvin Sensing, ±7% Charge Accuracy LTC4063 Standalone Li-Ion Charger Plus LDO 4.2V, ±0.35% Float Voltage, Up to 1A Charge Current, 100mA LDO LTC4068 Standalone Linear Li-Ion Battery Charger with Programmable Termination Charge Current up to 950mA, Thermal Regulation, 3mm × 3mm DFN-8 Package LTC4075 Dual Input Standalone Li-Ion Battery Charger Charges Single-Cell Li-Ion Batteries from Wall Adapter and USB Inputs with Automatic Input Power Detection and Selection, 950mA Charger Current, Thermal Regulation, C/X Charge Termination, 3mm × 3mm DFN Package LTC4076 Dual Input Standalone Li-Ion Battery Charger Charges Single-Cell Li-Ion Batteries from Wall Adapter and USB Inputs with Automatic Input Power Detection and Selection, 950mA Charger Current, Thermal Regulation, USB Low Power Mode Select, C/X Charge Termination, 3mm × 3mm DFN Package LTC4077 Dual Input Standalone Li-Ion Battery Charger Charges Single-Cell Li-Ion Batteries from Wall Adapter and USB Inputs with Automatic Input Power Detection and Selection, 950mA Charger Current, Thermal Regulation, Programmable USB Low Power Mode, C/10 Charge Termination, 3mm × 3mm DFN Package Synchronous Buck Converter, Efficiency > 90%, Outputs = 1.8V at 800mA, 1.575V at 400mA, Charge Current Programmable up to 950mA, USB Compatible, 5mm × 3mm 16-Lead DFN Package ThinSOT is a trademark of Linear Technology Corporation. 3550fa 24 Linear Technology Corporation LT 0406 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2006