LTC3552-1 Standalone Linear Li-Ion Battery Charger and Dual Synchronous Buck Converter DESCRIPTIO U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Programmable Charge Current Up to 950mA Complete Linear Charger and Dual DC/DC Regulator Dual Fixed Outputs: 1.8V at 800mA 1.575V at 400mA No MOSFET, Sense Resistor or Blocking Diode Required Thermal Regulation Maximizes Charge Rate Without Risk of Overheating* Charges Directly from a USB Port Programmable Charge Current Termination Preset 4.2V Charge Voltage with ±1% Accuracy Charge Current Monitor Output for Gas Gauging* Automatic Recharge Charge Status Output “Power Present” Output Soft-Start Limits Inrush Current Low Quiescent Current Buck Converter (40µA) Current Mode Operation, Constant Frequency (2.25MHz) Low Profile (5mm × 3mm × 0.75mm) DFN Package The LTC®3552-1 is a complete constant-current/constantvoltage linear charger and dual fixed output DC/DC converter for single cell lithium-ion batteries. Its DFN package and low external component count make the LTC3552-1 ideally suited for portable applications. Furthermore, the LTC3552-1 is designed to work within USB power specifications. Cellular Telephones, PDAs, MP3 Players Bluetooth Applications , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 6522118, 6700364, 5481178, 6580258, 6304066, 6127815, 6498466, 6611131. U APPLICATIO S ■ ■ No external sense resistor or external blocking diode are required due to the internal MOSFET architecture. The charge voltage is fixed at 4.2V and the charge current is programmed with a resistor. The charge cycle terminates when the charge current drops below the programmed termination threshold after the final float voltage is reached. When the input supply (wall adapter or USB supply) is removed, the LTC3552-1 enters a low current state dropping the battery drain current to less than 2µA. Thermal regulation maximizes charge rate without risk of overheating. The synchronous step-down switching regulators generate fixed output voltages of 1.8V and 1.575V. The switching frequency is set at 2.25MHz, allowing the use of small surface mount inductors and capacitors. U TYPICAL APPLICATIO Efficiency Curve/ Power Loss of Regulators Single Cell Li-Ion Battery Charger with C/5 Termination and Dual DC/DC Converter 100 1000 95 619Ω 1.24k RUN1 ITERM PROG RUN2 PWR 4.7µH VOUT2 1.575V/ 400mA COUT2 10µF CER CFF2 330pF BAT CHRG EN LTC3552-1 10µF 2.2µH SW1 VOUT2 VOUT1 VFB2 800mA VCC SW2 GND VFB1 VOUT2 = 1.575V 90 VOUT1 = 1.8V CFF1 330pF + 4.2V 1-CELL Li-Ion BATTERY VOUT1 1.8V/ 800mA COUT1 10µF CER EFFICIENCY (%) 1µF VIN 10 80 CHANNEL 1 75 CHANNEL 2 70 65 1 VIN = 3.6V Burst Mode OPERATION 60 1 35521 TA01 100 85 POWER LOSS (mW) VIN 4.5V TO 6.5V 10 100 LOAD CURRENT (mA) 0.1 1000 35521 TAO1b 35521fa 1 LTC3552-1 U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO (Note 1) Input Supply Voltage (VIN) ......................... –0.3V to 10V PROG, ITERM .................................. –0.3V to VIN + 0.3V BAT .............................................................. –0.3V to 7V CHRG, PWR, EN ....................................... –0.3V to 10V BAT Short-Circuit Duration............................Continuous BAT Pin Current ..........................................................1A PROG Pin Current ....................................................1mA VCC Supply Voltage ...................................... –0.3V to 6V VOUT1, VOUT2, RUN1, RUN2 Voltages .............................–0.3V to VCC +0.3V VFB1, VFB2 ........................................–0.3V to VCC + 0.3V SW1, SW2 Voltage ...........................–0.3V to VCC + 0.3V Ambient Operating Temperature Range (Note 2) .................................... –40°C to 85°C Maximum Junction Temperature (Note 8) ............ 125°C Storage Temperature Range................... –65°C to 125°C TOP VIEW ITERM 1 16 EN BAT 2 15 PWR CHRG 3 14 VIN RUN2 4 SW2 5 12 SW1 RUN1 6 11 VCC VOUT2 7 10 VOUT1 VFB2 8 9 17 13 PROG VFB1 DHC PACKAGE 16-LEAD (5mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 40°C/W (Note 3) EXPOSED PAD IS GROUND (PIN 17) MUST BE SOLDERED TO PCB ORDER PART NUMBER DHC PART MARKING LTC3552EDHC-1 35521 Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VCC = 3.6V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Battery Charger ● VIN Input Supply Voltage IIN Input Supply Current Charge Mode (Note 4) Standby Mode Shutdown Mode RPROG = 10k Charge Terminated EN = 5V, VIN < VBAT or VIN < VUV VFLOAT Regulated Output (Float) Voltage 0°C ≤ TA ≤ 85°C, 4.3V < VIN < 8V IBAT BAT Pin Current RPROG = 10k, Current Mode RPROG = 2k, Current Mode Standby Mode, VBAT = 4.2V Shutdown Mode (EN = 5V, VIN < VBAT or VIN < VUV) Sleep Mode, VIN = 0V ● ● ● From VIN Low to High ● 4.25 ● ● ● 8 0.4 200 25 1 500 50 mA µA µA 4.158 4.2 4.242 µA 92 465 100 500 –2.5 ±1 105 535 –6 ±2 mA mA µA µA ±1 ±2 µA 3.7 3.8 3.92 V 300 mV VUV VIN Undervoltage Lockout Voltage VUVHYS VIN Undervoltage Lockout Hysteresis ● 150 200 VEN(IL) EN Pin Input Low Voltage ● 0.4 0.7 VEN(IH) EN Pin Input High Voltage ● REN EN Pin Pull-Down Resistor ● VASD VIN – VBAT Lockout Threshold Voltage VIN from Low to High VIN from High to Low ITERM Charge Termination Current Threshold RTERM = 1k RTERM = 5k ● ● V V 0.7 1 V 1.2 2 5 ΜΩ 70 5 100 30 140 50 mV mV 90 17.5 100 20 110 22.5 mA mA 35521fa 2 LTC3552-1 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VCC = 3.6V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN VPROG VCHRG PROG Pin Voltage RPROG = 10k, Current Mode 0.93 CHRG Pin Output Low Voltage ICHRG = 5mA VPWR PWR Pin Output Low Voltage IPWR = 5mA ΔVRECHRG Recharge Battery Threshold Voltage VFLOAT – VRECHRG, 0°C < TA < 85°C TLIM Junction Temperature in ConstantTemperature Mode 120 °C RON-CHRG Charger’s Power FET “ON” Resistance (Between VIN and BAT) 600 mΩ tSS-CHRG Charger Soft-Start Time IBAT = 0 to IBAT = 1000V/RPROG 100 µs tRECHRG Recharge Comparator Filter Time VBAT High to Low 0.75 2 4.5 ms tTERM Termination Comparator Filter Time IBAT Drops Below Charge Termination Threshold 0.4 1 2.5 ms 5.5 V 60 TYP MAX UNITS 1 1.07 V 0.35 0.6 V 0.35 0.6 V 100 140 mV Switching Regulator ● 2.5 0°C ≤ TA ≤ 85°C (Note 5) –40°C ≤ TA ≤ 85°C (Note 5) ● 1.764 1.755 1.8 1.8 1.836 1.836 V V 0°C ≤ TA ≤ 85°C (Note 5) –40°C ≤ TA ≤ 85°C (Note 5) ● 1.544 1.536 1.575 1.575 1.607 1.607 V V VCC = 2.5V to 5.5V (Note 5) 0.3 0.5 Output Voltage Load Regulation (Note 5) 0.5 Input DC Supply Current (Note 6) Active Mode Sleep Mode Shutdown VOUT1 = 1.5V, VOUT2 = 1.3V VOUT1 = 1.89V, VOUT2 = 1.65V RUN = 0V, VCC = 5.5V 700 40 0.1 fOSC Oscillator Frequency VOUT1 = 1.8V, VOUT2 = 1.575V ILIM Peak Switch Current Limit Regulator 1 Peak Switch Current Limit Regulator 2 VCC = 3V, Duty Cycle < 35% VCC = 3V, Duty Cycle < 35% RDS(ON) Converter Top Switch On-Resistance (Note 7) Converter Bottom Switch On-Resistance (Note 7) ISW(LKG) Switch Leakage Current VRUN RUN Threshold Voltage ● IRUN RUN Leakage Current ● VCC Operating Voltage Range for Converter VOUT1 Output Voltage Feedback of Regulator 1 VOUT2 Output Voltage Feedback of Regulator 2 ΔVLINE_REG Reference Voltage Line Regulation ΔVLOAD_REG IS ● % 950 60 1 µA µA µA 1.8 2.25 2.7 MHz 0.95 0.6 1.2 0.7 1.6 0.9 A A 0.35 0.3 0.45 0.45 Ω Ω 0.01 1 µA 1 1.5 V 0.01 1 µA VCC = 5V, VRUN = 0V, VFB = 0V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3552E-1 is guaranteed to meet performance specifications from 0°C to 85°C Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Failure to solder the exposed backside of the package to the PC board will result in a thermal resistance much higher than 40°C/W. See Thermal Considerations. Note 4: Supply current includes PROG pin current and ITERM pin current (approximately 100µA each) but does not include any current delivered to the battery through the BAT pin (approximately 100mA). %/V 0.3 Note 5: The converter is tested in a proprietary test mode that connects the output of the error amplifier to the SW pin, which is connected to an external servo loop. Note 6: Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. Note 7: The regulator power switch on-resistances are guaranteed by correlation to wafer level measurements. Note 8: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD • θJA) 35521fa 3 LTC3552-1 U W TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C Unless Otherwise Specified. Battery Charger PROG Pin Voltage vs Supply Voltage (Constant-Current Mode) PROG Pin Voltage vs Temperature 1.015 600 1.0100 VBAT = 4V RPROG = 10k 1.010 Charge Current vs PROG Pin Voltage VIN = 5V VBAT = VBSENSE = 4V RPROG = 10k 1.0075 VIN = 5V RPROG = 2k RTERM = 2k 500 1.0050 1.000 0.995 400 1.0025 IBAT (mA) VPROG (V) VPROG (V) 1.005 1.0000 0.9975 300 200 0.9950 0.990 0.985 100 0.9925 4 4.5 5 5.5 6.5 6 VIN (V) 7 7.5 8 0.9900 –50 0 –25 0 50 25 TEMPERATURE (°C) 75 35521 G01 100 0 0.4 0.2 1 0.6 0.8 VPROG (V) 35521 G03 35521 G02 Regulated Output (Float) Voltage vs Charge Current Regulated Output (Float) Voltage vs Temperature 4.215 4.26 VIN = 5V 4.24 RPROG = 1.25k Regulated Output (Float) Voltage vs Supply Voltage 4.215 VIN = 5V RPROG = 10k 4.210 1.2 RPROG = 10k 4.210 4.205 4.18 4.16 4.205 VFLOAT (V) 4.20 VFLOAT (V) VFLOAT (V) 4.22 4.200 4.200 4.195 4.195 4.190 4.190 4.14 4.12 4.10 0 100 200 300 400 IBAT (mA) 500 600 700 4.185 –50 0 25 50 TEMPERATURE (°C) 75 100 4.185 PWR Pin I-V Curve (Pull-Down State) TA = –40°C 20 TA = 90°C 15 25 TA = 25°C 500 20 TA = 90°C 400 15 5 5 VIN = 5V VBAT = 4V 0 1 2 4 3 VCHRG (V) 5 6 7 35521 G07 6.5 6 VIN (V) 7 7.5 8 35521 G06 300 100 VIN = 5V VBAT = 4V 0 0 5.5 200 10 10 5 Charge Current vs Battery Voltage IBAT (mA) TA = 25°C IPWR (mA) TA = –40°C 25 4.5 600 30 30 4 35521 G05 35521 G04 CHRG Pin I-V Curve (Pull-Down State) ICHRG (mA) –25 0 1 2 4 3 VPWR (V) 5 6 7 35521 G08 0 2.4 VIN = 5V θJA = 40°C/W RPROG = 2k 2.7 3 3.3 3.6 VBAT (V) 3.9 4.2 4.5 35521 G09 35521fa 4 LTC3552-1 U W TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C Unless Otherwise Specified. Battery Charger Charge Current vs Ambient Temperature Charge Current vs Supply Voltage 600 600 ONSET OF THERMAL REGULATION RPROG = 2k 500 500 RPROG = 2k 400 IBAT (mA) IBAT (mA) 400 VBAT = 4V θJA = 40°C/W 300 200 200 RPROG = 10k 100 0 VIN = 5V VBAT = 4V θJA = 40°C/W 300 4 4.5 5 5.5 6 6.5 VIN (V) RPROG = 10k 100 7 7.5 0 –50 8 –25 35521 G10 50 25 75 0 TEMPERATURE (°C) 100 125 35521 G11 Recharge Threshold Voltage vs Temperature Power FET “On” Resistance vs Temperature 700 4.16 VIN = 4.2V = 100mA I 650 BAT RPROG = 2k 4.14 VIN = 5V RPROG = 10k 4.12 VRECHRG (V) RDS(ON) (mΩ) 600 550 500 4.08 450 4.06 400 350 –50 4.10 –25 0 25 50 75 TEMPERATURE (°C) 100 125 35521 G12 4.04 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 35521 G13 35521fa 5 LTC3552-1 U W TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C Unless Otherwise Specified. Switching Regulator Burst Mode Operation Load Step SW 5V/DIV VOUT1 RIPPLE 20mV/DIV IL 500mA/DIV IL 200mA/DIV ILOAD: 80mA800mA 500mA/DIV ILOAD 40mA400mA 200mA/DIV 80 75 70 3 3.5 4 4.5 VCC (V) 2.3 2.2 5 5.5 6 35521 G17 Output Voltage Error vs Temperature 0 –2 –4 –6 50 25 75 0 TEMPERATURE (°C) 100 2 125 3 0.4 0.2 0 –0.2 –0.4 –0.6 450 400 MAIN SWITCH 350 300 SYNCHRONOUS SWITCH 250 50 25 75 0 TEMPERATURE (°C) 100 125 35521 G20 VCC = 2.7V 2 3 4 VCC (V) VCC = 4.2V VCC = 3.6V 400 350 300 250 150 1 6 35521 G19 200 –0.8 200 5 RDS(ON) vs Junction Temperature 550 450 0.6 4 VCC (V) 35521 G18 500 RDS(ON) (mΩ) OUTPUT VOLTAGE ERROR (%) 2 –10 500 VCC = 3.6V –1.0 –50 –25 4 RDS(ON) vs Supply Voltage 1.0 0.8 6 –8 2.0 –50 –25 RDS(ON) (mΩ) 2.5 8 2.1 VOUT1 = 1.8V, REGULATOR 1 Burst Mode OPERATION CIRCUIT OF FIGURE 2 2 10 VCC = 3.6V FREQUENCY DEVIATION (%) 85 35521 G16 Oscillator Frequency Error vs Supply Voltage 2.4 FREQUENCY (MHz) 90 EFFICIENCY (%) 2.5 IOUT = 1mA IOUT = 10mA IOUT = 100mA IOUT = 800mA 95 VCC = 3.6V 20µs/DIV VOUT2 = 1.575V ILOAD = 40mA TO 400mA REGULATOR 2; CIRCUIT OF FIGURE 2 Oscillator Frequency vs Temperature Efficiency vs Supply Voltage 100 35521 G15 20µs/DIV VCC = 3.6V VOUT1 = 1.8V ILOAD = 80mA TO 800mA REGULATOR 1; CIRCUIT OF FIGURE 2 35521 G14 VCC = 3.6V 2µs/DIV VOUT1 = 1.8V ILOAD = 60mA REGULATOR 1; CIRCUIT OF FIGURE 2 60 VOUT2 200mV/DIV VOUT1 200mV/DIV IL 200mA/DIV 65 Load Step 5 6 7 35521 G21 100 –50 –25 MAIN SWITCH SYNCHRONOUS SWITCH 25 50 75 100 125 150 0 JUNCTION TEMPERATURE (°C) 35521 G22 35521fa 6 LTC3552-1 U W TYPICAL PERFOR A CE CHARACTERISTICS TA = 25°C Unless Otherwise Specified. Switching Regulator Efficiency vs Load Current Load Regulation 100 2.0 95 1.5 Line Regulation 0.5 0.4 VOUT1 = 1.8V IOUT = 200mA 0.3 VOUT ERROR (%) 85 VOUT2 = 1.575V 80 75 VOUT ERROR (%) 1.0 VOUT1 = 1.8V 0.5 0 VOUT2 = 1.575V –0.5 –1.0 70 VCC = 3.6V Burst Mode OPERATION CIRCUIT OF FIGURE 2 65 60 10 100 LOAD CURRENT (mA) –2.0 1 1000 10 100 LOAD CURRENT (mA) 90 85 VCC = 3.6V VCC = 4.2V 75 –0.2 –0.4 –0.5 2.5 3 3.5 4 VCC (V) 4.5 5 5.5 35521 G25 VOUT2 = 1.575V REGULATOR 2; CIRCUIT OF FIGURE 2 95 VCC = 2.7V 80 VOUT2 = 1.575V Load Regulation VOUT1 = 1.8V REGULATOR 1; CIRCUIT OF FIGURE 2 90 0 –0.1 35521 G24 100 95 VOUT1 = 1.8V 0.1 1000 35521 G23 Efficiency vs Load Current 100 0.2 –0.3 VCC = 3.6V Burst Mode OPERATION CIRCUIT OF FIGURE 2 –1.5 EFFICIENCY (%) 1 EFFICIENCY (%) EFFICIENCY (%) 90 VCC = 2.7V 85 VCC = 3.6V 80 VCC = 4.2V 75 70 70 65 65 60 60 1 10 100 LOAD CURRENT (mA) 1000 35521 G26 1 10 100 LOAD CURRENT (mA) 1000 35521 G27 35521fa 7 LTC3552-1 U U U PI FU CTIO S ITERM (Pin 1): Charge Termination Program. The charge termination current threshold is programmed by connecting a 1% resistor, RTERM, to ground. The current threshold ITERM, is set by the following formula: 100 V 100 V ITERM = , R TERM = R TERM ITERM BAT (Pin 2): Charge Current Output. Provides charge current to the battery from the internal P-channel MOSFET, and regulates the final float voltage to 4.2V. An internal precision resistor divider from this pin sets the float voltage. This divider is disconnected in shutdown mode to minimize current drain from the battery. CHRG (Pin 3): Charge Status Open-Drain Output. When the battery is charging, the CHRG pin is pulled low by an internal N-channel MOSFET. When the charge cycle is completed, CHRG becomes high impedance. RUN2 (Pin 4): Regulator 2 Enable. Forcing this pin to VCC enables regulator 2, while forcing it to GND causes regulator 2 to shut down. This pin must be driven; do not float. SW2 (Pin 5): Regulator 2 Switch Node Connection to the Inductor. This pin swings from VCC to GND. RUN1 (Pin 6): Regulator 1 Enable. Forcing this pin to VCC enables regulator 1, while forcing it to GND causes regulator 1 to shut down. This pin must be driven; do not float. VOUT2 (Pin 7): Output Voltage Feedback Pin for Regulator 2. Internal resistors divide the output voltage down for comparison to the internal reference voltage. VFB2 (Pin 8): Output Feedback for Regulator 2. Receives the feedback voltage from internal resistive divider across the output. Normal voltage for this pin is 0.6V. VFB1 (Pin 9): Output Feedback for Regulator 1. Receives the feedback voltage from internal resistive divider across the output. Normal voltage for this pin is 0.6V. VCC (Pin 11): Buck Regulators Input Supply. Provides power to the switchers. Must be closely decoupled to GND. SW1 (Pin 12): Regulator 1 Switch Node Connection to the Inductor. This pin swings from VCC to GND. PROG (Pin 13): Charge Current Program and Charge Current Monitor. Charge current is programmed by connecting a 1% resistor, RPROG, to ground. When charging in constant-current mode, this pin servos to 1V. In all modes, the voltage on this pin can be used to measure the charge current using the following formula: V IBAT = PROG • 1000 RPROG This pin is clamped to approximately 2.4V. Driving this pin to voltages beyond the clamp voltage should be avoided. VIN (Pin 14): Charger Input Supply. Provides power to the charger. VIN can range from 4.25V to 8V. This pin should be bypassed with at least a 1µF capacitor. When VIN is within 100mV of the BAT pin voltage, the charger enters shutdown mode dropping the battery drain current to less than 2µA. PWR (Pin 15): Power Supply Status Open-Drain Output. When VIN is greater than the undervoltage lockout threshold and at least 100mV above VBAT, the PWR pin is pulled to ground; otherwise, the pin is high impedance. EN (Pin 16): Enable Input. A logic high on the EN pin will put the charger into shutdown mode where the battery drain current is reduced to less than 2µA and the supply current is reduced to less than 50µA. A logic low or floating the EN pin (allowing an internal 2MΩ pull-down resistor to pull this pin low) enables charging. Exposed Pad (GND) (Pin 17): Ground. The exposed backside of the package (Pin 17) is ground and must be soldered to the PCB for maximum heat transfer. VOUT1 (Pin 10): Output Voltage Feedback Pin for Regulator 1. Internal resistors divide the output voltage down for comparison to the internal reference voltage. 35521fa 8 LTC3552-1 W BLOCK DIAGRA VIN 14 120°C TA 1× 1× 1000× TDIE – + 2 BAT 5µA MA R1 PWR 15 + VA R2 – CHRG 3 CA REF 1.21V + – R3 1V R4 CHARGE PWR – TERM R5 + LOGIC EN 0.1V C1 SHDN EN 16 1 RENABLE 13 VCC REGULATOR 1 17 BURST CLAMP GND VCC R1 EA VFB EN – + 0.6V 9 RTERM RPROG SLOPE COMP VOUT1 10 VFB1 ITERM PROG ITH BURST – + 5Ω ICOMP + 0.35V – SLEEP R2 S Q RS LATCH R Q 0.55V – UVDET UV + SWITCHING LOGIC AND BLANKING CIRCUIT ANTI SHOOTTHRU 12 SW1 + OVDET – + 0.65V OV IRCMP SHUTDOWN – VCC RUN1 6 0.6V REF RUN2 11 VCC OSC 4 OSC VOUT2 7 REGULATOR 2 (IDENTICAL TO REGULATOR 1) VFB2 8 R1 = 240k, R2 = 120k, FOR REGULATOR 1 R1 = 195k, R2 = 120k, FOR REGULATOR 2 5 SW2 35521fa 9 LTC3552-1 U OPERATIO The LTC3552-1 is made up of two circuit blocks: a standalone constant-current/constant-voltage linear charger for a single-cell lithium-ion battery and a high efficiency dual DC/DC switching regulator. The charger can deliver up to 950mA of charge current (using a good thermal PCB layout) with a final float voltage accuracy of ±1%. An internal P-channel power MOSFET and thermal regulation circuitry are included. No blocking diode or external current sense resistor is required; furthermore, the charger is capable of operating from a USB power source. The switching regulators use a constant frequency, current mode step-down architecture. Both main (P-channel MOSFET) and synchronous (N-channel MOSFET) switches are internal. The LTC3552-1 requires no external diodes or sense resistors. LITHIUM-ION BATTERY CHARGER Normal Charge Cycle A charge cycle begins when the voltage at the VIN pin rises above the UVLO threshold level and a 1% program resistor is connected from the PROG pin to ground. The charger enters constant-current mode where the programmed charge current is supplied to the battery. When the BAT pin approaches the final float voltage (4.2V), the charger enters constant-voltage mode and the charge current begins to decrease. When the charge current drops to the programmed termination threshold (set by the external resistor RTERM), the charge cycle ends. Figure 1 shows the state diagram of a typical charge cycle. Charge Status Indicator (CHRG) The open drain charge status output has two states: pulldown and high impedance. The pull-down state indicates that the charger is in a charge cycle. Once the charge cycle has terminated or the charger is disabled, the pin becomes high impedance. Automatic Recharge Once the charge cycle terminates, the charger continuously monitors the voltage on the BAT pin using a comparator with a 2ms filter time (tRECHARGE). A charge cycle restarts when the battery voltage falls below 4.10V (which corre- sponds to approximately 80% to 90% battery capacity). This ensures that the battery is kept at, or near, a fully charged condition and eliminates the need for periodic charge cycle initiations. The CHRG output enters a pulldown state during recharge cycles. If the battery is removed from the charger, a sawtooth waveform of approximately 100mV appears at the charger output. This is caused by the repeated cycling between termination and recharge events. This cycling results in pulsing at the CHRG output; an LED connected to this pin will exhibit a pulsing pattern, indicating to the user that a battery is not present. The frequency of the sawtooth is dependent on the amount of output capacitance. Power Supply Status Indicator (PWR) The power supply status output has two states: pull-down and high impedance. The pull-down state indicates that VIN is above the UVLO threshold (3.8V) and is also 100mV above the battery voltage. If these conditions are not met, the PWR pin is high impedance indicating that the charger is unable to charge the battery. POWER ON EN DRIVEN LOW OR UVLO CONDITION ENDS SHUTDOWN MODE CHARGE MODE ICC DROPS TO <25µA FULL CURRENT CHRG: Hi-Z CHRG: STRONG PULL-DOWN ITERM < 100mV STANDBY MODE NO CHARGE CURRENT EN DRIVEN HIGH OR UVLO CONDITION CHRG: Hi-Z 2.9V < BAT < 4.1V 35521 F01 Figure 1. State Diagram of a Typical Charge Cycle Charge Current Soft-Start The charger includes a soft-start circuit to minimize the inrush current at the start of a charge cycle. When a charge cycle is initiated, the charge current ramps from zero to full-scale current over a period of approximately 100µs. This has the effect of minimizing the transient current load on the power supply during start-up. 35521fa 10 LTC3552-1 U OPERATIO Thermal Limiting An internal thermal feedback loop reduces the programmed charge current if the die temperature attempts to rise above a preset value of approximately 120°C. This feature protects the charger from excessive temperature and allows the user to push the limits of the power handling capability of a given circuit board without risk of damaging the charger. The charge current can be set according to typical (not worst case) ambient temperature with the assurance that the charger will automatically reduce the current in worst-case conditions. DFN package power considerations are discussed further in the Applications Information section. Undervoltage Lockout (UVLO) An internal undervoltage lockout circuit monitors the input voltage and keeps the charger in shutdown mode until VIN rises above the undervoltage lockout threshold. The UVLO circuit has a built-in hysteresis of 200mV. Also, to protect against reverse current in the power MOSFET, the UVLO circuit keeps the charger in shutdown mode if VIN falls to within 30mV of the BAT voltage. If the UVLO comparator is tripped, the charger will not come out of shutdown mode until VIN rises 100mV above the BAT voltage. Manual Shutdown At any point in the charge cycle, the charger can be put into shutdown mode by driving the EN pin high. This reduces the battery drain current to less than 2µA and the VIN supply current to less than 50µA. When in shutdown mode, the CHRG pin is in the high impedance state. A new charge cycle can be initiated by driving the EN pin low. An internal resistor pull-down on this pin forces the charger to be enabled if the pin is allowed to float. divided output voltage (VFB) with a reference voltage of 0.6V and adjusts the peak inductor current accordingly. Main Regulator Control Loop During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle when the VOUT feedback voltage is below the reference voltage. The current flows into the inductor and the load increases until the current limit is reached. The switch turns off and energy stored in the inductor flows through the bottom switch (N-channel MOSFET) into the load until the next clock cycle. The peak inductor current is controlled by the internally compensated ITH voltage, which is the output of the error amplifier. This amplifier compares the VFB to the 0.6V reference (see Block Diagram). When the load current increases, the VFB voltage decreases slightly below the reference. This decrease causes the error amplifier to increase the ITH voltage until the average inductor current matches the new load current. The main control loop is shut down by pulling the RUN pin to ground. Low Load Current Operation When the load is relatively light, the regulator automatically switches into Burst Mode operation, where the PMOS switch operates intermittently based on load demand with a fixed peak inductor current. By running cycles periodically, the switching losses which are dominated by the gate charge losses of the power MOSFETs are minimized. The main control loop is interrupted when the output voltage reaches the desired regulated value. A voltage comparator trips when ITH is below 0.35V, shutting off the switch and reducing the power. The output capacitor and the inductor supply the power to the load until ITH exceeds 0.65V, turning on the switch and the main control loop which starts another cycle. Dropout Operation DUAL SWITCHING REGULATOR The regulators use a current mode architecture with a constant operating frequency of 2.25MHz. Both regulators share the same clock and run in-phase. The output voltages are fixed at 1.8V for regulator 1 and at 1.575V for regulator 2. The resistive divider feedback networks are integrated inside the LTC3552-1. An error amplifier compares the When the VCC input supply voltage decreases approaching the output voltage, the duty cycle increases to 100% which is the dropout condition. In dropout, the PMOS switch is turned on continuously with the output voltage being equal to the input voltage minus the voltage drops across the internal P-channel MOSFET and the inductor. An important design consideration is that the RDS(ON) of 35521fa 11 LTC3552-1 U OPERATIO the P-channel switch increases with decreasing input supply voltage (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the regulator is used at 100% duty cycle with low input voltage (see Thermal Considerations in the Applications Information section). Low Supply Voltage Operation To prevent unstable operation, the regulator incorporates an undervoltage lockout circuit which shuts down the regulators when the VCC voltage drops below approximately 1.65V. U U W U APPLICATIO S I FOR ATIO A typical LTC3552-1 application circuit is shown in Figure 2. External component selection is driven by the charging requirements and the switching regulators load requirements. VIN 4.5V TO 6.5V 1µF 825Ω 1.65k VIN RUN1 ITERM PROG RUN2 PWR 4.7µH VOUT2 1.575V/ 400mA COUT2 10µF CER CFF2 330pF BAT CHRG EN LTC3552-1 10µF VCC 2.2µH SW2 SW1 VOUT2 VOUT1 VFB2 600mA GND VFB1 CFF1 330pF + 4.2V 1-CELL Li-Ion BATTERY VOUT1 1.8V/ 800mA COUT1 10µF CER 35521 F02 Figure 2. LTC3552-1 Basic Circuit Programming Charge Current The charge current is programmed using a single resistor from the PROG pin to ground. The charge current out of the BAT pin is 1000 times the current out of the PROG pin. The program resistor and the charge current are calculated using the following equations: 1000 V 1000 V RPROG = , ICHG = ICHG RPROG Charge current out of the BAT pin can be determined anytime by monitoring the PROG pin voltage and using the following equation: V IBAT = PROG • 1000 RPROG Programming Charge Termination The charge cycle terminates when the charge current falls below the programmed termination threshold. This threshold is set by connecting an external resistor, RTERM, from the ITERM pin to ground. The charge termination current threshold (ITERM) is set by the following equation: 100 V ICHG RPROG • , = R TERM 10 R TERM 100 V R TERM = ITERM The termination condition is detected by using an internal filtered comparator to monitor the ITERM pin. When the ITERM pin voltage drops below 100mV* for longer than tTERM (typically 1ms), charging is terminated. The charge current is latched off and the charger enters standby mode where the input supply current drops to 200µA. (Note: Termination is disabled in thermal limiting mode). ITERM = ITERM can be set to be one tenth of ICHG by shorting the ITERM pin to the PROG pin, thus eliminating the need for external resistor RTERM. When configured in this way, ITERM is always set to ICHG/10, and the programmed charge current is set by the equation: 500 V ** 500 V ICHG = ,RPROG = RPROG ICHG When charging, transient loads on the BAT pin can cause the ITERM pin to fall below 100mV for short periods of time before the DC charge current has dropped to 10% of the programmed value. The 1ms filter time (tTERM) on the termination comparator ensures that transient loads of this nature do not result in premature charge cycle termination. Once the average charge current drops below the programmed termination threshold, the charger terminates the charge cycle and ceases to provide any current out of the BAT pin. In this state, any load on the BAT pin must be supplied by the battery. * Any external sources that hold the ITERM pin above 100mV will prevent the LTC3552-1 from terminating a charge cycle. ** These equations apply only when the ITERM pin is shorted to the PROG pin. 35521fa 12 LTC3552-1 U W U U APPLICATIO S I FOR ATIO The charger constantly monitors the BAT pin voltage in standby mode. If this voltage drops below the 4.1V recharge threshold (VRECHRG), another charge cycle begins and charge current is once again supplied to the battery. To manually restart a charge cycle when in standby mode, the input voltage must be removed and reapplied, or the charger must be shut down and restarted using the EN pin. Switching Regulator Inductor Selection The inductor value has a direct effect on inductor ripple current ΔIL, which decreases with higher inductance and increases with higher VCC or VOUT: ⎞ ⎛ V V ∆ IL = OUT ⎜ 1 − OUT ⎟ fO • L ⎝ VCC ⎠ Accepting larger values of ΔIL allows the use of low inductances, but results in higher output ripple voltage, greater core losses, and lower output current capability. A reasonable starting point for setting ripple current is ΔIL = 0.3 • IOUT(MAX), where IOUT(MAX) is 800mA for regulator 1 and 400mA for regulator 2. The largest ripple current ΔIL occurs at the maximum input voltage. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation: L= VOUT ⎛ VOUT ⎞ ⎜ 1− ⎟ fO • ∆ IL ⎝ VCC(MAX ) ⎠ The inductor value will also have an effect on Burst Mode operation. The transition from low current operation begins when the peak inductor current falls below a level set by the burst clamp. Lower inductor values result in higher rip-ple current which causes this to occur at lower load cur-rents. This causes a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to increase. Inductor Core Selection Different core materials and shapes will change the size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on what the LTC3552-1 requires to operate. Table 1 shows some typical surface mount inductors that work well in LTC3552-1 applications. Table 1. Representative Surface Mount Inductors PART NUMBER Sumida CDRH3D16 Sumida CDRH2D11 Sumida CMD4D11 Murata LQH32CN Toko D312F Murata ELT5KT VALUE (µH) 2.2 3.3 4.7 1.5 2.2 2.2 3.3 1.0 2.2 2.2 3.3 3.3 4.7 DCR (Ω MAX) 0.075 0.110 0.162 0.068 0.170 0.116 0.174 0.060 0.097 0.060 0.260 0.17 0.20 MAX DC CURRENT (A) 1.20 1.10 0.90 0.900 0.780 0.950 0.770 1.00 0.79 1.08 0.92 1.00 0.95 SIZE W × L × H (mm) 3.8 × 3.8 × 1.8 3.2 × 3.2 × 1.2 4.4 × 5.8 × 1.2 2.5 × 3.2 × 2.0 2.5 × 3.2 × 2.0 4.5 × 5.4 × 1.2 Input Capacitor (CIN) Selection In continuous mode, the input current of the converter is a square wave with a duty cycle of approximately VOUT/VCC. To prevent large voltage transients, a low equivalent series resistance (ESR) input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: IRMS ≈ IMAX VOUT ( VCC − VOUT ) VCC where the maximum average output current IMAX equals the peak current minus half the peak-to-peak ripple current, IMAX = ILIM – ΔIL/2.This formula has a maximum at VCC = 2VOUT, where IRMS= IOUT/2. This simple worst-case is commonly used to design because even significant deviations do not offer much relief. Note that capacitor manufacturer’s ripple current ratings are often based on only 2000 hours life-time. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet the size or height requirements of the design. An additional 0.1µF to 1µF ceramic capacitor is also recommended on VCC for high frequency decoupling, when not using an all ceramic capacitor solution. 35521fa 13 LTC3552-1 U W U U APPLICATIO S I FOR ATIO Output Capacitor (COUT) Selection The selection of COUT is driven by the required ESR to minimize ripple voltage and load step transients. Typically, once the ESR requirement is satisfied, the capacitance is adequate for filtering. The output ripple (ΔVOUT) is determined by ⎛ 1 ⎞ ∆ VOUT ≈ ∆ IL ⎜ ESR + 8 fOCOUT ⎟⎠ ⎝ where fO = operating frequency, COUT = output capacitance and ΔIL = ripple current in the inductor. The output ripple is highest at maximum input voltage since ΔIL increases with input voltage. With ΔIL = 0.3 • IOUT(MAX) the output ripple will be less than 100mV at maximum VCC and fO = 2.25MHz with ESRCOUT < 150mΩ. Once the ESR requirements for COUT have been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement, except for an all ceramic solution. In surface mount applications, multiple capacitors may have to be paralleled to meet the capacitance, ESR or RMS current handling requirement of the application. Aluminum electrolytic, special polymer, ceramic and solid tantalum capacitors are all available in surface mount packages. The OSCON semiconductor dielectric capacitor available from Sanyo has the lowest ESR (size) product of any aluminum electrolytic at a somewhat higher price. Special polymer capacitors, such as Sanyo POSCAP, Panasonic Special Polymer (SP), and Kemet A700, offer very low ESR, but have a lower capacitance density than other types. Tantalum capacitors have the highest capacitance density, but they have a higher ESR and it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalums, available in case heights ranging from 2mm to 4mm. Aluminum electrolytic capacitors have a significantly higher ESR, and are often used in extremely cost-sensitive applications provided that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have the lowest ESR and cost, but also have the lowest capacitance density, a high voltage and temperature coefficient, and exhibit audible piezoelectric effects. In addition, the high Q of ceramic capacitors along with trace inductance can lead to significant ringing. In most cases, 0.1µF to 1µF of X5R dielectric ceramic capacitors should also be placed close to the LTC3552-1 in parallel with the main capacitors for high frequency decoupling. Ceramic Input and Output Capacitors Higher value, lower cost ceramic capacitors are now becoming available in smaller case sizes. These are tempting for switching regulator use because of their very low ESR. Unfortunately, the ESR is so low that it can cause loop stability problems. Solid tantalum capacitor ESR generates a loop “zero” at 5kHz to 50kHz that is instrumental in giving acceptable loop phase margin. Ceramic capacitors remain capacitive to beyond 300kHz and usually resonate with their ESL before ESR becomes effective. Also, ceramic caps are prone to temperature effects which requires the designer to check loop stability over the operating temperature range. To minimize their high temperature and voltage coefficients, only X5R or X7R ceramic capacitors should be used. A good selection of ceramic capacitors is available from Taiyo Yuden, AVX, Kemet, TDK, and Murata. Great care must be taken when using only ceramic input and output capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output can induce ringing at the VCC pin. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, the ringing at the input can be large enough to damage the part. Since the ESR of a ceramic capacitor is very low, the input and output capacitor must instead fulfill a charge storage requirement. During a load step, the output capacitor must instantaneously supply the current to support the load until the feedback loop raises the switch current enough to support the load. The time required for the feedback loop to respond is dependent on the compensation and the output capacitor size. Typically, 3-4 cycles are required to respond to a load step, but only in the first cycle does the output drop linearly. The output droop, VDROOP, is usually about 2-3 times the linear drop of the first cycle. Thus, a good place to start is with the output capacitor size of approximately: ⎛ ∆ IOUT ⎞ COUT ≈ 2 . 5 ⎜ ⎝ fO • VDROOP ⎟⎠ More capacitance may be required depending on the duty cycle and load step requirements. In most applications, 35521fa 14 LTC3552-1 U W U U APPLICATIO S I FOR ATIO the input capacitor is merely required to supply high frequency bypassing, since the impedance to the supply is very low. A 10µF ceramic capacitor is usually enough for these conditions. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD • ESR, where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT, generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. A feedforward capacitor, CFF, is added externally to improve the high frequency response. Capacitor CFF provides phase lead by creating a high frequency zero with R1, which improves the phase margin. For a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to Application Note 76. In some applications, a more severe transient can be caused by switching loads with large (>1µF) input capacitors. The discharged load input capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem, if the switch connecting the load has low resistance and is driven quickly. The solution is to limit the turn-on speed of the load switch driver. A Hot Swap™ controller is designed specifically for this purpose and usually incorporates current limiting, short-circuit protection, and soft-start. Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Percent efficiency can be expressed as: % Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in LTC3552-1 circuits: 1) VCC quiescent current, 2) switching losses, 3) I2R losses, 4) other losses. 1) The VCC current is the DC supply current given in the Electrical Characteristics which excludes MOSFET driver and control currents. VCC current results in a small (<0.1%) loss that increases with VCC, even at no load. 2) The switching current is the sum of the MOSFET driver and control currents. The MOSFET driver current results from switching the gate capacitance of the power MOSFETs. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VCC to ground. The resulting dQ/dt is a current out of VCC that is typically much larger than the DC bias current. In continuous mode, IGATECHG = fO(QT + QB), where QT and QB are the gate charges of the internal top and bottom MOSFET switches. The gate charge losses are proportional to VCC and thus their effects will be more pronounced at higher supply voltages. 3) I2R losses are calculated from the DC resistances of the internal switches, RSW, and external inductor, RL. In continuous mode, the average output current flows through inductor L, but is “chopped” between the internal top and bottom switches. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (D) as follows: RSW = (RDS(ON)TOP)(D) + (RDS(ON)BOT)(1 – D) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses: I2R losses = IOUT2(RSW + RL) 4) Other “hidden” losses such as copper trace and internal battery resistances can account for additional efficiency degradations in portable systems. It is very important to include these “system” level losses in the design of a system. The internal battery and fuse resistance losses can be minimized by making sure that CIN has adequate Hot Swap is a trademark of Linear Technology Corporation. 35521fa 15 LTC3552-1 U W U U APPLICATIO S I FOR ATIO charge storage and very low ESR at the switching frequency. Other losses include diode conduction losses during dead-time and inductor core losses generally account for less than 2% total additional loss. Thermal Considerations The battery charger’s thermal regulation feature and the switching regulator’s high efficiency make it unlikely that the LTC3552-1 will dissipate enough power to exceed its maximum junction temperature. However, in applications where the LTC3552-1 is running at high ambient temperature with low supply voltage and high duty cycles, the power dissipated may result in excessive junction temperatures. To prevent the LTC3552-1 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated will raise the junction temperature above the maximum rating. The temperature rise is given by: TRISE = PD • θJA where PD is the power dissipated and θJA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: TJ = TRISE + TAMBIENT As an example, consider the case when the battery charger is idle, and both regulators are operating at an input voltage of 2.7V with a load current of 400mA and 800mA and an ambient temperature of 70°C. From the Typical Performance Characteristics graph of Switch Resistance, the RDS(ON) resistance of the main switch is 0.425Ω. Therefore, power dissipated by each regulator is: PD = I2 • RDS(ON) = 272mW and 68mW The DHC16 package junction-to-ambient thermal resistance, θJA, is 40°C/W. Therefore, the junction temperature of the regulator operating in a 70°C ambient temperature is approximately: TJ = (0.272 + 0.068) • 40 + 70 = 83.6°C which is below the absolute maximum junction temperature of 125°C. The majority of the LTC3552-1 power dissipation comes from the battery charger. Fortunately, the LTC3552-1 au- tomatically reduces the charge current during high power conditions using a patented thermal regulation circuit. Thus, it is not necessary to design for worst-case power dissipation scenarios. The conditions that cause the LTC3552-1 to reduce charge current through thermal feedback can be approximated by considering the power dissipated in the IC. The approximate ambient temperature at which the thermal feedback begins to protect the IC is: TA = 120°C – PDθJA TA = 120°C – (PD(CHARGER) + PD(REGULATOR)) • θJA Most of the charger’s power dissipation is generated from the internal charger MOSFET. Thus, the power dissipation is calculated to be: PD(CHARGER) = (VIN – VBAT) • IBAT VIN is the charger supply voltage, VBAT is the battery voltage and IBAT is the charge current. Example: An LTC3552-1 operating from a 5V supply is programmed to supply 800mA full-scale current to a discharged Li-Ion battery with a voltage of 3.3V. For simplicity, assume the regulators are disabled and dissipate no power. The charger power dissipation is calculated to be: PD(CHARGER) = (5V – 3.3V) • 800mA = 1.36W Thus, the ambient temperature at which the LTC3552-1 charger begins to reduce the charge current is approximately: TA = 120°C – 1.36W • 40°C/W TA = 120°C – 54.4°C TA = 65.6°C The LTC3552-1 can be used above 65°C ambient but the charge current will be reduced from the programmed 800mA. The approximate current at a given ambient temperature can be approximated by: 120 °C – TA IBAT = ( VIN – VBAT ) • θ JA Using the previous example with an ambient temperature of 70°C (and no heat dissipation from the regulator), the charge current will be reduced to approximately: 35521fa 16 LTC3552-1 U W U U APPLICATIO S I FOR ATIO IBAT = 120 °C – 70 °C 50 °C = (5V – 3 . 3V) • 40 °C/W 68 °C/A IBAT = 735mA The previous analysis can be repeated to take into account the power dissipation of the regulator by: IBAT = 120 °C – TA − TRISE(REGULATOR) ( VIN – VBAT ) • θ JA However, the regulator typically dissipates significantly less heat than the charger (even in worst-case situations), the calculations here should work well as an approximation. Moreover, when thermal feedback reduces the charge current, the voltage at the PROG pin is also reduced proportionally. It is important to remember that LTC3552-1 applications do not need to be designed for worst-case thermal conditions since the IC will automatically reduce charge current when the junction temperature reaches approximately 120°C. In order to deliver maximum charge current under all conditions, it is critical that the exposed metal pad on the backside of the LTC3552-1 package is soldered to the PC board ground. Failure to make thermal contact between the exposed pad on the backside of the package and the copper board will result in thermal resistances far greater than 40°C/W. As an example, a correctly soldered LTC3552-1 can deliver over 800mA to a battery from a 5V supply at room temperature. Without a good backside thermal connection, this number will drop considerably. Battery Charger Stability Considerations The constant-voltage mode feedback loop is stable with-out an output capacitor, provided a battery is connected to the charger output. With no battery present, an output capacitor on the BAT pin is recommended to reduce ripple voltage. When using high value, low ESR ceramic capacitors, it is recommended to add a 1Ω resistor in series with the capacitor. No series resistor is needed if tantalum capacitors are used. In constant-current mode, the PROG pin is in the feedback loop, not the battery. The constant-current mode stability is affected by the impedance at the PROG pin. With no additional capacitance on the PROG pin, the charger is stable with program resistor values as high as 20k; however, additional capacitance on this node reduces the maximum allowed program resistor. The pole frequency at the PROG pin should be kept above 100kHz. Therefore, if the PROG pin is loaded with a capacitance, CPROG, the following equation can be used to calculate the maximum resistance value for RPROG: 1 RPROG ≤ 2π • 10 5 • CPROG Average, rather than instantaneous charge current may be of interest to the user. For example, when the switching regulators operating in Burst Mode® are connected in parallel with the battery, the average current being pulled out of the BAT pin is typically of more interest than the instantaneous current pulses. In such a case, a simple RC filter can be used on the PROG pin to measure the average battery current, as shown in Figure 3. A 10k resistor has been added between the PROG pin and the filter capacitor to ensure stability. LTC3552-1 10k PROG GND RPROG CFILTER CHARGE CURRENT MONITOR CIRCUITRY 35521 F03 Figure 3. Isolating Capacitive Load on PROG Pin and Filtering VIN Bypass Capacitor Many types of capacitors can be used for input bypassing; however, caution must be exercised when using multilayer ceramic capacitors. Because of the self-resonant and high Q characteristics of some types of ceramic capacitors, high voltage transients can be generated under some start-up conditions such as connecting the charger input to a live power source. Adding a 1.5Ω resistor in series with an X5R ceramic capacitor will minimize start-up voltage transients. For more information, see Application Note 88. Reverse Polarity Input Voltage Protection In some applications, protection from reverse polarity voltage on VIN is desired. If the supply voltage is high enough, a series blocking diode can be used. In Burst Mode is a registered trademark of Linear Technology Corporation. 35521fa 17 LTC3552-1 U U W U APPLICATIO S I FOR ATIO other cases, where the voltage drop must be kept low, a P-channel MOSFET can be used (as shown in Figure 4). DRAIN-BULK DIODE OF FET LTC3552-1 VIN VIN 35521 F04 Figure 4. Low Loss Input Reverse Polarity Protection Design Example As a design example, assume the LTC3552-1 is used in a single lithium-ion battery-powered cellular phone application. Starting with the charger, choosing RPROG to be 1.24k programs the charger for 806mA. A good rule of thumb for ITERMINATE is one tenth the full charge current, so RITERM is picked to be 1.24k (ITERMINATE = 80mA). For the switching regulators powered from the battery, VCC can range from 4.2V to about 2.7V. The load requires a maximum of 800mA in active mode and 2mA in standby mode. Regulator 1 output voltage is 1.8V. Since the load still needs power in standby, Burst Mode operation is used for good low load efficiency. First, calculate the inductor value for about 30% ripple current at maximum VCC: L= 1 . 8V ⎛ 1 . 8V ⎞ 1− = 1 . 9 µH 2 . 25MHz • 240mA ⎜⎝ 4 . 2V ⎟⎠ Choosing a vendor’s closest inductor value of 2.2µH, results in a maximum ripple current of: ∆IL = 1 . 8V ⎛ 1 . 8V ⎞ 1− = 208mA 2 . 25MHz • 2 . 2 µ H ⎜⎝ 4 . 2V ⎟⎠ For cost reasons, a ceramic capacitor will be used. COUT selection is then based on load step droop instead of ESR requirements. For a 5% output droop: 800mA COUT = 2 . 5 = 7 . 1µ F 2 . 25MHz • ( 5 % • 2 . 5V ) A good standard value is 10µF. Since the impedance of a Li-Ion battery is very low, CIN is typically 10µF. Following the same procedure, for VOUT2 = 1.575V, inductor value can be derived as 4.7µH, and output capacitor is 4.7µF. Figure 2 shows the complete schematic for this design example. Board Layout Considerations When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3552-1. These items are also illustrated graphically in the layout diagram of Figure 5. Check the following in your layout: 1. Does the capacitor CIN connect to the power VCC and GND (exposed pad) as closely as possible? This capacitor provides the AC current to the internal power MOSFETs and their drivers. 2. The feedback signals VOUT should be routed away from noisy components and traces, such as the SW line, and its trace should be minimized. 3. Are the COUT and L1 closely connected? The (–) plate of COUT returns current to GND and the (–) plate of CIN. 4. Keep sensitive components away from the SW pins. The input capacitor CIN should be routed away from the SW traces and the inductors. 5. A ground plane is preferred, but if not available, keep the signal and power grounds segregated with small signal components returning to the GND pin at one point and should not share the high current path of CIN or COUT. 6. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. These copper areas should be connected to VCC or GND. LTC3552-1 VOUT2 VIN VCC SW2 SW1 VOUT2 VOUT1 L2 L1 CFF2 COUT2 VFB2 CIN CFF1 VFB1 GND VOUT1 COUT1 CS 3552-1 F05 BOLD LINES INDICATE HIGH CURRENT PATHS Figure 5. Layout Diagram 35521fa 18 LTC3552-1 U U W U APPLICATIO S I FOR ATIO VOUT1 L1 VIN COUT1 CS VIA TO VOUT1 9 VFB1 10 VOUT1 11 VCC 6 7 RUN1 VOUT2 8 5 SW2 VFB2 4 RUN2 12 SW1 3 CHRG 13 PROG 2 17 14 VIN 1 BAT GND ITERM GND GND 15 PWR 16 EN CFF1 CFF2 COUT2 L2 VOUT2 35521 F06 Figure 6. Suggested Layout U TYPICAL APPLICATIO Full-Featured Single-Cell Li-Ion Charger Plus Step-Down Converter VIN 5V VIN RUN1 RUN2 1µF 500mA 1k BAT CHRG 1k PWR 4.7µH VOUT2 1.575V/ 400mA COUT2 10µF CER CFF2 330pF LTC3552-1 EN + 10µF VCC 2.2µH SW2 SW1 VOUT2 VOUT1 VFB2 VFB1 GND ITERM PROG 1k 4.2V 1-CELL Li-Ion BATTERY VOUT1 1.8V/800mA COUT1 10µF CER CFF1 330pF 2k 35521 TA02 U PACKAGE DESCRIPTIO DHC Package 16-Lead Plastic DFN (5mm × 3mm) (Reference LTC DWG # 05-08-1706) 0.65 ±0.05 3.50 ±0.05 1.65 ±0.05 2.20 ±0.05 (2 SIDES) PACKAGE OUTLINE R = 0.115 TYP 5.00 ±0.10 (2 SIDES) R = 0.20 TYP 3.00 ±0.10 (2 SIDES) 1.65 ± 0.10 (2 SIDES) 9 0.40 ± 0.10 16 PIN 1 TOP MARK (SEE NOTE 6) 0.25 ± 0.05 0.50 BSC PIN 1 NOTCH (DHC16) DFN 1103 8 0.200 REF 0.75 ±0.05 4.40 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 0.00 – 0.05 1 0.25 ± 0.05 0.50 BSC 4.40 ±0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 35521fa *OGPSNBUJPO GVSOJTIFE CZ -JOFBS 5FDIOPMPHZ $PSQPSBUJPO JT CFMJFWFE UP CF BDDVSBUF BOE SFMJBCMF )PXFWFSOPSFTQPOTJCJMJUZJTBTTVNFEGPSJUTVTF-JOFBS5FDIOPMPHZ$PSQPSBUJPONBLFTOPSFQSFTFOUB UJPOUIBUUIFJOUFSDPOOFDUJPOPGJUTDJSDVJUTBTEFTDSJCFEIFSFJOXJMMOPUJOGSJOHFPOFYJTUJOHQBUFOUSJHIUT 19 LTC3552-1 U TYPICAL APPLICATIO Li-Ion Charger and Step-Down Converters with PowerPath™ VIN 5V VIN 1k 1µF CHRG 1k 1k RUN1 RUN2 VCC 4.7µF PWR BAT EN 800mA 2.2µH LTC3552-1 VOUT2 1.575V/ 400mA 4.7µH COUT2 10µF CER CFF2 330pF SW2 SW1 VOUT2 VOUT1 VFB2 VFB1 GND ITERM PROG 1k CFF1 330pF + 4.2V 1-CELL Li-Ion BATTERY VOUT1 1.8V/800mA COUT1 10µF CER 1.24k 35521 TA03 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3455 Dual DC/DC Converter with USB Power Management and Li-Ion Battery Charger Efficiency >96%, Accurate USB Current Limiting (500mA/100mA), 4mm × 4mm QFN-24 Package LTC3548 Dual Synchronous, 400mA/800mA, 2.25HMz Step-Down DC/DC Regulator High Efficiency: Up to 95%, IQ: 40μA, 2.25MHz Frequency, MSOP-10 and 3mm × 3mm DFN-10 Packages LTC3550-1 Dual Input USB/AC Adapter Li-Ion Battery Charger with 600mA Synchronous Buck Converter Buck Efficiency: 93%, Charger: Automatic Input Power Detection and Selection, Charge Current: 950mA, USB Compatible, 3mm × 5mm DFN-16 Package LTC4053-4.2 USB Compatible Li-Ion Battery Charger with Thermal Regulation Charges Single-Cell Li-Ion Batteries, From USB, MS Package LTC4054/LTC4054X Standalone Linear Li-Ion Battery Charger with Integrated Pass Transistor in ThinSOTTM Thermal Regulation Prevents Overheating, C/10 Termination, C/10 Indicator, Up to 800mA Charge Current LTC4055 USB Power Controller and Battery Charger Charges Single-Cell Li-Ion Batteries Directly From USB Port, Thermal Regulation, 4mm × 4mm QFN-16 Package LTC4058/LTC4058X Standalone 950mA Lithium-Ion Charger in DFN C/10 Charge Termination, Battery Kelvin Sensing, ±7% Charge Accuracy LTC4061 Standalone Linear Li-Ion Battery Charger with Thermistor Input Charge Current Programmable Up to 1A LTC4066 Standalone Linear Li-Ion Battery Charger with Thermistor Input Charges Single-Cell Li-Ion From USB Port, DFN Package LTC4068/LTC4068X Standalone Linear Li-Ion Battery Charger with Programmable Termination Charge Current Up to 950mA, Thermal Regulation, 3mm × 3mm DFN-8 Package LTC4412 Low-Loss PowerPathTM Controller in ThinSOT VIN: 3V to 28V, Automatic Switching Between DC Sources PowerPath and ThinSOT are registered trademarks of Linear Technology Corporation. 35521fa 20 Linear Technology Corporation LT/LWI 0606 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2006