SY54011R Low Voltage 1.2V/1.8V CML 1:2 Fanout Buffer, 3.2Gbps, 3.2GHz General Description The SY54011R is a fully differential, low voltage 1.2V/1.8V CML 1:2 fanout buffer. It is optimized to provide two identical output copies with less than 15ps of skew and less than 10pspp total jitter. The SY54011R can process clock signals as fast as 3.2GHz or data patterns up to 3.2Gbps. The differential input includes Micrel’s unique, 3-pin input termination architecture that interfaces to LVPECL, LVDS or CML differential signals, (AC- or DC-coupled from a 2.5V driver) as small as 100mV (200mVPP) without any level-shifting or termination resistor networks in the signal path. For AC-coupled input interface applications, an integrated voltage reference (VREF-AC) is provided to bias the VT pin. The outputs are CML, with extremely fast rise/fall times guaranteed to be less than 95ps. The SY54011R operates from a 2.5V ±5% core supply and a 1.8V or 1.2V ±5% output supply and is guaranteed over the full industrial temperature range (–40°C to +85°C). The SY54011R is part of Micrel’s ® high-speed, Precision Edge product line. Datasheets and support documentation can be found on Micrel’s web site at: www.micrel.com. Functional Block Diagram ® Precision Edge Features ∑ 1.2V/1.8V CML 1:2 fanout buffer ∑ Guaranteed AC performance over temperature and voltage: – DC-to- > 3.2Gbps throughput – <300ps propagation delay (IN-to-Q) – <15ps within-device skew – <95ps rise/fall times ∑ Ultra-low jitter design – <1psRMS cycle-to-cycle jitter – <10psPP total jitter – <1psRMS random jitter – <10psPP deterministic jitter ∑ High-speed CML outputs ∑ 2.5V ±5% , 1.8/1.2V ±5% power supply operation ∑ Industrial temperature range: –40°C to +85°C ® ∑ Available in 16-pin (3mm x 3mm) MLF package Applications ∑ ∑ ∑ ∑ Data Distribution: OC-48, OC-48+FEC SONET clock and data distribution Fibre Channel clock and data distribution Gigabit Ethernet clock and data distribution Markets ∑ ∑ ∑ ∑ ∑ ∑ ∑ Storage ATE Test and measurement Enterprise networking equipment High-end servers Access Metro area network equipment Precision Edge is a registered trademark of Micrel, Inc. MLF and MicroLeadFrame are registered trademarks of Amkor Technology. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com March 2008 M9999-033108-A [email protected] or (408) 955-1690 Micrel, Inc. SY54011R Ordering Information(1) Part Number Package Type Operating Range Package Marking Lead Finish SY54011RMG MLF-16 Industrial 011R with Pb-Free bar-line indicator NiPdAu Pb-Free MLF-16 Industrial 011R with Pb-Free bar-line indicator NiPdAu Pb-Free SY54011RMGTR (2) Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only. 2. Tape and Reel. Pin Configuration ® 16-Pin MLF (MLF-16) Pin Description Pin Number Pin Name 1, 4 IN, /IN Differential Input: This input pair is the differential signal input to the device. Input accepts differential signals as small as 100mV (200mVPP). Each input pin internally terminates with 50Ω to the VT pin. 2 VT Input Termination Center-Tap: Each side of the differential input pair terminates to VT pin. This pin provides a center-tap to a termination network for maximum interface flexibility. See “Interface Applications” subsection. 3 VREF-AC Reference Voltage: This output biases to VCC–1.15V. It is used for AC-coupling inputs IN and /IN. Connect VREF-AC directly to the VT pin. Bypass with 0.1µF low ESR capacitor to VCC. Maximum sink/source current is ±0.5mA. See “Input Interface Applications” subsection. 5, 16 VCC Positive Power Supply: Bypass with 0.1uF//0.01uF low ESR capacitors as close to the VCC pins as possible. Supplies input and core circuitry. 8,13 VCCO Output Supply: Bypass with 0.1uF//0.01uF low ESR capacitors as close to the VCCO pins as possible. Supplies the output buffers. 6, 7, 14, 15 GND, Exposed pad 10, 9 /Q1, Q1 11, 12 /Q0, Q0 March 2008 Pin Function Ground: Exposed pad must be connected to a ground plane that is the same potential as the ground pins. CML Differential Output Pairs: Differential buffered copies of the input signal. The output swing is typically 390mV. See “Interface Applications” subsection for termination information. 2 M9999-033108-A [email protected] or (408) 955-1690 Micrel, Inc. SY54011R Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VCC) ................................. –0.5V to +3.0V Supply Voltage (VCCO) ............................... –0.5V to +2.7V VCC - VCCO .................................................................. <1.8V VCCO - VCC .................................................................. <0.5V Input Voltage (VIN) ......................................... –0.5V to VCC CML Output Voltage (VOUT)..................0.6V to VCCO+0.5V Current (VT) Source or sink current on VT pin .................. ±100mA Input Current Source or sink current on (IN, /IN) .................. ±50mA Current (VREF-AC) (4) Source or sink current on VREF-AC ............... ±0.5mA Maximum operating Junction Temperature.............125°C Lead Temperature (soldering, 20sec.) ....................260°C Storage Temperature (Ts) ...................... –65°C to +150°C Supply Voltage (Vcc) ............................ 2.375V to 2.625V (Vcco)………………...……1.14V to 1.9V Ambient Temperature (TA) ..................... –40°C to +85°C (3) Package Thermal Resistance ® MLF Still-air (qJA) .............................................. 75°C/W Junction-to-board (yJB) ........................... 33°C/W DC Electrical Characteristics(5) TA = –40°C to +85°C, unless otherwise stated. Symbol Parameter Condition Min Typ Max Units VCC Power Supply Voltage Range VCC VCCO VCCO 2.375 1.14 1.7 2.5 1.2 1.8 2.625 1.26 1.9 V V V ICC Power Supply Current Max. VCC 15 22 mA ICCO Power Supply Current RIN Input Resistance (IN-to-VT, /IN-to-VT ) No Load. VCCO 32 42 mA 45 50 55 Ω RDIFF_IN Differential Input Resistance (IN-to-/IN) 90 100 110 Ω VIH Input HIGH Voltage (IN, /IN) IN, /IN 1.2 VCC V VIL Input LOW Voltage (IN, /IN) VIL with VIH of 1.2V 0.2 VIH–0.1 V VIH Input HIGH Voltage (IN, /IN) IN, /IN 1.14 VCC V VIL Input LOW Voltage (IN, /IN) VIL with VIH of 1.14V, (1.2V-5%) 0.66 VIH–0.1 V VIN Input Voltage Swing (IN, /IN) see Figure 3a 0.1 1.0 V VDIFF_IN Differential Input Voltage Swing (|IN - /IN|) see Figure 3b 0.2 2.0 V VREF-AC Output Reference Voltage VT_IN Voltage from Input to VT VCC–1.0 V 1.28 V VCC–1.3 VCC–1.15 Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB. yJB and qJA values are determined for a 4-layer board in still-air number, unless otherwise stated. 4. Due to the limited drive capability, use for input of the same package only. 5. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. March 2008 3 M9999-033108-A [email protected] or (408) 955-1690 Micrel, Inc. SY54011R CML Outputs DC Electrical Characteristics(6) VCCO = 1.14V to 1.26V RL = 50Ω to VCCO, VCCO = 1.7V to 1.9V, RL = 50Ω to VCCO or 100Ω across the outputs, VCC = 2.375V to 2.625V. TA = –40°C to +85°C, unless otherwise stated. Symbol Parameter Condition VOH Output HIGH Voltage RL = 50Ω to VCCO VOUT Output Voltage Swing See Figure 3a VDIFF_OUT Differential Output Voltage Swing See Figure 3b ROUT Output Source Impedance Min Typ Max Units VCCO-0.020 VCCO-0.010 VCCO V 300 390 475 mV 600 780 950 mV 45 50 55 Ω Max Units Note: 6. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established AC Electrical Characteristics VCCO = 1.14V to 1.26V RL = 50Ω to VCCO, VCCO = 1.7V to 1.9V, RL = 50Ω to VCCO or 100Ω across the outputs, VCC = 2.375V to 2.625V. TA = –40°C to +85°C, unless otherwise stated. Symbol Parameter Condition fMAX Maximum Frequency NRZ Data Min VOUT > 200mV tPD Propagation Delay tSkew Within Device Skew Note 7 Part-to-Part Skew Note 8 Data Random Jitter tJitter Clock tR tF IN-to-Q Clock Figure 1a Typ 3.2 Gbps 3.2 GHz 150 205 300 ps 3 15 ps 75 ps Note 9 1 psRMS Deterministic Jitter Note 10 10 psPP Cycle-to-Cycle Jitter Note 11 1 psRMS Total Jitter Note 12 10 psPP 95 ps 53 % Output Rise/Fall Times (20% to 80%) At full output swing. Duty Cycle Differential I/O 30 60 47 Notes: 7. Within device skew is measured between two different outputs under identical input transitions. 8. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the respective inputs. 9. Random jitter is measured with a K28.7 pattern, measured at ≤ fMAX. 23 10. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 2 –1 PRBS pattern. 11. Cycle-to-cycle jitter definition: the variation period between adjacent cycles over a random sample of adjacent cycle pairs. tJITTER_CC = Tn –Tn+1, where T is the time between rising edges of the output signal. 12 12. Total jitter definition: with an ideal clock input frequency of ≤ fMAX (device), no more than one output edge in 10 output edges will deviate by more than the specified peak-to-peak jitter value. March 2008 4 M9999-033108-A [email protected] or (408) 955-1690 Micrel, Inc. SY54011R Interface Applications For Input Interface Applications see Figures 4a-f and for CML Output Termination see Figures 5a-d. CML Output Termination with VCCO 1.8V For VCCO of 1.8V, Figure 5a and Figure b, terminate with either 50Ω-to-1.8V or 100Ω differentially across the outputs. AC- or DC-coupling is fine. CML Output Termination with VCCO 1.2V For VCCO of 1.2V, Figure 5a, terminate the output with 50Ω-to-1.2V, DC-coupled, not 100Ω differentially across the outputs. If AC-coupling is used, Figure 5d, terminate into 50Ωto-1.2V before the coupling capacitor and then connect to a high value resistor to a reference voltage. Do not AC couple with internally terminated receiver. For example, 50Ω ANY-IN input. AC-coupling will offset the output voltage by 200mV and this offset voltage will be too low for proper driver operation. Any unused output pair needs to be terminated when VCCO is 1.2V, do not leave floating. Input AC Coupling The SY54011R input can accept AC coupling from any driver. Tie VT to VREF-AC and bypass with a 0.1µF capacitor as shown in Figures 4c and 4d. Timing Diagrams Figure 1a. Propagation Delay March 2008 5 M9999-033108-A [email protected] or (408) 955-1690 Micrel, Inc. SY54011R Typical Characteristics VCC = 2.5V, VCCO = 1.2V, GND = 0V, VIN = 100mV; RL = 50Ω to 1.2V; TA = 25°C, unless otherwise stated. Functional Characteristics 23 VCC = 2.5V, VCCO = 1.2V, GND = 0V, VIN = 100mV; RL = 50Ω to 1.2V, Data Pattern: 2 -1; TA = 25°C, unless otherwise stated. March 2008 6 M9999-033108-A [email protected] or (408) 955-1690 Micrel, Inc. Input SY54011R and Output Stage Figure 2b. Simplified CML Output Buffer Figure 2a. Simplified Differential Input Buffer Single-Ended and Differential Swings Figure 3b. Differential Swing Figure 3a. Single-Ended Swing March 2008 7 M9999-033108-A [email protected] or (408) 955-1690 Micrel, Inc. SY54011R Input Interface Applications Figure 4a. CML Interface (DC-Coupled, 1.8V, 2.5V) Figure 4b. CML Interface (DC-Coupled, 1.2V) Figure 4d. LVPECL Interface (AC-Coupled) Figure 4e. LVPECL Interface (DC-Coupled) March 2008 8 Figure 4c. CML Interface (AC-Coupled) Figure 4f. LVDS Interface M9999-033108-A [email protected] or (408) 955-1690 Micrel, Inc. SY54011R CML Output Termination Figure 5a. 1.2V or 1.8V CML DC-Coupled Termination Figure 5b. 1.8V CML DC-Coupled Termination Figure 5d. CML AC-Coupled Termination (VCCO 1.2V only) Figure 5c. CML AC-Coupled Termination (VCCO 1.8V only) Related Product and Support Documents Part Number Function Datasheet Link HBW Solutions New Products and Termination Application Notes http://www.micrel.com/page.do?page=/productinfo/as/HBWsolutions.shtml March 2008 9 M9999-033108-A [email protected] or (408) 955-1690 Micrel, Inc. SY54011R Package Information ® 16-Pin MLF (3mm x3mm) (MLF-16) MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2008 Micrel, Incorporated. March 2008 10 M9999-033108-A [email protected] or (408) 955-1690