UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A Current Mode PWM Controller FEATURES • Optimized for Off-line and DC to DC Converters • Low Start Up Current (<0.5mA) • Trimmed Oscillator Discharge Current • Automatic Feed Forward Compensation • Pulse-by-Pulse Current Limiting • Enhanced Load Response Characteristics • Under-Voltage Lockout With Hysteresis • Double Pulse Suppression • High Current Totem Pole Output • Internally Trimmed Bandgap Reference • 500kHz Operation • Low RO Error Amp DESCRIPTION The UC1842A/3A/4A/5A family of control ICs is a pin for pin compatible improved version of the UC3842/3/4/5 family. Providing the necessary features to control current mode switched mode power supplies, this family has the following improved features. Start up current is guaranteed to be less than 0.5mA. Oscillator discharge is trimmed to 8.3mA. During under voltage lockout, the output stage can sink at least 10mA at less than 1.2V for VCC over 5V. The difference between members of this family are shown in the table below. UVLO On UVLO Off UC1842A 16.0V 10.0V <100% UC1843A 8.5V 7.9V <100% UC1844A 16.0V 10.0V <50% UC1845A 8.5V 7.9V <50% BLOCK DIAGRAM Note 1: A/B A = DIL-8 Pin Number. B = SO-14 Pin Number. Note 2: Toggle flip flop used only in 1844A and 1845A. 9/94 Maximum Duty Cycle Part # UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A ABSOLUTE MAXIMUM RATINGS (Note 1) CONNECTION DIAGRAMS Supply Voltage (Low Impedance Source) . . . . . . . . . . . . . . 30V Supply Voltage (ICC mA). . . . . . . . . . . . . . . . . . . . . Self Limiting Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1A Output Energy (Capacitive Load) . . . . . . . . . . . . . . . . . . . . . 5µJ Analog Inputs (Pins 2, 3) . . . . . . . . . . . . . . . . . . -0.3V to +6.3V Error Amp Output Sink Current . . . . . . . . . . . . . . . . . . . . 10mA Power Dissipation at TA ≤ 25°C (DIL-8) . . . . . . . . . . . . . . . . 1W Storage Temperature Range . . . . . . . . . . . . . -65°C to +150°C Lead Temperature (Soldering, 10 Seconds) . . . . . . . . . . 300°C Note 1. All voltages are with respect to Ground, Pin 5. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages. Pin numbers refer to DIL package only. DIL-8, SOIC-8 (TOP VIEW) J or N, D8 Package PLCC-20, LCC-20 (TOP VIEW) Q, L Packages SOIC-14 (TOP VIEW) D Package PACKAGE PIN FUNCTION FUNCTION PIN N/C 1 Comp 2 N/C 3-4 VFB 5 N/C 6 ISENSE 7 N/C 8-9 RT/CT 10 N/C 11 Pwr Gnd 12 Gnd 13 N/C 14 Output 15 N/C 16 VC 17 VCC 18 N/C 19 VREF 20 ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for -55°C ≤ TA ≤ 125°C for the UC184xA; -40°C ≤ TA ≤ 85°C for the UC284xA; 0 ≤ TA ≤ 70°C for the UC384xA; VCC = 15V (Note 5); RT = 10k; CT = 3.3nF; TA = TJ; Pin numbers refer to DIL-8. PARAMETER Reference Section Output Voltage Line Regulation Load Regulation Temp. Stability Total Output Variation Output Noise Voltage Long Term Stability Output Short Circuit Oscillator Section Initial Accuracy Voltage Stability Temp. Stability Amplitude Discharge Current TEST CONDITIONS TJ = 25°C, IO = 1mA 12 ≤ VIN ≤ 25V 1 ≤ IO ≤ 20mA (Note 2, Note 7) Line, Load, Temp. 10Hz ≤ f ≤ 10kHz TJ = 25°C (Note 2) TA = 125°C, 1000Hrs. (Note 2) UC184xA\UC284xA MIN. TYP. MAX. UC384xA UNITS MIN. TYP. MAX. 4.95 4.90 4.9 -30 TJ = 25°C (Note 6) 12 ≤ VCC ≤ 25V TMIN ≤ TA ≤ TMAX (Note 2) VPIN 4 peak to peak (Note 2) TJ = 25°C, VPIN 4 = 2V (Note 8) VPIN 4 = 2V (Note 8) 2 5.00 6 6 0.2 47 7.8 7.5 50 5 -100 52 0.2 5 1.7 8.3 5.05 20 25 0.4 5.1 25 -180 5.00 6 6 0.2 4.82 -30 57 1 47 8.8 8.8 7.8 7.6 50 5 -100 52 0.2 5 1.7 8.3 5.10 20 25 0.4 5.18 V mV mV mV/°C V 25 -180 µV mV mA 57 1 8.8 8.8 kHz % % V mA mA UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A ELECTRICAL CHARACTERISTICS (cont.) Unless otherwise stated, these specifications apply for -55°C ≤ TA ≤ 125°C for the UC184xA; -40°C ≤ TA ≤ 85°C for the UC284xA; 0 ≤ TA ≤ 70°C for the UC384xA; VCC = 15V (Note 5); RT = 10k; CT = 3.3nF; TA = TJ; Pin numbers refer to DIL-8. PARAMETER Error Amp Section Input Voltage Input Bias Current AVOL Unity Gain Bandwidth PSRR Output Sink Current Output Source Current VOUT High VOUT Low Current Sense Section Gain Maximum Input Signal PSRR Input Bias Current Delay to Output Output Section Output Low Level Output High Level Rise Time Fall Time UVLO Saturation Under-Voltage Lockout Section Start Threshold Min. Operation Voltage After Turn On PWM Section Maximum Duty Cycle Minimum Duty Cycle Total Standby Current Start-Up Current Operating Supply Current VCC Zener Voltage UC184xA\UC284xA MIN. TYP. MAX. MIN. VPIN 1 = 2.5V 2.45 2.42 2 ≤ VO ≤ 4V TJ = 25°C (Note 2) 12 ≤ VCC ≤ 25V VPIN 2 = 2.7V, VPIN 1 = 1.1V VPIN 2 = 2.3V, VPIN 1 = 5V VPIN 2 = 2.3V, RL = 15k to ground VPIN 2 = 2.7V, RL = 15k to Pin 8 65 0.7 60 2 -0.5 5 (Note 3, Note 4) VPIN 1 = 5V (Note 3) 12 ≤ VCC ≤ 25V (Note 3) 2.85 0.9 TEST CONDITIONS 2.50 -0.3 90 1 70 6 -0.8 6 0.7 2.55 -1 3.15 1.1 VPIN 3 = 0 to 2V (Note 2) 3 1 70 -2 150 ISINK = 20mA ISINK = 200mA ISOURCE = 20mA ISOURCE = 200mA TJ = 25°C, CL = 1nF (Note 2) TJ = 25°C, CL = 1nF (Note 2) VCC = 5V, ISINK = 10mA 0.1 15 13.5 13.5 50 50 0.7 0.4 2.2 150 150 1.2 13 12 65 0.7 60 2 -0.5 5 1.1 2.85 0.9 -10 300 13 12 UC384xA UNITS TYP. MAX. 2.50 -0.3 90 1 70 6 -0.8 6 0.7 2.58 -2 3 1 70 -2 150 3.15 1.1 0.1 15 13.5 13.5 50 50 0.7 0.4 2.2 150 150 1.2 V V V V ns ns V 1.1 -10 300 V µA dB MHz dB mA mA V V V/V V dB µA ns x842A/4A x843A/5A x842A/4A x843A/5A 15 7.8 9 7.0 16 8.4 10 7.6 17 9.0 11 8.2 14.5 7.8 8.5 7.0 16 8.4 10 7.6 17.5 9.0 11.5 8.2 V V V V x842A/3A x844A/5A 94 47 96 48 100 50 0 94 47 96 48 100 50 0 % % % 0.5 17 30 0.3 11 34 0.5 17 30 0.3 11 34 mA mA V VPIN 2 = VPIN 3 = 0V ICC = 25mA VREF (max) − VREF (min) . TJ (max) − TJ (min) VREF (max) and VREF (min) are the maximum & minimum reference voltage measured over the appropriate temperature range. Note that the extremes in voltage do not necessarily occur at the extremes in temperature." Note 8: This parameter is measured with RT = 10kΩ to VREF. This contributes approximately 300µA of current to the measurement. The total current flowing into the RT/CT pin will be approximately 300µA higher than the measured value. Note 2: These parameters, although guaranteed, are not 100% tested in production. Note 3: Parameter measured at trip point of latch with VPIN2 = 0. ∆VPIN 1 Note 4: Gain defined as: A = ; 0 ≤ VPIN 3 ≤ 0.8V. ∆VPIN 3 Note 5: Adjust VCC above the start threshold before setting at 15V. Note 6: Output frequency equals oscillator frequency for the UC1842A and UC1843A. Output frequency is one half oscillator frequency for the UC1844A and UC1845A. Note 7: "Temperature stability, sometimes referred to as average temperature coefficient, is described by the equation: Temp Stability = 3 UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A Error Amp Configuration Error Amp can Source and Sink up to 0.5mA, and Sink up to 2mA. Under-Voltage Lockout During UVLO, the Output is low. Current Sense Circuit Peak Current (IS) is Determined By The Formula 1.0V ISMAX ≈ RS A small RC filter may be required to suppress switch transients. 4 UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A APPLICATIONS DATA (cont.) Output Saturation Characteristics Error Amplifier Open-Loop Frequency Response Oscillator Section Oscillator Frequency vs Timing Resistance Maximum Duty Cycle vs Timing Resistor Open-Loop Laboratory Test Fixture High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to pin 5 in a single point ground. The transistor and 5k potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3. 5 UC1842A/3A/4A/5A UC2842A/3A/4A/5A UC3842A/3A/4A/5A APPLICATIONS DATA (cont.) Off-line Flyback Regulator Power Supply Specifications 1. Input Voltage 2. Line Isolation 3. Switching Frequency 4. Efficiency @ Full Load 5. Output Voltage: A. +5V, ±5%; 1A to 4A load Ripple voltage: 50mV P-P Max B. +12V, ±3%; 0.1A to 0.3A load Ripple voltage: 100mV P-P Max C. -12V ,±3%; 0.1A to 0.3A load Ripple voltage: 100mV P-P Max 95VAC to 130VA (50 Hz/60Hz) 3750V 40kHz 70% Slope Compensation A fraction of the oscillator ramp can be resistively summed with the current sense signal to provide slope compensation for converters requiring duty cycles over 50%. Note that capacitor, C, forms a filter with R2 to suppress the leading edge switch spikes. UNITRODE INTEGRATED CIRCUITS 7 CONTINENTAL BLVD. • MERRIMACK, NH 03054 TEL. (603) 424-2410 • FAX (603)424-3460 6 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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