FAIRCHILD 74LCX86

Revised March 1999
74LCX86
Low Voltage Quad 2-Input Exclusive-OR Gate
with 5V Tolerant Inputs
General Description
Features
The LCX86 contains four 2-input exclusive-OR gates. The
inputs tolerate voltages up to 7V allowing the interface of
5V systems to 3V systems.
■ 5V tolerant inputs
The 74LCX86 is fabricated with advanced CMOS technology to achieve high speed operation while maintaining
CMOS low power dissipation.
■ 2.3V–3.6V VCC specifications provided
■ 6.5 ns tPD max (VCC = 3.3V), 10 µA ICC max
■ Power down high impedance inputs and outputs
■ ±24 mA output drive (VCC = 3.0V)
■ Implements patented noise/EMI reduction circuitry
■ Latch-up performance exceeds 500 mA
■ ESD performance:
Machine model > 2000V
Human model > 200V
Ordering Code:
Order Number
Package Number
74LCX86M
74LCX86SJ
74LCX86MTC
M14A
M14D
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
© 1999 Fairchild Semiconductor Corporation
Description
A0–A3
Inputs
B0–B3
Inputs
O0–O3
Outputs
DS012415.prf
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74LCX86 Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs
March 1995
74LCX86
Absolute Maximum Ratings(Note 1)
Symbol
Parameter
Value
Conditions
VCC
Supply Voltage
−0.5 to +7.0
VI
DC Input Voltage
−0.5 to +7.0
VO
DC Output Voltage
IIK
DC Input Diode Current
IOK
DC Output Diode Current
Units
V
V
−0.5 to VCC + 0.5
Output in HIGH or LOW State (Note 2)
−50
VI < GND
V
mA
−50
VO < GND
+50
VO > VCC
mA
IO
DC Output Source/Sink Current
±50
mA
ICC
DC Supply Current per Supply Pin
±100
mA
IGND
DC Ground Current per Ground Pin
±100
mA
TSTG
Storage Temperature
−65 to +150
°C
Recommended Operating Conditions
Symbol
VCC
(Note 3)
Parameter
Supply Voltage
VI
Input Voltage
VO
Output Voltage
IOH/IOL
Output Current
Min
Max
Operating
2.0
3.6
Data Retention
1.5
3.6
HIGH or LOW State
TA
Free-Air Operating Temperature
∆t/∆V
Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V
Units
V
0
5.5
V
0
VCC
V
VCC = 3.0V − 3.6V
±24
VCC = 2.7V − 3.0V
±12
VCC = 2.3V − 2.7V
±8
mA
−40
85
°C
0
10
ns/V
Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.
Note 2: IO Absolute Maximum Rating must be observed.
Note 3: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
VIH
VIL
VOH
Parameter
Conditions
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
IOH = −100µA
LOW Level Output Voltage
TA = −40°C to +85°C
(V)
Min
2.3 − 2.7
1.7
2.7 − 3.6
2.0
0.7
0.8
VCC - 0.2
2.3
1.8
IOH = −12 mA
2.7
2.2
IOH = −18 mA
3.0
2.4
3.0
2.2
2.3 − 3.6
Units
V
2.3 − 2.7
2.3 − 3.6
IOL = 100µA
Max
2.7 − 3.6
IOH = -8 mA
IOH = −24 mA
VOL
VCC
V
V
0.2
IOL = 8mA
2.3
0.6
IOL = 12 mA
2.7
0.4
IOL = 16 mA
3.0
0.4
V
IOL = 24 mA
3.0
0.55
II
Input Leakage Current
0 ≤ VI ≤ 5.5V
2.3 − 3.6
±5.0
µA
IOFF
Power-Off Leakage Current
VI or VO = 5.5V
0
10
µA
ICC
Quiescent Supply Current
VI = VCC or GND
2.3 − 3.6
10
3.6V ≤ VI ≤ 5.5V
2.3 − 3.6
±10
VIH = VCC −0.6V
2.3 − 3.6
500
∆ICC
Increase in ICC per Input
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2
µA
µA
TA = −40°C to +85°C, RL = 500Ω
Symbol
tPHL
Parameter
Propagation Delay
tPLH
tOSHL
VCC = 3.3V ± 0.3V
VCC = 2.7V
VCC = 2.5V ± 0.2V
CL = 50 pF
CL = 50 pF
CL = 30 pF
Min
Max
Min
Max
Min
Max
1.5
6.5
1.5
7.0
1.5
7.8
1.5
6.5
1.5
7.0
1.5
7.8
Output to Output Skew (Note 4)
1.0
tOSLH
Units
ns
ns
1.0
Note 4: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).
Dynamic Switching Characteristics
Symbol
VOLP
VOLV
Parameter
Quiet Output Dynamic Peak VOL
Quiet Output Dynamic Valley VOL
Conditions
VCC
(V)
TA = 25°C
Typical
CL = 50 pF, VIH = 3.3V, VIL = 0V
3.3
0.8
CL = 30 pF, VIH = 2.5V, VIL = 0V
2.5
0.6
CL = 50 pF, VIH = 3.3V, VIL = 0V
3.3
−0.8
CL = 30 pF, VIH = 2.5V, VIL = 0V
2.5
−0.6
Units
V
V
Capacitance
Typical
Units
CIN
Symbol
Input Capacitance
Parameter
VCC = Open, VI = 0V or VCC
Conditions
7
pF
COUT
Output Capacitance
VCC = 3.3V, VI = 0V or VCC
8
pF
CPD
Power Dissipation Capacitance
VCC = 3.3V, VI = 0V or VCC, f = 10 MHz
25
pF
3
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74LCX86
AC Electrical Characteristics
74LCX86
AC Loading and Waveforms Generic for LCX Family
FIGURE 1. AC Test Circuit
(CL includes probe and jig capacitance)
Test
Switch
tPLH, tPHL
Open
tPZL, tPLZ
6V at VCC = 3.3 ± 0.3V
VCC x 2 at VCC = 2.5 ± 0.2V
tPZH,tPHZ
GND
Waveform for Inverting and Non-Inverting Functions
3-STATE Output Low Enable and
Disable Times for Logic
Propagation Delay, Pulse Width and trec Waveforms
Setup Time, Hold TIme and Recovery TIme for Logic
3-STATE Output High Enable and
Disable TImes for Logic
trise and tfall
FIGURE 2. Waveforms
(Input Pulse Characteristics; f=1MHz, tr=tf=3ns)
Symbol
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VCC
3.3V ± 0.3V
2.7V
2.5V ± 0.2V
Vmi
1.5V
1.5V
Vmo
1.5V
1.5V
VCC/2
Vx
VOL + 0.3V
VOL + 0.3V
VOL + 0.15V
Vy
VOH − 0.3V
VOH − 0.3V
VOH − 0.15V
4
VCC/2
74LCX86
Schematic Diagram Generic for LCX Family
5
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74LCX86
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
Package Number M14A
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
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6
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC14
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
1. Life support devices or systems are devices or systems
device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the
sonably expected to cause the failure of the life support
body, or (b) support or sustain life, and (c) whose failure
device or system, or to affect its safety or effectiveness.
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
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user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
74LCX86 Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)