MICROCHIP TC1232

TC1232
Microprocessor Monitor
Features
General Description
• Precision Voltage Monitor
- Adjustable +4.5V or +4.75V
• Reset Pulse Width – 250 msec minimum
• No External Components
• Adjustable Watchdog Timer
- 150 msec, 600 msec or 1.2 sec
• Operating Voltage 4.0V to 5.5V
• Debounced Manual Reset Input for External
Override
The TC1232 is a fully-integrated processor supervisor
that provides three important functions to safeguard
processor sanity: precision power on/off reset control,
watchdog timer and external reset override.
On power-up, the TC1232 holds the processor in the
reset state for a minimum of 250 msec after VCC is
within tolerance to ensure a stable system start-up.
Microprocessor sanity is monitored by the onboard
watchdog circuit. The microprocessor must provide a
periodic low-going signal on the ST input. Should the
processor fail to supply this signal within the selected
time-out period (150 msec, 600 msec or 1200 msec),
an out-of-control processor is indicated and the
TC1232 issues a processor reset as a result.
Block Diagram
VCC
RST
Tolerance
Select
(5% or 10%)
TOL
+
–
+
+
VREF
–
PB RST
Debounce
TD
Watchdog
Timebase
Select
The outputs of the TC1232 are immediately driven
active when the PB input is brought low by an external
push button switch or other electronic signal. When
connected to a push button switch, the TC1232
provides contact debounce.
RST
The TC1232 is packaged in a space-saving 8-Pin PDIP
or SOIC package, a 16-Pin SOIC (wide) package and
requires no external components.
Reset
Generator
Watchdog
Timer
ST
Package Types
8-Pin PDIP
8 VCC
PB RST 1
TD 2
TOL 3
8-Pin SOIC
TC1232
PB RST
1
8
VCC
TD
2
7
ST
TOL
3
6
RST
GND
4
5
RST
7 ST
6 RST
5
GND 4
16-Pin SOIC (Wide)
RST
TC1232
TC1232
NC
PB RST
NC
TD
NC
TOL
NC
GND
1
2
3
4
5
6
7
8
TC1232
16
15
14
13
12
11
10
9
NC
VCC
NC
ST
NC
RST
NC
RST
Device Features
RST pin
Device
Type
TC1232
Open-drain
RST pin
Pull-up Active
Resistor Level
External
© 2005 Microchip Technology Inc.
Low
Type
Push-pull
Minimum
WDI Input
Trip Points
Reset
MR
Typical
Active
(Max)
Active Time
Input
Timeouts (ms)
Level
(ms)
High
Preliminary
4.75V
or 4.5V
250
150, 600 or
1200
Yes
DS21370C-page 1
TC1232
1.0
ELECTRICAL
CHARACTERISTICS
† Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
Absolute Maximum Ratings†
Voltage on Any Pin (With Respect to GND)
...................................................... -0.3V to +5.8V
Operating Temperature Range:
C-Version ........................................ 0°C to +70°C
E-Version......................................-40°C to +85°C
Storage Temperature Range: ............-65°C to +150°C
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, TA = TMIN to TMAX; VCC = +4.0V to 5.5V.
Parameters
Sym
Min
Typ
Max
Units
Supply Voltage
VCC
4.0
5.0
5.5
V
ST and PB RST Input High Level
VIH
2.0
—
VCC +0.3
V
ST and PB RST Input Low Level
VIL
-0.3
—
+0.8
V
IL
-1.0
—
+1.0
µA
Output Current RST
IOH
-1.0
-12
—
mA
VOH = 2.4V
Current RST, RST
IOL
2.0
10
—
mA
VOL = 0.4V
Operating Current
ICC
—
50
200
µA
Note 2
VCC 5% Trip Point
VCCTP
4.50
4.62
4.74
V
TOL = GND (Note 3)
VCC 10% Trip Point
VCCTP
4.25
4.37
4.49
V
TOL = VCC (Note 3)
Input Leakage ST, TOL
Conditions
Note 1
Capacitance Electrical Characteristics: Unless otherwise noted, TA = +25°C. (Note 4)
Input Capacitance ST, TOL
Output Capacitance RST, RST
Note 1:
2:
3:
4:
CIN
—
—
5
pF
COUT
—
—
7
pF
PB RST is internally pulled up to VCC with an internal impedance of typically 40 kΩ.
Measured with outputs open.
All voltages referenced to GND.
Ensured by design.
DS21370C-page 2
Preliminary
© 2005 Microchip Technology Inc.
TC1232
tF
VCC
tR
+4.75V
+4.75V
+4.25V
+4.25V
VCC
VCC = 5V
4.6V (5% Trip Point)
+4.5V (5% Trip Point)
4.5V(10% Trip Point)
+4.25V (10% Trip Point)
VCC
tRPU
tRPD
RST
RST
RST
Determined by
external Pull-up
resistor
FIGURE 1-1:
VOH
VOH
VOL
Determined by
external Pull-up
resistor
VOL
RST
Rise Time, Fall Time and Reset Detected to Reset Active Timing Waveforms.
AC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, TA = TMIN to TMAX; VCC = +4.0V to 5.5V.
Parameters
VCC Fall Time
VCC Rise Time
Sym
Min
Typ
Max
Units
Conditions
tF
10
—
—
µs
Note 1
tR
0
—
—
µs
Note 1
VCC Trip Point Detected
to RST High and RST Low
tRPD
—
—
100
ns
VCC falling
VCC Trip Point Detected
to RST High and RST Open
tRPU
250
610
1000
ms
VCC rising (Note 2)
Note 1:
2:
Ensured by design.
tR = 5 µs.
© 2005 Microchip Technology Inc.
Preliminary
DS21370C-page 3
TC1232
tPB
ST
tTD
tST
tPBD
PB RST
VIH
VIL
RST (when tTD ≤ tTD (min))
tRST
“H”
RST
(when tTD(min) ≤ tTD ≤ tTD(max))
RST
RST
RST
(when tTD ≥ tTD(max))
The debounced PB RST input ignores input pulses less
than 1 ms and is designed to recognize pulses of
20 ms or greater.
RST (when tTD ≤ tTD(min))
“L”
RST
(when tTD(min) ≤ tTD ≤ tTD(max))
RST
(when tTD ≥ tTD(max))
FIGURE 1-2:
Push Button Reset and Watchdog Timer Reset Timing Waveforms.
AC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, TA = TMIN to TMAX; VCC = +4.0V to 5.5V.
Parameters
Sym
Min
Typ
Max
Units
PB RST Pulse Width
tPB
20
—
—
ms
PB RST Falling Edge Low to
Reset Active
tPBD
1
4
20
ms
PB RST Rising Edge High to
Reset Inactive
tRST
250
610
1000
ms
ST Pulse Width
tST
20
—
—
ns
ST Time-out Period
tTD
62.5
150
250
ms
TD Pin = 0V
250
600
1000
ms
TD Pin = Open
500
1200
2000
ms
TD Pin = VCC
Note 1:
Conditions
Note 1
PB RST must be held low for a minimum of 20 ms to ensure a reset.
DS21370C-page 4
Preliminary
© 2005 Microchip Technology Inc.
TC1232
2.0
TYPICAL PERFORMANCE CURVES
Performance Graphs are not available.
© 2005 Microchip Technology Inc.
Preliminary
DS21370C-page 5
TC1232
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLES
Pin No.
Buffer/
Pin
8-pin
Symbol
Driver
16-pin
Type
PDIP,
Type
SOIC
SOIC
Function
1
2
PB RST
I
ST
Push-button Reset Input.
Input for a Manual Reset Switch. This input debounces (ignores) pulses
less than 1 ms in duration and is ensured to recognize inputs of 20 ms or
greater.
L = Manual Reset Switch is Active, Force RST/RST pins Active
H = Manual Reset Switch is Inactive. State of RST/RST pins determined by
other system conditions.
2
4
TD
I
ST
Time Delay Input.
The voltage level on this input determines the watchdog timer time-out
period.
TD = 0V
→ tTD = 150 ms
TD = Open → tTD = 600 ms
TD = VCC
→ tTD = 1.2 sec
3
6
TOL
I
ST
Tolerance Input.
TOL = GND, Max Voltage Trip Point (VCCTP) = 4.75V (5% tolerance)
TOL = VCC, Max Voltage Trip Point (VCCTP) = 4.5V (10% tolerance)
4
8
GND
—
P
5
9
RST
O
Push
Pull
Reset Output (Active-High)
Goes active (High) if one of these conditions occurs:
1. If VCC falls below the selected reset voltage threshold.
2. If PB RST pin is forced low.
3. If ST pin is not strobed within the minimum selected time-out period.
(see TD pin)
4. During power-up
6
11
RST
O
Open
Drain
Reset Output (Active-Low)
Goes active (Low) if one of these conditions occurs:
1. If VCC falls below the selected reset voltage threshold.
2. If PB RST pin is forced low.
3. If ST pin is not strobed within the minimum selected time-out period.
(see TD pin)
4. During power-up
7
13
ST
I
ST
8
15
VCC
—
P
The positive supply (+5V) for the device.
—
1,3,5,
7,10,1
2,16
NC
—
—
No internal connection.
DS21370C-page 6
The ground reference for the device.
Strobe Input
Input for Watchdog Timer. WDT period determined by state of TD pin
Falling Edge → Resets Watchdog Timer counter (no time-out)
Preliminary
© 2005 Microchip Technology Inc.
TC1232
4.0
OPERATIONAL DESCRIPTION
4.1
Power Monitor
VCC = 5V
+4.5V (5% Trip Point)
The TC1232 provides the function of warning the
processor of a power failure. When VCC is detected as
being below the voltage levels defined by the TOL pin,
the TC1232’s comparator outputs the RST and RST
signals to a logic level that warns the system of an outof-tolerance power supply. The RST and RST signals
switch at a threshold value of 4.5V if TOL is tied to VCC,
and at a value of 4.75 volts if TOL is grounded. The
RST and RST signals are held active for a minimum of
250 ms to ensure that the power supply voltage has
been stabilized.
+4.25V (10% Trip Point)
tRPD
RST
VOH
RST
Figure 4-1 shows the VCC fall time.
Figure 4-2 shows the VCC rise time.
VOL
VCC SLEW RATE = 1.66 mV/µs (0.5V/300 µs)
Figure 4-3 shows the time from when the voltage trip
point is detected to the reset output pin going active.
Figure 4-4 shows the time from when the voltage trip
point is exited to the reset output pin going inactive.
FIGURE 4-3:
VCC Detect Reset Output
Delay (Power-Down).
4.6V (5% Trip Point)
tF
VCC
4.5V(10% Trip Point)
+4.75V
VCC
+4.25V
tRPU
RST
VOH
FIGURE 4-1:
Power-Down Slew Rate.
RST
VOL
FIGURE 4-4:
VCC Detect Reset Output
Delay (Power-Up).
tR
+4.75V
+4.25V
VCC
FIGURE 4-2:
Power-up Slew Rate.
© 2005 Microchip Technology Inc.
Preliminary
DS21370C-page 7
TC1232
4.2
Push Button Reset Input
+5V
The debounced manual reset input (PB RST) manually
forces the reset outputs into their active states.
Figure 4-5 shows a block diagram for using the
TC1232 with a push button switch.
VCC
Once PB RST has been low for a time tPBD (the pushbutton delay time), the reset outputs go active. The
reset outputs remain in their active states for a
minimum of 250 ms after PB RST rises above VIH.
Figure 4-6 shows a waveform for the push button
switch input and the reset pins output.
A mechanical push button or active logic signal can
drive the PB RST input. The debounced input ignores
input pulses less than 1 ms and recognizes pulses of
20 ms or greater. No external pull-up resistor is
required because the PB RST input has an internal
pull-up to VCC of approximately 100 µA.
TD
ST
PB RST
TC1232
I/O
Microprocessor
RST
Reset
GND TOL
FIGURE 4-5:
Watchdog Timer.
Push Button Reset and
tPB
PB RST
tPBD
VIH
VIL
tRST
RST
RST
The debounced PB RST input ignores input pulses less
than 1 ms and is designed to recognize pulses of
20 ms or greater.
FIGURE 4-6:
PB RST Input.
DS21370C-page 8
Preliminary
Push Button Reset –
© 2005 Microchip Technology Inc.
TC1232
4.3
Watchdog Timer
When the ST input is not stimulated for a preset time
period, the watchdog timer function forces RST and
RST signals to the active state. The preset time period
is determined by the TD inputs to be 150 ms with TD
connected to ground, 600 ms with TD floating or
1200 ms with TD connected to VCC (typ.). The
watchdog timer starts timing-out from the set time
period as soon as RST and RST are inactive. If a highto-low transition occurs on the ST input pin prior to
time-out, the watchdog timer is reset and begins to
time-out again. If the watchdog timer is allowed to timeout, the RST and RST signals are driven to the active
state for 250 ms, minimum (Figure 4-7).
Figure 4-8 shows the expected reset output pin waveforms depending on the period of the ST pin falling
edge and the state of the TD input pin.
ST
RST (when tTD ≤ tTD (min))
TABLE 4-1:
WATCHDOG TIMER
PERIODS
tTD
Min
Condition
Typ
Max
TD pin = 0V
62.5 ms
150 ms
250 ms
TD pin = Open
250 ms
600 ms
1000 ms
TD pin = VCC
500 ms
1200 ms
2000 ms
“H”
RST
(when tTD(min) ≤ tTD ≤ tTD(max))
The software routine that strobes ST is critical. The
code must be in a section of software that is executed
frequently enough so the time between toggles is less
than the watchdog time-out period. One common
technique controls the microprocessor I/O line from two
sections of the program. The software might set the I/O
line high while operating in the Foreground mode and
set it low while in the Background or Interrupt modes. If
both modes do not execute correctly, the watchdog
timer issues reset pulses.
tTD is the maximum elapsed time between ST high-tolow transitions (ST is activated by falling edges only),
which will keep the watchdog timer from forcing the
reset outputs active for a time of tRST. tTD is a function
of the voltage at the TD pin, as tabulated below:
tTD
tST
RST
(when tTD ≥ tTD(max))
RST (when tTD ≤ tTD(min))
“L”
RST
(when tTD(min) ≤ tTD ≤ tTD(max))
RST
(when tTD ≥ tTD(max))
FIGURE 4-8:
4.4
Strobe Input.
Supply Monitor Noise Sensitivity
The TC1232 is optimized for fast response to negativegoing changes in VDD. Systems with an inordinate
amount of electrical noise on VDD (such as systems
using relays) may require a 0.01 µF or 0.1 µF bypass
capacitor to reduce detection sensitivity. This capacitor
should be installed as close to the TC1232 as possible
to keep the capacitor lead length short.
Figure 4-7 shows a block diagram for using the
TC1232 with a PICmicro® MCU and the Watchdog
input.
+5V
10 kΩ
3-Terminal
Regulator
(example:
MCP1700)
+5V
0.1
µF
VCC
RST
TC1232
ST
RESET
PICmicro®
MCU
I/O
TD TOL GND
FIGURE 4-7:
Watchdog Timer.
© 2005 Microchip Technology Inc.
Preliminary
DS21370C-page 9
TC1232
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
8-Lead PDIP (300 mil)
XXXXXXXX
XXXXXNNN
YYWW
TC1232
I/P256
0518
8-Lead SOIC (150 mil)
XXXXXXXX
XXXXYYWW
NNN
XXXXXXXXXXXXX
XXXXXXXXXXXXX
YYWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
DS21370C-page 10
TC1232
e3
CPA^^256
0518
OR
Examples:
TC1232
COA0518
256
16-Lead SOIC (150 mil)
Note:
Examples:
TC1232E
e3
OA^^0518
256
OR
Examples:
TC1232COE
XXXXXXXXXX
0518256
OR
e3
TC1232COE^^
XXXXXXXXXX
0518256
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Preliminary
© 2005 Microchip Technology Inc.
TC1232
8-Lead Plastic Dual In-line (PA) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
p
eB
B
Units
Dimension Limits
n
p
Number of Pins
Pitch
Top to Seating Plane
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
L
c
§
B1
B
eB
α
β
MIN
.140
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
5
INCHES*
NOM
MAX
8
.100
.155
.130
.170
.145
.313
.250
.373
.130
.012
.058
.018
.370
10
10
.325
.260
.385
.135
.015
.070
.022
.430
15
15
MILLIMETERS
NOM
8
2.54
3.56
3.94
2.92
3.30
0.38
7.62
7.94
6.10
6.35
9.14
9.46
3.18
3.30
0.20
0.29
1.14
1.46
0.36
0.46
7.87
9.40
5
10
5
10
MIN
MAX
4.32
3.68
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
© 2005 Microchip Technology Inc.
Preliminary
DS21370C-page 11
TC1232
8-Lead Plastic Small Outline (OA) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
h
α
45°
c
A2
A
φ
β
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
h
L
φ
c
B
α
β
MIN
.053
.052
.004
.228
.146
.189
.010
.019
0
.008
.013
0
0
A1
INCHES*
NOM
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
.009
.017
12
12
MAX
.069
.061
.010
.244
.157
.197
.020
.030
8
.010
.020
15
15
MILLIMETERS
NOM
8
1.27
1.35
1.55
1.32
1.42
0.10
0.18
5.79
6.02
3.71
3.91
4.80
4.90
0.25
0.38
0.48
0.62
0
4
0.20
0.23
0.33
0.42
0
12
0
12
MIN
MAX
1.75
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
0.25
0.51
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
DS21370C-page 12
Preliminary
© 2005 Microchip Technology Inc.
TC1232
16-Lead Plastic Small Outline (OE) – Wide, 300 mil (SOIC)
E
p
E1
D
2
1
n
B
h
α
45°
c
A2
A
φ
β
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
h
L
φ
c
B
α
β
MIN
.093
.088
.004
.394
.291
.398
.010
.016
0
.009
.014
0
0
A1
INCHES*
NOM
16
.050
.099
.091
.008
.407
.295
.406
.020
.033
4
.011
.017
12
12
MAX
.104
.094
.012
.420
.299
.413
.029
.050
8
.013
.020
15
15
MILLIMETERS
NOM
16
1.27
2.36
2.50
2.24
2.31
0.10
0.20
10.01
10.34
7.39
7.49
10.10
10.30
0.25
0.50
0.41
0.84
0
4
0.23
0.28
0.36
0.42
0
12
0
12
MIN
MAX
2.64
2.39
0.30
10.67
7.59
10.49
0.74
1.27
8
0.33
0.51
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-013
Drawing No. C04-102
© 2005 Microchip Technology Inc.
Preliminary
DS21370C-page 13
TC1232
NOTES:
DS21370C-page 14
Preliminary
© 2005 Microchip Technology Inc.
TC1232
APPENDIX A:
REVISION HISTORY
Revision C (June 2005)
The following is the list of modifications:
1.
2.
3.
4.
Since no data is given in Section 2.0 “Typical
Performance Curves”, “Preliminary” was
added to the bottom of this document.
Corrected Operating Voltage in the Electrical
Specifications
General Data Sheet Enhancements
Added Revision History Appendix Section
Revision B (March 2003)
• Not logged
Revision A (March 2002)
• Original Release of this Document.
© 2005 Microchip Technology Inc.
Preliminary
DS21370C-page 15
TC1232
NOTES:
DS21370C-page 16
Preliminary
© 2005 Microchip Technology Inc.
TC1232
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
Examples:
/XX
Temperature
Range
Package
Device:
TC1232:
Microprocessor Monitor
Temperature Range:
C
E
Package:
PA
= Plastic DIP (300 mil Body), 8-lead
OA
= Plastic SOIC, (150 mil Body), 8-lead
OA713 = Plastic SOIC, (150 mil Body), 8-lead
Tape and Reel
OE
= Plastic SOIC (300 mil Body), 16-lead
OE713 = Plastic SOIC (300 mil Body), 16-lead
Tape and Reel
=
0°C to +70°C
= -40°C to +85°C
© 2005 Microchip Technology Inc.
Preliminary
a) TC1232COA:
0°C to +70°C, 8L-SOIC
b) TC1232COA713: 0°C to +70°C, 8L-SOIC,
Tape and Reel
c) TC1232COE:
0°C to +70°C, 16L-SOIC
d) TC1232COE713: 0°C to +70°C, 16L-SOIC
Tape and Reel
e) TC1232CPA:
0°C to +70°C, 8L-PDIP
f) TC1232EOA:
-40°C to +85°C,
8L-SOIC
g) TC1232EOA713: -40°C to +85°C,
8L-SOIC,
Tape and Reel
h) TC1232EOE:
-40°C to +85°C,
16L-SOIC
i) TC1232EOE713: -40°C to +85°C,
16L-SOIC,
Tape and Reel
j) TC1232EPA:
-40°C to +85°C,
8L-PDIP
DS21370C-page 17
TC1232
NOTES:
DS21370C-page 18
Preliminary
© 2005 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
its use. Use of Microchip’s products as critical components in
life support systems is not authorized except with express
written approval by Microchip. No licenses are conveyed,
implicitly or otherwise, under any Microchip intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro,
PICSTART, PRO MATE, PowerSmart, rfPIC, and
SmartShunt are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
PICMASTER, SEEVAL, SmartSensor and The Embedded
Control Solutions Company are registered trademarks of
Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Linear Active Thermistor,
MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM,
PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo,
PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode,
Smart Serial, SmartTel, Total Endurance and WiperLock are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2005, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2005 Microchip Technology Inc.
Preliminary
DS21370C-page 19
WORLDWIDE SALES AND SERVICE
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04/20/05
DS21370C-page 20
Preliminary
© 2005 Microchip Technology Inc.