AMIS-30663 High Speed CAN Transceiver Introduction http://onsemi.com PIN ASSIGNMENT TxD GND VCC 1 V33 AMIS 30663 The AMIS−30663 CAN transceiver is the interface between a controller area network (CAN) protocol controller and the physical bus and may be used in both 12 V and 24 V systems. The digital interface level is powered from a 3.3 V supply providing true I/O voltage levels for 3.3 V CAN controllers. The transceiver provides differential transmit capability to the bus and differential receive capability to the CAN controller. Due to the wide common−mode voltage range of the receiver inputs, the AMIS−30663 is able to reach outstanding levels of electromagnetic susceptibility (EMS). Similarly, extremely low electromagnetic emission (EME) is achieved by the excellent matching of the output signals. CANH CANL VREF RxD (Top View) Key Features • • • • • • • • • • • • • • Fully Compatible with the “ISO 11898−2” Standard Certified “Authentication on CAN Transceiver Conformance (d1.1)” High Speed (up to 1 Mbit/s) Ideally Suited for 12 V and 24 V Industrial and Automotive Applications Low EME Common−mode−choke is No Longer Required Differential Receiver with Wide Common−mode Range (±35 V) for High EMS No Disturbance of the Bus Lines with an Un−powered Node Transmit Data (TxD) Dominant Time−out Function Thermal Protection Bus Pins Protected Against Transients in an Automotive Environment Short Circuit Proof to Supply Voltage and Ground Logic Level Inputs Compatible with 3.3 V Devices ESD Protection Level for CAN Bus up to ±8 kV This is a Pb−Free Device Table 1. Ordering Information Container Part Number Shipping Configuration† Quantity Temp. Range SOIC−8 GREEN Tube/Tray 96 −40°C to 125°C SOIC−8 GREEN Tape & Reel 3000 −40°C to 125°C Description Package AMIS30663CANG2G HS CAN Transc. (3.3 V) AMIS30663CANG2RG HS CAN Transc. (3.3 V) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2009 January, 2009 − Rev. 6 1 Publication Order Number: AMIS−30663/D AMIS−30663 Table of Contents Page Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Key Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Technical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin List and Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Measurement Set−ups and Definitions . . . . . . . . . . . . . . . 8 Soldering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 VCC 3 Thermal shutdown V33 7 Timer TxD ’S’ V33 6 Driver control 1 CANH CANL 8 AMIS−30663 RxD VREF Ri(cm) COMP 4 VCC VCC/2 + Ri(cm) 5 2 GND Figure 1. Block Diagram Table 2. Technical Characteristics Symbol Parameter Conditions Min Max Unit VCANH DC voltage at pin CANH 0 < VCC < 5.25 V; no time limit −45 +45 V VCANL DC voltage at pin CANL 0 < VCC < 5.25 V; no time limit −45 +45 V Vo(dif)(bus_dom) Differential bus output voltage in dominant state 42.5 W < RLT < 60 W 1.5 3 V tpd(rec−dom) Propagation delay TxD to RxD Figure 7 100 230 ns tpd(dom−rec) Propagation delay TxD to RxD Figure 7 100 245 ns CM−range Input common−mode range for comparator Guaranteed differential receiver threshold and leakage current −35 +35 V VCM−peak Common−mode peak Figures 8 and 9 (Note 1) −500 500 mV VCM−step Common−mode step Figures 8 and 9 (Note 1) −150 150 mV 1. The parameters VCM−peak and VCM−step guarantee low EME. http://onsemi.com 2 AMIS−30663 Typical Application VBAT IN 5V−reg 60 W OUT 60 W 47 nF IN 3.3V− reg OUT VCC V33 RxD VCC 8 3 7 4 CAN BUS CANH AMIS− VREF 30663 5 CAN controller TxD 1 6 CANL 2 GND GND Figure 2. Application Diagram 1 8 V33 GND 2 7 CANH VCC 3 6 CANL RxD 4 5 VREF AMIS− 30663 TxD (top view) Figure 3. Pin Configuration Table 3. Pin Out Pin Name 1 TxD Transmit data input; low input → dominant driver; internal pull−up current Description 2 GND Ground 3 VCC Supply voltage 4 RxD Receive data output; dominant transmitter → low output 5 VREF Reference voltage output 6 CANL LOW−level CAN bus line (low in dominant mode) 7 CANH HIGH−level CAN bus line (high in dominant mode) 8 V33 3.3 V supply for digital I/O http://onsemi.com 3 60 W 60 W 47 nF AMIS−30663 Functional Description General Operating Modes The AMIS−30663 is the interface between the CAN protocol controller and the physical bus. It is intended for use in automotive and industrial applications requiring baud rates up to 1 Mbaud. It provides differential transmit capability to the bus and differential receiver capability to the CAN protocol controller. It is fully compatible to the “ISO 11898−2” standard. AMIS−30663 only operates in high−speed mode as illustrated in Table 4. The transceiver is able to communicate via the bus lines. The signals are transmitted and received to the CAN controller via the pins TxD and RxD. The slopes on the bus lines outputs are optimised to give extremely low EME. Table 4. Function Table (X = don’t care) Pin Mode TxD Bus RxD State CANH CANL 0 0 Dominant High Low 1 1 Recessive 0.5 Vcc 0.5 Vcc X 1 Recessive 0 < VCANH < VCC 0 < VCANL < VCC 1 Recessive 0 < VCANH < VCC 0 < VCANL < VCC 4.75 V < Vcc < 5.25 V High Speed Vcc < PORL − PORL < Vcc < 4.75 V − > VIH Over−temperature Detection Should TxD become disconnected, this pin is pulled high internally. When the Vcc supply is removed, pins TxD and RxD will be floating. This prevents the AMIS−30663 from being supplied by the CAN controller through the I/O pins. A thermal protection circuit protects the IC from damage by switching off the transmitter if the junction temperature exceeds a value of approximately 160°C. Because the transmitter dissipates most of the power, the power dissipation and temperature of the IC is reduced. All other IC functions continue to operate. The transmitter off−state resets when pin TxD goes HIGH. The thermal protection circuit is particularly needed when a bus line short circuits. 3.3 V Interface AMIS−30663 may be used to interface with 3.3 V or 5 V controllers by use of the V33 pin. This pin may be supplied with 3.3 V or 5 V to have the corresponding digital interface voltage levels. When the V33 pin is supplied at 2.5 V, even interfacing with 2.5 V CAN controllers is possible. See also Digital Output Characteristics @ V33 = 2.5 V, Table 8. In this case a pull resistor from TxD to V33 is necessary. TxD Dominant Time−out Function A TxD dominant time−out timer circuit prevents the bus lines from being driven to a permanent dominant state (blocking all network communication) if pin TxD is forced permanently LOW by a hardware and/or software application failure. The timer is triggered by a negative edge on pin TxD. If the duration of the LOW−level on pin TxD exceeds the internal timer value tdom, the transmitter is disabled, driving the bus into a recessive state. The timer is reset by a positive edge on pin TxD. Electrical Characteristics Definitions All voltages are referenced to GND (pin 2). Positive currents flow into the IC. Sinking current means that the current is flowing into the pin. Sourcing current means that the current is flowing out of the pin. Fail−safe Features A current−limiting circuit protects the transmitter output stage from damage caused by accidental short−circuit to either positive or negative supply voltage − although power dissipation increases during this fault condition. The pins CANH and CANL are protected from automotive electrical transients (according to “ISO 7637”; see Figure 4). Absolute Maximum Ratings Stresses above those listed in Table 5 may cause permanent device failure. Exposure to absolute maximum ratings for extended periods may effect device reliability. http://onsemi.com 4 AMIS−30663 Table 5. Absolute Maximum Ratings Symbol Parameter Conditions Min. Max. Unit VCC Supply voltage −0.3 +7 V V33 I/O interface voltage −0.3 +7 V −45 +45 V VCANH DC voltage at pin CANH 0 < VCC < 5.25 V; no time limit VCANL DC voltage at pin CANL 0 < VCC < 5.25 V; no time limit −45 +45 V VTxD DC voltage at pin TxD −0.3 VCC + 0.3 V VRxD DC voltage at pin RxD −0.3 VCC + 0.3 V VREF DC voltage at pin VREF −0.3 VCC + 0.3 V Vtran(CANH) Transient voltage at pin CANH (Note 2) −150 +150 V Vtran(CANL) Transient voltage at pin CANL (Note 2) −150 +150 V Vtran(VREF) Transient voltage at pin VREF (Note 2) −150 +150 V Electrostatic discharge voltage at CANH and CANL pin (Note 3) (Note 6) −8 −500 +8 +500 kV V Electrostatic discharge voltage at all other pins (Note 4) (Note 6) −4 −250 +4 +250 kV V Static latch−up at all pins (Note 5) 100 mA Vesd(CANL/CANH) Vesd Latch−up Tstg Storage temperature −55 +155 °C Tamb Ambient temperature −40 +125 °C Tjunc Maximum junction temperature −40 +150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 2. Applied transient waveforms in accordance with “ISO 7637 part 3”, test pulses 1, 2, 3a and 3b (see Figure 4). 3. Standardized human body model system ESD pulses in accordance to IEC 1000.4.2. 4. Standardized human body model ESD pulses in accordance to MIL883 method 3015. Supply pin 8 is ±4 kV. 5. Static latch−up immunity: static latch−up protection level when tested according to EIA/JESD78. 6. Standardized charged device model ESD pulses when tested according to EOS/ESD DS5.3−1993. Table 6. Thermal Characteristics Symbol Parameter Conditions Value Unit Rth(vj−a) Thermal resistance from junction to ambient in SO8 package In free air 145 K/W Rth(vj−s) Thermal resistance from junction to substrate of bare die In free air 45 K/W Typ. Max. Unit 45 4 65 8 mA V33 = 3.3 V; CL = 20 pF; recessive 1 mA V33 = 3.3 V; CL = 20 pF; 1 Mbps 170 mA Table 7. DC Characteristics (VCC = 4.75 to 5.25 V; V33 = 2.9 V to 3.6 V; Tjunc = −40 to +150°C; RLT = 60 W unless specified otherwise.) Parameter Symbol Conditions Min. Supply (pin VCC and pin V33) ICC Supply current Dominant; VTXD = 0 V Recessive; VTXD = VCC I33 I/O interface current I33 I/O interface current (Note 7) Transmitter Data Input (pin TxD) VIH HIGH−level input voltage Output recessive 2.0 − VCC V VIL LOW−level input voltage Output dominant −0.3 − +0.8 V IIH HIGH−level input current VTxD = V33 −1 0 +1 mA IIL LOW−level input current VTxD = 0 V −50 −200 −300 mA 7. Not tested on ATE. http://onsemi.com 5 AMIS−30663 Table 7. DC Characteristics (VCC = 4.75 to 5.25 V; V33 = 2.9 V to 3.6 V; Tjunc = −40 to +150°C; RLT = 60 W unless specified otherwise.) Symbol Parameter Conditions Min. Typ. Max. Unit − 5 10 pF 0.7 x V33 0.75 x V33 Transmitter Data Input (pin TxD) Ci Input capacitance (Note 7) Receiver Data Output (pin RxD) VOH HIGH−level output voltage IRXD = − 10 mA VOL LOW−level output voltage IRXD = 5 mA Ioh HIGH−level output current (Note 7) VRxD = 0.7 x V33 Iol LOW−level output current (Note 7) VRxD = 0.45 V V 0.18 0.35 V −10 −15 −20 mA 5 10 15 mA Reference Voltage Output (pin VREF) VREF Reference output voltage −50 mA < IVREF < +50 mA 0.45 x VCC 0.50 x VCC 0.55 x VCC V VREF_CM Reference output voltage for full common−mode range −35 V < VCANH < +35 V; 0.40 x VCC 0.50 x VCC 0.60 x VCC V −35 V < VCANL < +35 V Bus Lines (pins CANH and CANL) Vo(reces)(CANH) Recessive bus voltage at pin CANH VTxD = VCC; no load 2.0 2.5 3.0 V Vo(reces)(CANL) Recessive bus voltage at pin CANL VTxD = VCC; no load 2.0 2.5 3.0 V Io(reces) (CANH) Recessive output current at pin CANH −35 V < VCANH < +35 V; 0 V < VCC < 5.25 V −2.5 − +2.5 mA Io(reces) (CANL) Recessive output current at pin CANL −35 V < VCANL < +35 V; 0 V < VCC < 5.25 V −2.5 − +2.5 mA Vo(dom) (CANH) Dominant output voltage at pin CANH VTxD = 0 V 3.0 3.6 4.25 V Vo(dom) (CANL) Dominant output voltage at pin CANL VTxD = 0 V 0. 5 1.4 1.75 V Vo(dif) (bus) Differential bus output voltage (VCANH − VCANL) VTxD = 0 V; dominant; 42.5 W < RLT < 60 W 1.5 2.25 3.0 V VTxD = VCC; recessive; no load −120 0 +50 mV Io(sc) (CANH) Short circuit output current at pin CANH VCANH = 0 V; VTxD = 0 V −45 −70 −95 mA Io(sc) (CANL) Short circuit output current at pin CANL VCANL = 36 V; VTxD = 0 V 45 70 120 mA Vi(dif)(th) Differential receiver threshold voltage −5 V < VCANL < +12 V; 0.5 0.7 0.9 V −35 V < VCANL < +35 V; 0.25 0.7 1.05 V −35 V < VCANL < +35 V; 50 70 100 mV −5 V < VCANH < +12 V; see Figure 5 Vihcm(dif) (th) Vi(dif) (hys) Differential receiver threshold voltage for high common−mode −35 V < VCANH < +35 V; see Figure 5 Differential receiver input voltage hysteresis −35 V < VCANH < +35 V; see Figure 5 Bus Lines (pins CANH and CANL) Ri(cm)(CANH) Common−mode input resistance at pin CANH 15 25 37 KW Ri(cm) (CANL) Common−mode input resistance at pin CANL 15 25 37 KW Ri(cm)(m) Matching between pin CANH and pin CANL common−mode input resistance −3 0 +3 % VCANH = VCANL 7. Not tested on ATE. http://onsemi.com 6 AMIS−30663 Table 7. DC Characteristics (VCC = 4.75 to 5.25 V; V33 = 2.9 V to 3.6 V; Tjunc = −40 to +150°C; RLT = 60 W unless specified otherwise.) Symbol Parameter Conditions Min. Typ. Max. Unit 25 50 75 KW 7.5 20 pF Bus Lines (pins CANH and CANL) Ri(dif) Differential input resistance Ci(CANH) Input capacitance at pin CANH VTxD = VCC; not tested Ci(CANL) Input capacitance at pin CANL VTxD = VCC; not tested 7.5 20 pF Ci(dif) Differential input capacitance VTxD = VCC; not tested 3.75 10 pF ILI(CANH) Input leakage current at pin CANH VCC = 0 V; VCANH = 5 V 10 170 250 mA ILI(CANL) Input leakage current at pin CANL VCC = 0 V; VCANL = 5 V 10 170 250 mA VCM−peak Common−mode peak during transition from dom → rec or rec → dom Figures 8 and 9 −500 500 mV VCM−step Difference in common−mode between dominant and recessive state Figures 8 and 9 −150 150 mV CANH, CANL, Vref in tri− state below POR level 2.2 3.5 4.7 V 150 160 180 °C Power on Reset PORL POR level Thermal Shutdown Tj(sd) shutdown junction temperature Timing Characteristics (see Figures 6 and 7) td(TxD−BUSon) Delay TxD to bus active 40 85 110 ns td(TxD−BUSoff) Delay TxD to bus inactive 30 60 110 ns td(BUSon−RxD) Delay bus active to RxD 25 55 110 ns td(BUSoff−RxD) Delay bus inactive to RxD 65 100 135 ns tpd(rec−dom) Propagation delay TxD to RxD from recessive to dominant 100 230 ns td(dom−rec) Propagation delay TxD to RxD from dominant to recessive 100 245 ns tdom(TxD) TxD dominant time for time out 450 750 ms Typ. Max. Unit VTxD = 0 V 250 7. Not tested on ATE. Table 8. Digital Output Characteristics @ V33 = 2.5 V (VCC = 4.75 to 5.25 V; V33 = 2.5 V ±5%; Tjunc = −40 to +150°C; RLT = 60 W unless specified otherwise.) Parameter Symbol Conditions Min. Receiver Data Output (pin RxD) Ioh HIGH−level output current VOH > 0.9 x V33 Iol LOW−level output current VOL < 0.1 x V33 http://onsemi.com 7 −2.6 mA 4 mA AMIS−30663 Measurement Set−ups and Definitions +3.3 V 100 nF +5 V VCC 100 nF V33 3 8 7 TxD 1 RxD 1 nF AMIS− 30663 4 5 6 2 20 pF CANH VREF Transient Generator 1 nF CANL GND Figure 4. Test Circuit for Automotive Transients V RxD High Low Hysteresis 0,9 0,5 V i(dif)(hys) Figure 5. Hysteresis of the Receiver +3.3 V +5 V 100 nF 8 3 TxD 1 RxD 20 pF V33 VCC 100 nF 4 7 CANH AMIS− V 30663 5 REF 60 W 6 CANL 2 GND RLT Figure 6. Test Circuit for Timing Characteristics http://onsemi.com 8 CLT 100 pF AMIS−30663 HIGH LOW TxD CANH CANL dominant 0,9V Vi(dif) = VCANH − VCANL 0,5V recessive RxD 0,7 x V33 0,3 x V33 t d(TxD−BUSon) t d(TxD−BUSoff) td(BUSon−RxD) t pd(dom−rec) t pd(rec−dom) td(BUSoff−RxD) Figure 7. Timing Diagram for AC Characteristics +3.3 V 100 nF +5 V V CC V 33 3 TxD 8 7 1 AMIS− 30663 RxD 10 nF Active Probe 6 Generator 6.2 k W CANH CANL 6.2 k W 4 5 2 20 pF 30 W Spectrum Anayzer 30 W V REF 47 nF GND Figure 8. Basic Test Set−up for Electromagnetic Measurement CANH CANL recessive VCM = 0.5*(VCANH+VCANL) V CM−step V CM−peak V CM−peak Figure 9. Common−mode Voltage Peaks (see measurement set−up Figure 8) http://onsemi.com 9 AMIS−30663 Soldering • Use a double−wave soldering method comprising a Introduction to Soldering Surface Mount Packages This text gives a very brief insight to a complex technology. A more in−depth account of soldering ICs can be found in the ON Semiconductor “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed−circuit boards (PCB) with high population densities. In these situations re−flow soldering is often used. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the PCB by screen printing, stencilling or pressure−syringe dispensing before package placement. Several methods exist for re−flowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical re−flow peak temperatures range from 215 to 250°C. The top−surface temperature of the packages should preferably be kept below 230°C. turbulent wave with high upward pressure followed by a smooth laminar wave. • For packages with leads on two sides and a pitch (e): 1. Larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the PCB; 2. Smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the PCB. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, the footprint must be placed at a 45° angle to the transport direction of the PCB. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is four seconds at 250°C. A mildly−activated flux will eliminate the need for removal of corrosive residues in most applications. Wave Soldering Manual Soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or PCBs with a high component density, as solder bridging and non−wetting can present major problems. To overcome these problems the double−wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: Fix the component by first soldering two diagonally− opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300°C. When using a dedicated tool, all other leads can be soldered in one operation within two to five seconds between 270 and 320°C. Re−flow Soldering Table 9. Soldering Process Soldering Method Wave Re−flow (Note 8) Not suitable Suitable Not suitable (Note 9) Suitable Suitable Suitable Not recommended (Notes 10 and 11) Suitable Not recommended (Note 12) Suitable Package BGA, SQFP HLQFP, HSQFP, HSOP, HTSSOP, SMS PLCC (Note 10), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO 8. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods.” 9. These packages are not suitable for wave soldering as a solder joint between the PCB and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 10. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 11. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 12. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. Company or Product Inquiries For more information about ON Semiconductor’s products or services visit our Web site at http://onsemi.com. http://onsemi.com 10 AMIS−30663 PACKAGE DIMENSIONS SOIC 8 CASE 751AZ−01 ISSUE O ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 11 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative AMIS−30663/D