SN54ALS245A, SN54AS245, SN74ALS245A, SN74AS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDAS272A – NOVEMBER 1994 – REVISED JANUARY 2003 D D D D 4.5-V to 5.5-V VCC Operation Max tpd of 5.5 ns at 5 V SN54ALS245A, SN54AS245 . . . FK PACKAGE (TOP VIEW) 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE B1 B2 B3 B4 B5 B6 B7 B8 A3 A4 A5 A6 A7 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 B1 B2 B3 B4 B5 A8 GND B8 B7 B6 1 A2 A1 DIR VCC OE SN54ALS245A . . . J OR W PACKAGE SN54AS245 . . . J PACKAGE SN74ALS245A . . . DB, DW, N, OR NS PACKAGE SN74AS245 . . . DW, N, OR NS PACKAGE (TOP VIEW) DIR A1 A2 A3 A4 A5 A6 A7 A8 GND 3-State Outputs Drive Bus Lines Directly pnp Inputs Reduce dc Loading description/ordering information ORDERING INFORMATION PDIP – N 0°C to 70°C SOIC – DW SOP – NS SSOP – DB –55°C to 125°C ORDERABLE PART NUMBER PACKAGE† TA Tube SN74ALS245A-1N SN74ALS245A-1N SN74ALS245AN SN74ALS245AN SN74AS245N SN74AS245N Tube SN74ALS245ADW Tape and reel SN74ALS245ADWR Tube SN74ALS245A-1DW Tape and reel SN74ALS245A-1DWR Tube SN74AS245DW Tape and reel SN74AS245DWR Tape and reel SN74ALS245ANSR ALS245A Tape and reel SN74ALS245A-1NSR ALS245A-1 Tape and reel SN74AS245NSR 74AS245 Tape and reel SN74ALS245ADBR G245A SNJ54ALS245AJ SNJ54ALS245AJ SNJ54AS245J SNJ54AS245J SNJ54ALS245AW SNJ54ALS245AW SNJ54ALS245AFK SNJ54ALS245AFK SNJ54AS245FK SNJ54AS245FK CDIP – J Tube CFP – W Tube LCCC – FK TOP-SIDE MARKING Tube ALS245A ALS245A 1 ALS245A-1 AS245 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ALS245A, SN54AS245, SN74ALS245A, SN74AS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDAS272A – NOVEMBER 1994 – REVISED JANUARY 2003 description/ordering information(continued) These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. The -1 version of the SN74ALS245A is identical to the standard version, except that the recommended maximum IOL is increased to 48 mA. There is no -1 version of the SN54ALS245A. FUNCTION TABLE INPUTS OE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation logic diagram, each gate (positive logic) DIR 1 19 A1 OE 2 18 B1 To Seven Other Channels absolute maximum ratings over operating free-air temperature range (SN54ALS245A, SN74ALS245A) (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI: All inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Package thermal impedance, θJA (see Note 1): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ALS245A, SN54AS245, SN74ALS245A, SN74AS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDAS272A – NOVEMBER 1994 – REVISED JANUARY 2003 recommended operating conditions (see Note 2) SN54ALS245A VCC VIH Supply voltage VIL IOH Low-level input voltage IOL Low level output current Low-level High-level input voltage SN74ALS245A MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 2 2 High-level output current UNIT V V 0.7 0.8 V – 12 – 15 mA 12 24 48† mA TA Operating free-air temperature – 55 125 0 70 °C † Applies only to the -1 version and only if VCC is between 4.75 V and 5.25 V NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = – 18 mA IOH = – 0.4 mA VCC = 4.5 V IOH = – 3 mA IOH = – 12 mA SN54ALS245A MIN TYP‡ MAX SN74ALS245A MIN TYP‡ MAX –1.5 –1.5 VCC – 2 2.4 II VCC = 4.5 V Control inputs A or B ports VCC = 5 5.5 5V V V 2 0.25 0.4 IOL = 24 mA IOL = 48 mA† VI = 7 V VI = 5.5 V 3.2 2 IOH = – 15 mA IOL= 12 mA VOL VCC – 2 2.4 3.2 UNIT 0.25 0.4 0.35 0.5 0.35 0.5 0.1 0.1 0.1 0.1 20 20 20 20 – 0.1 – 0.1 – 0.1 – 0.1 IIH Control inputs A or B ports§ VCC = 5 5.5 5V V, VI = 2 2.7 7V IIL Control inputs A or B ports§ 5V VCC = 5 5.5 V, 4V VI = 0 0.4 IO¶ VCC = 5.5 V, VO = 2.25 V Outputs high 30 48 30 45 ICC VCC = 5.5 V Outputs low 36 60 36 55 Outputs disabled 38 63 38 58 – 20 –112 – 30 –112 V mA µA mA mA mA † Applies only to the -1 version and only if VCC is between 4.75 V and 5.25 V ‡ All typical values are VCC = 5 V, TA = 25°C. § For I/O ports, the parameters IIH and IIL include the off-state output current. ¶ The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54ALS245A, SN54AS245, SN74ALS245A, SN74AS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDAS272A – NOVEMBER 1994 – REVISED JANUARY 2003 switching characteristics (see Figure 1) PARAMETER FROM (INPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX† SN54ALS245A SN74ALS245A TO (OUTPUT) tPLH tPHL A or B B or A tPZH tPZL OE A or B tPHZ tPLZ OE A or B MIN MAX MIN MAX 1 19 3 10 1 14 3 10 2 30 5 20 2 29 5 20 2 14 2 10 2 30 4 15 UNIT ns ns ns † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. absolute maximum ratings over operating free-air temperature range (SN54AS245, SN74AS245) (unless otherwise noted)‡ Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI: All inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Package thermal impedance, θJA (see Note 1): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 2) SN54AS245 VCC VIH Supply voltage VIL IOH Low-level input voltage IOL TA Low-level output current High-level input voltage SN74AS245 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 2 High-level output current 2 – 55 V V 0.8 0.8 V – 12 – 15 mA 64 mA 70 °C 48 Operating free-air temperature UNIT 125 0 NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ALS245A, SN54AS245, SN74ALS245A, SN74AS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDAS272A – NOVEMBER 1994 – REVISED JANUARY 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VOL II A or B ports MIN VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = – 18 mA IOH = – 2 mA VCC = 4.5 V IOH = – 3 mA IOH = – 12 mA VCC = 5 5.5 5V SN74AS245 TYP† MAX MIN –1.2 VCC – 2 2.4 –1.2 VCC – 2 2.4 3.2 3.2 UNIT V V 2 IOH = – 15 mA IOL = 48 mA VCC = 4 4.5 5V Control inputs SN54AS245 TYP† MAX TEST CONDITIONS 2 0.3 0.55 0.35 0.55 IOL = 64 mA VI = 7 V 0.1 0.1 VI = 5.5 V 0.1 0.1 50 20 70 70 IIH Control inputs A or B ports‡ 5V VCC = 5 5.5 V, 7V VI = 2 2.7 IIL Control inputs A or B ports‡ VCC = 5 5.5 5V V, VI = 0 0.4 4V IO§ VCC = 5.5 V, VO = 2.25 V Outputs high 62 97 62 97 ICC VCC = 5.5 V Outputs low 95 143 95 143 Outputs disabled 79 123 79 123 – 50 – 0.5 – 0.5 – 0.75 – 0.75 – 150 – 50 – 150 V mA µA mA mA mA † All typical values are VCC = 5 V, TA = 25°C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § The output conditions have been chosen to produce a current that closely approximates one-half of the true short-circuit output current, IOS. switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A or B B or A tPZH tPZL OE A or B tPHZ tPLZ OE A or B VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX¶ SN54AS245 SN74AS245 MIN MAX MIN MAX 2 9.5 2 7.5 2 9 2 7 2 11 2 9 2 10.5 2 8.5 2 7.5 2 5.5 2 12 2 9.5 UNIT ns ns ns ¶ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN54ALS245A, SN54AS245, SN74ALS245A, SN74AS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDAS272A – NOVEMBER 1994 – REVISED JANUARY 2003 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point From Output Under Test CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V tsu Data Input tw th 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATIONS 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ 3.5 V Input tPHZ 1.3 V 0.3 V tPHL tPLH VOL 0.3 V 0.3 V ≈0 V VOH In-Phase Output 1.3 V 1.3 V VOL tPLH tPHL VOH 1.3 V 1.3 V ≈3.5 V 1.3 V tPZH Waveform 2 S1 Open (see Note B) 1.3 V VOH Out-of-Phase Output (see Note C) 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 18-Jul-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty 84030012A ACTIVE LCCC FK 20 1 TBD 8403001RA ACTIVE CDIP J 20 1 TBD Lead/Ball Finish MSL Peak Temp (3) POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type 8403001SA ACTIVE CFP W 20 1 TBD A42 N / A for Pkg Type SN54ALS245AJ ACTIVE CDIP J 20 1 TBD A42 SNPB N / A for Pkg Type SN54AS245J ACTIVE CDIP J 20 1 TBD A42 SNPB N / A for Pkg Type SN74ALS245A-1DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS245A-1DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS245A-1DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS245A-1DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS245A-1N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS245A-1NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS245A-1NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS245A-1NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS245ADBLE OBSOLETE SSOP DB 20 SN74ALS245ADBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS245ADBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS245ADW ACTIVE SOIC DW 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS245ADWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS245ADWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS245AN ACTIVE PDIP N 20 CU NIPDAU N / A for Pkg Type TBD 25 Call TI Call TI 20 Pb-Free (RoHS) TBD Call TI 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SN74ALS245AN3 OBSOLETE PDIP N 20 SN74ALS245ANE4 ACTIVE PDIP N 20 SN74ALS245ANSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS245ANSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ALS245ANSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS245DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS245DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AS245DWR ACTIVE SOIC DW 20 2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Call TI PACKAGE OPTION ADDENDUM www.ti.com 18-Jul-2006 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74AS245DWRE4 ACTIVE SOIC DW 20 SN74AS245N ACTIVE PDIP N 20 20 SN74AS245NE4 ACTIVE PDIP N 20 20 SN74AS245NSR ACTIVE SO NS 20 SN74AS245NSRE4 ACTIVE SO NS 20 SNJ54ALS245AFK ACTIVE LCCC FK 20 1 TBD SNJ54ALS245AJ ACTIVE CDIP J 20 1 TBD SNJ54ALS245AW ACTIVE CFP W 20 1 TBD SNJ54AS245FK ACTIVE LCCC FK 20 1 TBD SNJ54AS245J ACTIVE CDIP J 20 1 TBD Lead/Ball Finish MSL Peak Temp (3) no Sb/Br) 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type A42 N / A for Pkg Type POST-PLATE N / A for Pkg Type A42 SNPB N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MLCC006B – OCTOBER 1996 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 28 TERMINAL SHOWN 18 17 16 15 14 13 NO. OF TERMINALS ** 12 19 11 20 10 A B MIN MAX MIN MAX 20 0.342 (8,69) 0.358 (9,09) 0.307 (7,80) 0.358 (9,09) 28 0.442 (11,23) 0.458 (11,63) 0.406 (10,31) 0.458 (11,63) 21 9 22 8 44 0.640 (16,26) 0.660 (16,76) 0.495 (12,58) 0.560 (14,22) 23 7 52 0.739 (18,78) 0.761 (19,32) 0.495 (12,58) 0.560 (14,22) 24 6 68 0.938 (23,83) 0.962 (24,43) 0.850 (21,6) 0.858 (21,8) 84 1.141 (28,99) 1.165 (29,59) 1.047 (26,6) 1.063 (27,0) B SQ A SQ 25 5 26 27 28 1 2 3 4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25) 0.020 (0,51) 0.010 (0,25) 0.055 (1,40) 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.045 (1,14) 0.035 (0,89) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) 4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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