NCP1509 Up to 500 mA, 1 MHz, High Efficiency Synchronous Step−Down DC−DC Converter in DFN Package http://onsemi.com The NCP1509 step−down PWM DC−DC converter is optimized for portable applications powered from 1−cell Li−ion or 3 cell Alkaline/NiCd/NiMH batteries. This DC−DC converter utilizes a current−mode control architecture for easy compensation and better line regulation. It also uses synchronous rectification to increase efficiency and reduce external part count. The NCP1509 optimizes efficiency in light load conditions when switched from a normal PWM mode to a “pulsed switching” mode. The device also has a built−in 1 MHz (nominal) oscillator for the PWM circuitry, or it can be synchronized to an external 500 kHz to 1000 kHz clock signal. Finally, it includes an integrated soft−start, cycle−by−cycle current limiting, and thermal shutdown protection. The NCP1509 is available in a space saving, low profile 3x3 mm 10 pin DFN package. MARKING DIAGRAM 1 1509 A L Y W Features 1 10 PIN DFN MN SUFFIX CASE 485C 1509 ALYW = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week • High Efficiency: • • • • • • • 92.5% for 1.8 V Output at 3.6 V Input and 125 mA Load Current 91% for 1.8 V Output at 3.6 V Input and 300 mA Load Current Digital Programmable Output Voltages: 1.05, 1.35, 1.57 or 1.8 V Output Current up to 500 mA at Vin = 3.6 V Low Quiescent Current of 14 mA in Pulsed Switching Mode Low 0.2 mA Shutdown Current −30°C to 85°C Operation Temperature Low Profile DFN Package Pb−Free Package is Available ORDERING INFORMATION Device Package Shipping† NCP1509MNR2 10 Pin DFN 3000 Tape & Reel NCP1509MNR2G 10 Pin DFN 3000 Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Application Cellular Phones, Smart Phones and PDAs Digital Still Cameras MP3 Players and Portable Audio Systems Wireless and DSL Modems Portable Equipment Vin 2.7 V − 5.2 V 5 4 Cin 10 mH 9 10 VCC LX VCCP SHD SYNC FB 3 6.8 mH 90 80 Vout Cout 22 mH 6 8 CB1 7 CB0 100 EFFICIENCY (%) • • • • • CB0 and CB1 Control Input 60 40 30 Vin = 3.6 V Vout = 1.8 V 10 0 0.001 Figure 1. Typical Application Circuit July, 2006 − Rev. 1 PWM Mode 50 20 GNDA GNDP © Semiconductor Components Industries, LLC, 2006 Pulsed Mode 70 0.01 0.1 1 Iout (mA) 10 100 1000 Figure 2. Efficiency vs. Output Current 1 Publication Order Number: NCP1509/D NCP1509 ISENS SENFET COMPENSATION RAMP FB 5 VCCA 4 VCCP ISENS − OA + 6 − CMP + ILIM DVR + CMP − Q1 DAMPING SWITCHING CONTROL PWM − CMP + GNDA CB0 CB1 6 PM ZCL 8 9 CONTROL BLOCK (PWM,PM) − CMP + SELECT LOGIC BANDGAP REFERENCE AND SOFT START SHD OVP 1 7 3 LX FB − CMP + Q2 DVR 2 THERMAL SHUTDOWN ENABLE DETECT MODE SELECTION SYNC DETECT AND TIMING BLOCK 10 GNDP SYNC Figure 3. Simplified Block Diagram PIN FUNCTION DESCRIPTION Pin Number Name Type Description 1 GNDA Analog GND Ground connection for the Analog Section of the IC. This is the GND for the FB, SYNC, CB0, CB1, PG and ENABLE pins. 2 GNDP Power GND Ground connection for the N−FET Power Stage. 3 LX Power Output 4 VCCP Power Input Power Supply Input for the Switching P−FET. 5 VCCA Power Input Power Supply Input for the Analog Section of the IC. 6 FB Analog Input Feedback voltage from the output of the power supply. 7 CB0 Analog Input Vout Selection Pin. This pin contains a pulldown resistor. 8 CB1 Analog Input Vout Selection Pin. This pin contains a pullup resistor. 9 SHD Analog Input Enable for Switching Regulator. This pin is active high to turn on the NCP1509. This pin contains an internal pulldown resistor. 10 SYNC Analog Input Synchronization input for the PWM converter. If a clock signal is present, the converter uses the rising edge for the turn on of the PFET. If this pin is low, the converter is in Low Iq Pulse mode. If this pin is high, the converter uses the internal oscillator for the PWM mode. This pin has an internal pulldown resistor to force the operation into the Pulse mode. Connection from Power MOSFETs to the Inductor. http://onsemi.com 2 NCP1509 MAXIMUM RATINGS Symbol Value Unit Maximum Voltage All Pins Rating Vmax 5.5 V Maximum Operating Voltage All Pins Vmax 5.2 V Thermal Resistance, Junction−to−Air RqJA 68.5 °C/W TA −30 to 85 °C VESD > 2500 > 150 V Moisture Sensitivity MSL Level 1 Storage Temperature Range Tstg −55 to 150 °C Junction Operating Temperature TJ −30 to 125 °C Operating Ambient Temperature Range ESD Withstand Voltage Human Body Model (Note 1) Machine Model (Note 1) Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model, 100 pF discharge through a 1.5 kW following specification JESD22/A114. Machine Model, 200 pF discharged through all pins following specification JESD22/A115. Latchup as per JESD78 Class II: > 100 mA. http://onsemi.com 3 NCP1509 ELECTRICAL CHARACTERISTICS (Vin = 3.6 V, Vo = 1.57 V, TA = 25°C, Fsyn = 600 kHz 50% Duty Cycle square wave for PWM mode; TA = –30 to 85°C for Min/Max values, unless otherwise noted. Characteristic Symbol Min Typ Max Unit Quiescent Current of SYNC Mode, Iout = 0 mA Iq PWM − 175 − mA Quiescent Current of PWM Mode, Iout = 0 mA Iq PWM − 185 − mA Iq Pulsed − 14 − mA Iq Off − 0.1 1.0 mA Vin 2.5 − 5.2 V Input Voltage Vsync −0.3 − Vcc + 0.3 V Frequency Operational Range Fsync 500 600 1000 kHz Minimum Synchronization Pulse Width Dcsync Min − 5.0 − % Maximum Synchronization Pulse Width Dcsync Max − 95 − % SYNC “H” Voltage Threshold Vsynch − 920 1200 mV SYNC “L” Voltage Threshold Vsyncl 400 830 − mV SYNC “H” Input Current, Vsync = 3.6 V Isynch − 2.2 − mA SYNC “L” Input Current, Vsync = 0 V Isyncl −0.5 − − mA Vcb −0.3 − Vcc + 0.3 V CB0, CB1 “H” Voltage Threshold Vcb h − 920 1200 mV CB0, CB1 “L” Voltage Threshold Vcb l 400 830 − mV CB0 “H” Input Current, CB = 3.6 V Icb0 h − 2.2 − mA CB0 “L” Input Current, CB = 0 V Icb0 l −0.5 − − mA CB1 “H” Input Current, CB = 3.6 V Icb1 h − 0.3 1.0 mA CB1 “L” Input Current, CB = 0 V Icb1 l − −2.2 − mA Vshd −0.3 − Vcc + 0.3 V VCC Pin Quiescent Current of Pulsed Mode, Iout = 0 mA Quiescent Current, SHD Low Input Voltage Range SYNC Pin Output Level Selection Pins Input Voltage Shutdown Pin Input Voltage SHD “H” Voltage Threshold Vshd h − 920 1200 mV SHD “L” Voltage Threshold Vshd l 400 830 − mV SHD “H” Input Current, SHD = 3.6 V Ishd h − 2.2 − mA SHD “L” Input Current, SHD = 0 V Ishd l −0.5 − − mA Input Voltage Vfb −0.3 − Vcc + 0.3 V Input Current, Vfb = 1.5 V Ifb − 5.0 7.5 mA Switching P−FET Current Limit Ilim − 800 − mA Duty Cycle (Note 2) DC − − 100 % Minimum On Time Ton(min) − 75 − nsec RDS(on) Switching P−FET and N−FET RDS(on) − 0.23 − W Ileak − 0 10 mA Feedback Pin SYNC PWM Mode Characteristics Switching P−FET and N−FET Leakage Current Output Overvoltage Threshold Vo − 3.0 − % Feedback Voltage Accuracy, Vout Set = 1.05 V CB0 = L, CB1 = L, Iout = 300 mA Vout 1.018 1.050 1.082 V http://onsemi.com 4 NCP1509 ELECTRICAL CHARACTERISTICS (Vin = 3.6 V, Vo = 1.57 V, TA = 25°C, Fsyn = 600 kHz 50% Duty Cycle square wave for PWM mode; TA = –30 to 85°C for Min/Max values, unless otherwise noted. Characteristic Symbol Min Typ Max Unit Feedback Voltage Accuracy, Vout Set = 1.35 V, CB0 = L, CB1 = H, Iout = 300 mA Vout 1.309 1.350 1.391 V Feedback Voltage Accuracy, Vout Set = 1.57 V, CB0 = H, CB1 = H, Iout = 300 mA Vout 1.523 1.570 1.617 V Feedback Voltage Accuracy, Vout Set = 1.8 V, CB0 = H, CB1 = L, Iout = 300 mA Vout 1.746 1.800 1.854 V Line Regulation, Vin = 2.7 V−3.6 V, Iout = 100 mA − −15 − +15 mV Line Regulation, Vin = 3.6 V−5.2 V, Iout = 100 mA − −15 − +15 mV Load Regulation, Iout = 100 mA−300 mA − −15 − +15 mV Load Transient Response, 10 to 100 mA Load Step Vout − 50 − mV Line Transient Response, Iout = 100 mA, 3.0 to 3.6 Vin Line Step Vout − "5.0 − mVpp Switching P−FET Current Limit Ilim − 800 − mA Duty Cycle (Note 2) DC − − 100 % Ton(min) − 75 − nsec Fosc 760 700 980 980 1240 1240 kHz RDS(on) − 0.23 − W Ileak − 0 10 mA Output Overvoltage Threshold Vo − 3.0 − % Feedback Voltage Accuracy, Vout Set = 1.05 V, CB0 = L, CB1 = L, Iout = 300 mA Vout 1.018 1.050 1.082 V Feedback Voltage Accuracy, Vout Set = 1.35 V, CB0 = L, CB1 = H, Iout = 300 mA Vout 1.309 1.350 1.391 V Feedback Voltage Accuracy, Vout Set = 1.57 V, CB0 = H, CB1 = H, Iout = 300 mA Vout 1.523 1.570 1.617 V Feedback Voltage Accuracy, Vout Set = 1.8 V, CB0 = H, CB1 = L, Iout = 300 mA Vout 1.746 1.800 1.854 V Line Regulation, Vin = 2.7 V−3.6 V, Iout = 100 mA − −15 − +15 mV Line Regulation, Vin = 3.6 V−5.2 V, Iout = 100 mA − −15 − +15 mV Load Regulation, Iout = 100 mA−300 mA − −15 − +15 mV Load Transient Response, 10 to 100 mA Load Step Vout − 50 − mV Line Transient Response, Iout = 100 mA, 3.0 to 3.6 Vin Line Step Vout − "5.0 − mVpp SYNC PWM Mode Characteristics (continued) PWM Mode with Internal Oscillator Characteristics Minimum On Time Internal Oscillator Frequency − TA = 25°C –30°C ≤ TA ≤ 85°C RDS(on) Switching P−FET and N_FET Switching P−FET and N−FET Leakage Current Pulsed Mode Characteristics Peak Current Limit Ilim − 200 − mA Output Current Iout 0.05 − 30 mA Output Ripple Voltage, Iout = 100 mA Vout − 22 100 mV Feedback Voltage Accuracy, Vout Set = 1.05 V, CB0 = L, CB1 = L Vout 1.018 1.050 1.082 V Feedback Voltage Accuracy, Vout Set = 1.35 V, CB0 = L, CB1 = H Vout 1.309 1.350 1.391 V Feedback Voltage Accuracy, Vout Set = 1.57 V, CB0 = H, CB1 = H Vout 1.523 1.570 1.617 V Feedback Voltage Accuracy, Vout Set = 1.8 V, CB0 = H, CB1 = L Vout 1.746 1.800 1.854 V 2. Maximum value is guaranteed by design. http://onsemi.com 5 NCP1509 100 100 90 95 70 60 1.8 Vout 1.57 Vout 1.35 Vout 50 EFFICIENCY (%) EFFICIENCY (%) 80 1.05 Vout 40 30 20 0 0 100 200 300 400 85 80 70 2.7 500 1.05 Vout 1.35 Vout Iout = 100 mA PWM TA = 25°C 3.2 3.7 Iout (mA) 90 3.6 Vin 5.2 Vin 50 40 30 20 Vout = 1.8 V PWM TA = 25°C 10 0 0 100 200 300 400 92 1.8 Vout 90 1.57 Vout 88 1.35 Vout 1.05 Vout 86 84 Vin = 3.6 V Iout = 150 mA PWM TA = 25°C 82 80 500 500 700 Iout (mA) 1500 90 80 1.8 Vout 90 EFFICIENCY (%) EFFICIENCY (%) 1300 100 92 84 1100 Figure 7. Efficiency vs. Frequency 94 86 900 FREQUENCY (kHz) Figure 6. Efficiency vs. Output Current at Different Input Voltage 88 5.2 94 2.7 Vin EFFICIENCY (%) EFFICIENCY (%) 60 4.7 Figure 5. Efficiency vs. Input Voltage in PWM Mode 80 70 4.2 Vin (V) Figure 4. Efficiency vs. Output Current in PWM Mode 100 1.8 Vout 90 75 Vin = 3.6 V PWM TA = 25°C 10 1.57 Vout 1.57 Vout 1.35 Vout 1.05 Vout Vin = 3.6 V 82 I = 300 mA PWM out TA = 25°C 80 500 700 900 70 1.57 Vout 60 50 40 1.8 Vout 1.35 Vout 1.05 Vout 30 20 Vin = 3.6 V PM TA = 25°C 10 1100 1300 0 0.001 1500 0.01 0.1 1 10 Iout (mA) FREQUENCY (kHz) Figure 8. Efficiency vs. Frequency Figure 9. Efficiency vs. Output Current in Pulsed Mode http://onsemi.com 6 100 NCP1509 20 2.0 Vin = 3.6 V Vout = 1.5 V TA = 25°C 16 1.8 PWM 1.57 Vout 12 Vout (V) Iin (mA) 1.8 Vout 1.6 Pulsed Mode 8 1.4 1.35 Vout 1.2 1.0 4 1.05 Vout Vin = 3.6 V PWM TA = 25°C 0.8 0 0 5 10 15 Iout (mA) 25 20 0.6 30 0 Figure 10. Input Current Comparison 2.0 1.8 Vout 1.8 Vout 1.57 Vout 1.7 10 Vout (V) DELTA Vout (mV) 20 0 −10 −20 1.35 Vout Vin = 3.6 V PWM TA = 25°C −30 −40 0 300 200 Iout (mA) 100 1.35 Vout 1.1 1.05 Vout 0.8 1.05 Vout 400 0.5 −40 500 Vin = 3.6 V Iout = 100 mA PWM −20 0 20 40 60 TEMPERATURE (°C) 80 100 Figure 13. Output Voltage vs. Temperature 1100 1100 Vin = 3.6 V Vout = 1.8 V Iout = 100 mA PWM 1050 FREQUENCY (kHz) FREQUENCY (kHz) 1.57 Vout 1.4 Figure 12. Load Regulation in PWM Mode 1050 500 400 Figure 11. Output Voltage vs. Output Current 40 30 300 200 Iout (mA) 100 1000 950 900 1000 950 Vout = 1.8 V Iout = 100 mA PWM TA = 25°C 900 850 −40 850 −20 0 20 40 60 80 100 2.7 TEMPERATURE (°C) 3.2 3.7 4.2 4.7 Vin (V) Figure 14. Oscillator Frequency vs. Temperature Figure 15. Oscillator Frequency vs. Input Voltage http://onsemi.com 7 5.2 NCP1509 2 1 1 0.5 0.5 0 Vin = 3.6 V Vout = 1.5 V PWM TA = 25°C 1.5 Vout (V) 1.5 Vout (V) 2 Vin = 3.6 V Vout = 1.5 V PWM TA = 25°C 0 0.2 0.4 0.6 0.8 1.0 1.2 0 1.4 0 0.2 0.4 0.6 0.8 1.0 1.2 VSHD (V) VCB (V) Figure 16. Output Voltage vs. Shutdown Pin Voltage Figure 17. Transition Level of CB Pins 1 ms/div 1.4 1 ms/div Figure 19. Heavy−Load PWM Switching Waveform (Vin = 3.6 V, Vout = 1.8 V, Iout = 300 mA) Figure 18. Light−Load PWM Switching Waveform (Vin = 3.6 V, Vout = 1.8 V, Iout = 30 mA) 1 ms/div Figure 21. Soft−Start (Vin = 3.6 V, Vout = 1.8 V, Iout = 150 mA) Figure 20. Pulsed Mode Switching Waveform (Vin = 3.6 V, Vout = 1.8 V, Iout = 30 mA) http://onsemi.com 8 NCP1509 Figure 23. Load Transient Response Figure 22. Line Transient Response Figure 24. Output Voltage Transition from 1.57 V to 1.8 V http://onsemi.com 9 NCP1509 DETAILED OPERATING DESCRIPTION Overview Switching will continue when the output voltage falls below the threshold of OVP comparator. The NCP1509 is a monolithic micro−power high frequency PWM step−down DC−DC converter specifically optimized for applications requiring high efficiency and a small PCB footprint such as portable battery powered products. It integrates synchronous rectification to improve efficiency as well as eliminate the external Schottky diode. High switching frequency allows for a low profile inductor and capacitors to be used. Four digital selectable output voltages (1.05, 1.35, 1.57 and 1.8 V) can be generated from the input supply that can range from 2.7−5.2 V. All loop compensation is integrated as well further reducing the external component count as well. The DC−DC converter has two operating modes (normal PWM, pulsed switching), which are intended to allow for optimum efficiency under either light (up to 30 mA) or heavy loads. The user determines the operating mode by controlling the SYNC input. In addition the SYNC input can be used to synchronize the PWM to an external system clock signal in the range of 500−1000 kHz. Pulsed Mode (PM) Under light load conditions (< 30 mA), NCP1509 can be configured to enter a low current pulsed mode operation to reduce power consumption. This is accomplished by SYNC pin held LOW. The output regulation is implemented by pulse frequency modulation. If the output voltage drops below the threshold of PM comparator (typically Vnom−2%), a new cycle will be initiated by the PM comparator to turn on the switch Q1. Q1 remains ON until 200 mA inductor peak current is reached. Then ILIM comparator goes high to switch off Q1. After a short dead time delay, switch rectifier Q2 is turn ON. The zero crossing comparator will detect when the inductor current drops to zero and send the signal to turn off Q2. The output voltage continues to decrease through discharging the output capacitor. When the output voltage falls below the threshold of PM comparator again, a new cycle starts immediately. Cycle−by−Cycle Current Limit PWM Operating Mode From the block diagram (Figure 3), an ILIM comparator is used to realize cycle−by−cycle current limit protection. The comparator compares the LX pin voltages with the reference voltage from the SENFET, which is biased by constant current. If the inductor current reaches the limit, ILIM comparator detects the LX voltage falling below the reference voltage from SENFET and releases the signal to turn off the switch Q1. The cycle−by−cycle current limit is set at 800 mA in PWM and 200 mA in PM. The NCP1509 can be set to current mode PWM operation by connecting SYNC pin to VCC. In this mode, the output voltage is regulated by modulating on−time pulse width of the main switch Q1 at a fixed frequency of 1 MHz. The switching of the PMOS Q1 is controlled by a flip−flop driven by the internal oscillator and a comparator that compares the error signal from an error amplifier with the sum of the sensed current signal and compensation ramp. At the beginning of each cycle, the main switch Q1 is turned ON by the rising edge of the internal oscillation clock. The inductor current ramps up until the sum of the current sense signal and compensation ramp becomes higher than the error voltage amplifier. Once this has occurred, the PWM comparator resets the flip−flop, Q1 is turned OFF and the synchronous switch Q2 is turned ON. Q2 replaces the external Schottky diode to reduce the conduction loss and improve the efficiency. To avoid overall power loss, a certain amount of dead time is introduced to ensure Q1 is completely turned OFF before Q2 is being turned ON. In continuous conduction mode (CCM), Q1 is turned ON after Q2 is completely turned OFF to start a new clock cycle. In discontinuous conduction mode (DCM), the zero crossing comparator (ZLC) will turn off Q2 when the inductor current drops to zero. Frequency Synchronization and Operating Mode Selection The SYNC pin can also be used for frequency synchronization by connecting it with an external clock signal. It operates in PWM mode when synchronized to an external clock. The switching cycle initiates by the rising edge of the clock. The synchronization clock signals between 0.4 V and 1.2 V from 500 kHz to 1000 kHz. Gating on and off the clock, the SYNC pin can also be used to select between PM and PWM modes. It allows efficient dynamical power management by adjusting the converter operation to the specific system requirement. Set SYNC pin low to select PM mode at light load conditions (up to 30 mA) and set SYNC pin high or connect with external clock to select PWM mode at heavy load condition to achieve optimum efficiency. Table 1 shows the mode selection with three different SYNC pin states. Overvoltage Protection The overvoltage protection circuit is present in PWM mode to prevent the output voltage from going too high under light load or fast load transient conditions. The output overvoltage threshold is 5% above nominal set value. If the output voltage rises above 5% of the nominal value, the OVP comparator is activated and switch Q1 is turned OFF. http://onsemi.com 10 NCP1509 Soft−Start Table 1. Operating Mode Selection SYNC Pin State The NCP1509 uses soft−start to limit the inrush current when the device is initially powered up or enabled. Soft−start is implemented by gradually increasing the reference voltage until it reaches the full reference voltage. During startup, a pulsed current source charges the internal soft−start capacitor to provide gradually increasing reference voltage for the PWM loop. When the voltage across the capacitor ramps up to the nominal reference voltage, the pulsed current source will be switched off and the reference voltage will switch to the regular reference voltage. From Figure 21, it show the soft−start time is about 1.5 ms. Operating Mode LOW Pulsed Mode (PM) HIGH PWM, 1 MHz Switch Frequency CLOCK PWM, Frequency Synchronization Output Voltage Selection The output voltage is digitally programmed to one of four voltage levels depending on the logic state of CB0 and CB1. Therefore if the NCP1509’s load, such as a digital cellular phone’s baseband processor, supports dynamic power management, the device can lower or raise its core voltage under software control. When combined with the pulsed current mode function in low load situations, this active voltage management further stretches the useful operating life of the handset between charges. Figure 24 shows a typical transition between 1.57 to 1.8 volts. The output voltage levels are listed in Table 2. The CB0 has a pull down resistor and the CB1 has a pullup resistor. The default output voltage is 1.35 V when CB0 and CB1 are floating. Shutdown Mode When the SHD pin has a voltage applied of less than 0.4 V, the NCP1509 will be disabled. In shutdown mode, the internal reference, oscillator and most of the control circuitries are turned off. Therefore, the typical current consumption will be 0.1 mA (typical value). Applying a voltage above 1.2 V to SHD pin will enable the device for normal operation. The device will go through soft−start to normal operation. Table 2. Truth Table for CB0 and CB1 with the corresponding output voltage Thermal Shutdown CB0 CB1 Vout(V) 0 0 1.05 0 1 1.35 1 1 1.57 1 0 1.8 Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. If the junction temperature exceeds 160°C, the device shuts down. In this mode switch Q1 and Q2 and the control circuits are all turned off. The device restarts in soft−start after the temperature drops below 135_C. This feature is provided to prevent catastrophic failures from accidental device overheating and it is not intended as a substitute for proper heatsinking. http://onsemi.com 11 NCP1509 APPLICATIONS INFORMATION Component Selection of the converter. The inductor needs to be selected by the required peak current. Equation 5 is the basic equation for an inductor and describes the voltage across the inductor. The inductance value determines the slope of the current of the inductor. Input Capacitor Selection In PWM operating mode, the input current is pulsating with large switching noise. Using an input bypass capacitor can reduce the peak current transients drawn from the input supply source, thereby reducing switching noise significantly. The capacitance needed for the input bypass capacitor depends on the source impedance of the input supply. The RMS capacitor current is calculated as: IRMS [ IO ǸD @ DȀ di VL + L L dt (eq. 1) The maximum RMS current occurs at 50% duty cycle with maximum output current, which is IO,max/2. For NCP1509, a low profile ceramic capacitor of 10 mF should be used for most of the cases. For effective bypass results, the input capacitor should be placed as close as possible to the VCC Pin. iL, pk−pk + + Ǔ Ǔ VO @ (1 * D ) 2 Ǹ3 @ L @ fs Vin 1 @ Vout fs (eq. 6) DiL, pk−pk 2 PCB Layout Recommendations Good PCB layout plays an important role in switching mode power conversion. Careful PCB layout can help to minimize ground bounce, EMI noise and unwanted feedbacks that can affect the performance of the converter. Hints suggested below can be used as a guideline in most situations. 1. Use star−ground connection to connect the IC ground nodes and capacitor GND nodes together at one point. Keep them as close as possible. And then connect this to the ground plane (if it is used) through several vias. This will reduce noise in ground plane by preventing the switching currents from flowing through the ground plane. 2. Place the power components (i.e., input capacitor, inductor and output capacitor) as close together as possible for best performance. All connecting traces must be short, direct, and thick to reduce voltage errors caused by resistive losses across these traces. 3. Separate the feedback path of the output voltage from the power path. Keep this path close to the NCP1509 circuit. And also route it away from noisy components. This will prevent noise from coupling into voltage feedback trace. (eq. 3) The RMS output capacitor current is given by: IRMS(Cout) + @ Therefore, the inductor must have a maximum current exceeding 405 mA. Since the compensation is fixed internally in the IC, the input and output capacitors as well as the inductor have a predetermined value too: Cin = 10 mF and Cout = 22 mF. Low ESR capacitors are needed for best performance. Therefore, ceramic capacitors are recommended. Please see Table 3 for recommended inductors and capacitors. Selecting the proper output capacitor is based on the desired output ripple voltage. Ceramic capacitors with low ESR values will have the lowest output ripple voltage and are strongly recommended. The output ripple voltage is given by: 1 4fsCout L L + 6.8 mH−10%, iL, pk−pk + 211 mA, iL, max + 405 mA (eq. 2) Output Capacitor Selection ǒ (Vin * Vout) @ DTs Vin, max + 4.2 V, Vout + 1.8 V, fs + 1 MHz−20%, Large value inductors will have small ripple current and low value inductor will have high ripple current. For NCP1509, the compensation is internally fixed and a fixed 6.8 mH inductor is needed for most of the applications. DVc + DiL @ ESR ) L Utilizing Equations 6, the peak−to−peak inductor current is calculated using the following worst−case conditions. Selecting the proper inductor value is based on the desired ripple current. The relationship between the inductance and the inductor ripple current is given by the equation in below. ǒ (Vin * Vout) iL, max + IO, max ) Inductor Value Selection V V DiL + out 1 * out Vin Lfs (eq. 5) Equation 5 is rearranged to solve for the change in current for the on−time of the converter in Continuous Conduction Mode. (eq. 4) Where fs is the switching frequency and ESR is the effective series resistance of the output capacitor. A low ESR, 22 mF ceramic capacitor is recommended for NCP1509 in most of applications. For example, with TDK C2012X5R0J226 output capacitor, the output ripple is less than 10 mV at 300 mA. Design Example As a design example, assume that the NCP1509 is used in a single lithium−ion battery application. The input voltage, Vin, is 3.0 V to 4.2 V. Output condition is Vout at 1.8 V with a typical load current of 120 mA and a maximum of 300 mA. For NCP1509, the inductor has a predetermined value, 6.8 mH. The inductor ESR will factor into the overall efficiency http://onsemi.com 12 NCP1509 The following shows NCP1509 demo board layout and suggested bill of materials. 4. Place the DC−DC converter away from noise sensitive circuitry, such as RF circuits. Interference with noise sensitive circuitry in the DC−DC converter can be reduced by distance between them. Figure 25. Top and Silkscreen Layer Figure 26. Soldermask Top and Silkscreen Layer http://onsemi.com 13 NCP1509 Figure 27. Bottom Layer Table 3. Bill of Materials Component Value Manufacturer Part Number Size (mm) Iout (mA) ESR (mW) Cin 10 mF, X5R, 6.3 V TDK Murata C2012X5R0J106 GRM21BR60J106 2.0 x 1.25 x 1.25 − − Cout 22 mF, X5R, 6.3 V TDK Murata C2012X5R0J226 GRM21BR60J226 2.0 x 1.25 x 1.25 − − L 6.8 mH TDK Coilcraft Coilcraft Sumida VLCF4020−6R8 0805PS−682 LPO4812 CLS4D11 4.0 x 4.0 x 2.0 3.4 x 3.0 x 1.8 4.8 x 4.8 x 1.2 4.9 x 4.9 x 1.2 500** 210* 340* 500** 146 1260 225 220 *Output current calculated from VCC = 4.2 Vmax, 1.5 Vout and Freq = 700 kHz (1.0 MHz − 20 %). **Calculated output current from VCC = 4.2 Vmax and Freq = 700 kHz exceeds 640 mA (Ilim − 20%). Therefore maximum output for these conditions shown as 500 mA. http://onsemi.com 14 NCP1509 PACKAGE DIMENSIONS 10 PIN DFN MN SUFFIX CASE 485C−01 ISSUE O −X− A M −Y− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION D APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. N B 2 PL 0.25 (0.010) T 2 PL 0.25 (0.010) T J R C −T− K SEATING PLANE E H L 10 DIM A B C D E F G H J K L M N P R MILLIMETERS MIN MAX 3.00 BSC 3.00 BSC 0.80 1.00 0.20 0.30 2.45 2.55 1.75 1.85 0.50 BSC 1.23 1.28 0.20 REF 0.00 0.05 0.35 0.45 1.50 BSC 1.50 BSC 0.88 0.93 0.60 0.80 INCHES MIN MAX 0.118 BSC 0.118 BSC 0.031 0.039 0.008 0.012 0.096 0.100 0.069 0.073 0.020 BSC 0.048 0.050 0.008 REF 0.000 0.002 0.014 0.018 0.059 BSC 0.059 BSC 0.035 0.037 0.024 0.031 G F P 1 10 PL D NOTE 3 0.10 (0.004) M T X Y For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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