ONSEMI NLU1GT32MUTCG

NLU1GT32
Single 2-Input OR Gate,
TTL Level
LSTTL−Compatible Inputs
The NLU1GT32 MiniGatet is an advanced CMOS high−speed
2−input OR gate in ultra−small footprint.
The device input is compatible with TTL−type input thresholds and
the output has a full 5.0 V CMOS level output swing.
The NLU1GT32 input and output structures provide protection
when voltages up to 7.0 V are applied, regardless of the supply
voltage.
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MARKING
DIAGRAMS
1
Features
•
•
•
•
•
•
•
•
High Speed: tPD = 3.7 ns (Typ) @ VCC = 5.0 V
Low Power Dissipation: ICC = 2 mA (Max) at TA = 25°C
TTL−Compatible Input: VIL = 0.8 V; VIH = 2.0 V
CMOS−Compatible Output:
VOH > 0.8 VCC; VOL < 0.1 VCC @ Load
Power Down Protection Provided on inputs
Balanced Propagation Delays
Ultra−Small Packages
These are Pb−Free Devices
1
1
1
IN B
1
6
VCC
IN A
2
5
NC
GND
3
4
5
M
IN B
5M
ULLGA6
1.0 x 1.0
CASE 613AD
5M
ULLGA6
1.2 x 1.0
CASE 613AE
5M
ULLGA6
1.45 x 1.0
CASE 613AF
5M
= Device Marking
= Date Code
PIN ASSIGNMENT
OUT Y
Figure 1. Pinout (Top View)
IN A
UDFN6
MU SUFFIX
CASE 517AA
1
IN B
2
IN A
3
GND
4
OUT Y
5
NC
6
VCC
FUNCTION TABLE
≥1
OUT Y
Input
Figure 2. Logic Symbol
Output
A
B
Y
L
L
H
H
L
H
L
H
L
H
H
H
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2009
July, 2009 − Rev. 4
1
Publication Order Number:
NLU1GT32/D
NLU1GT32
MAXIMUM RATINGS
Symbol
Value
Unit
VCC
DC Supply Voltage
−0.5 to +7.0
V
VIN
DC Input Voltage
−0.5 to +7.0
V
DC Output Voltage
−0.5 to +7.0
V
VIN < GND
−20
mA
VOUT < GND
±20
mA
VOUT
Parameter
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output Source/Sink Current
±12.5
mA
ICC
DC Supply Current Per Supply Pin
±25
mA
IGND
DC Ground Current per Ground Pin
±25
mA
TSTG
Storage Temperature Range
−65 to +150
°C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
260
°C
TJ
Junction Temperature Under Bias
150
°C
MSL
Moisture Sensitivity
FR
Flammability Rating
ILATCHUP
Level 1
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Latchup Performance Above VCC and Below GND at 125°C (Note 2)
mA
±500
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
2. Tested to EIA / JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
Positive DC Supply Voltage
VIN
Digital Input Voltage
VOUT
Output Voltage
TA
Operating Free−Air Temperature
Dt/DV
Input Transition Rise or Fall Rate
VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
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2
Min
Max
Unit
1.65
5.5
V
0
5.5
V
0
5.5
V
−55
+125
°C
0
0
100
20
ns/V
NLU1GT32
DC ELECTRICAL CHARACTERISTICS
TA = 25 5C
Symbol
Parameter
Conditions
VCC (V)
Min
1.2
1.4
2.0
VIH
Low−Level Input
Voltage
1.8
3.0
4.5 to 5.5
VIL
Low−Level Input
Voltage
1.8
3.0
4.5 to 5.5
VOH
High−Level Output
Voltage
VOL
Low−Level Output
Voltage
Typ
Max
TA = +855C
TA = −555C
to +1255C
Min
Min
1.2
1.4
2.0
0.3
0.53
0.8
VIN = VIH or VIL
IOH = −50 mA
3.0
4.5
2.9
4.4
VIN = VIH or VIL
IOH = −2 mA
IOH = −4 mA
IOH = −8 mA
1.8
3.0
4.5
1.40
2.58
3.94
VIN = VIH or VIL
IOL = 50 mA
3.0
4.5
VIN = VIH or VIL
IOL = 2 mA
IOL = 4 mA
IOL = 8 mA
Max
3.0
4.5
0
0
Max
1.2
1.4
2.0
0.3
0.53
0.8
V
0.3
0.53
0.8
2.9
4.4
2.9
4.4
1.38
2.48
3.80
1.37
2.34
3.66
Unit
V
V
0.1
0.1
0.1
0.1
0.1
0.1
1.8
3.0
4.5
0.36
0.36
0.36
0.44
0.44
0.44
0.52
0.52
0.52
V
IIN
Input Leakage
Current
0 v VIN v 5.5 V
0 to 5.5
±0.1
±1.0
±1.0
mA
ICC
Quiescent Supply
Current
0 v VIN v VCC
5.5
2.0
20
40
mA
ICCT
Quiescent Supply
Current
VIN = 3.4 V
5.5
1.35
1.50
1.65
mA
IOPD
Output Leakage
Current
VOUT = 5.5 V
0.0
0.5
5.0
10
mA
TA = +855C
TA = −555C
to +1255C
Min
Min
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Symbol
tPLH,
tPHL
Parameter
Propagation Delay, Input
A or B to Y
Max
Unit
1.65 to
1.95
CL = 15 pF
15.4
16.9
18.7
ns
CL = 50 pF
23.8
25.2
26.7
2.3 to 2.7
CL = 15 pF
10.4
11.2
13.2
CL = 50 pF
14.5
15.5
17.9
VCC (V)
3.0 to 3.6
4.5 to 5.5
CIN
Input Capacitance
CPD
Power Dissipation
Capacitance (Note 3)
Test
Condition
TA = 25 5C
Min
Typ
Max
Max
CL = 15 pF
4.8
7.9
9.5
11.5
CL = 50 pF
6.1
11.4
13.0
15.5
CL = 15 pF
3.7
5.5
6.5
8.0
CL = 50 pF
4.4
7.5
8.5
10.0
5.5
10
10
10.0
5.0
11
pF
pF
3. CPD is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without
load. Average operating current can be obtained by the equation ICC(OPR) = CPD • VCC • fin + ICC. CPD is used to determine the no−load
dynamic power consumption: PD = CPD • VCC2 • fin + ICC • VCC.
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3
NLU1GT32
Input A or B
50%
50% VCC
GND
tPLH
Output Y
tPHL
VOH
50% VCC
VOL
Figure 3. Switching Waveforms
VCC
OUTPUT
INPUT
CL*
*Includes all probe and jig capacitance.
A 1−MHz square input wave is recommended
for propagation delay tests.
Figure 4. Test Circuit
ORDERING INFORMATION
Package
Shipping†
UDFN6
(Pb−Free)
3000 / Tape & Reel
NLU1GT32AMX1TCG
ULLGA6, 1.45 x 1.0, 0.5P
(Pb−Free)
3000 / Tape & Reel
NLU1GT32BMX1TCG
ULLGA6, 1.2 x 1.0, 0.4P
(Pb−Free)
3000 / Tape & Reel
NLU1GT32CMX1TCG
ULLGA6, 1.0 x 1.0, 0.35P
(Pb−Free)
3000 / Tape & Reel
Device
NLU1GT32MUTCG
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
NLU1GT32
PACKAGE DIMENSIONS
UDFN6, 1.2x1.0, 0.4P
CASE 517AA−01
ISSUE B
EDGE OF PACKAGE
PIN ONE
REFERENCE
2X
0.10 C
ÉÉÉ
ÉÉÉ
ÉÉÉ
L1
E
DETAIL A
Bottom View
(Optional)
TOP VIEW
2X
EXPOSED Cu
0.10 C
(A3)
0.10 C
A1
A
10X
0.08 C
ÉÉÉ
ÉÉÉ
A3
DETAIL B
Side View
(Optional)
5X
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.127 REF
0.15
0.25
1.20 BSC
1.00 BSC
0.40 BSC
0.30
0.40
0.00
0.15
0.40
0.50
MOUNTING FOOTPRINT*
6X
6X
0.42
C
A1
DIM
A
A1
A3
b
D
E
e
L
L1
L2
MOLD CMPD
SEATING
PLANE
SIDE VIEW
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND
0.30 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
D
0.22
L
3
L2
6X
b
0.10 C A B
0.05 C
6
0.40
PITCH
4
e
NOTE 3
1.07
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
BOTTOM VIEW
http://onsemi.com
5
NLU1GT32
PACKAGE DIMENSIONS
ULLGA6 1.0x1.0, 0.35P
CASE 613AD−01
ISSUE A
PIN ONE
REFERENCE
0.10 C
ÉÉ
ÉÉ
ÉÉ
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
4. A MAXIMUM OF 0.05 PULL BACK OF THE
PLATED TERMINAL FROM THE EDGE OF THE
PACKAGE IS ALLOWED.
A
B
D
E
DIM
A
A1
b
D
E
e
L
L1
TOP VIEW
0.05 C
A
6X
0.05 C
MOUNTING FOOTPRINT
SOLDERMASK DEFINED*
SEATING
PLANE
SIDE VIEW
C
A1
e
5X
L
MILLIMETERS
MIN
MAX
−−−
0.40
0.00
0.05
0.12
0.22
1.00 BSC
1.00 BSC
0.35 BSC
0.25
0.35
0.30
0.40
5X
0.48
NOTE 4
3
1
6X
0.22
1.18
L1
0.53
6
4
6X
b
0.35
PITCH
DIMENSIONS: MILLIMETERS
0.10 C A B
BOTTOM VIEW
1
PKG
OUTLINE
0.05 C
NOTE 3
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
6
NLU1GT32
PACKAGE DIMENSIONS
ULLGA6 1.2x1.0, 0.4P
CASE 613AE−01
ISSUE A
PIN ONE
REFERENCE
0.10 C
ÉÉ
ÉÉ
ÉÉ
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
4. A MAXIMUM OF 0.05 PULL BACK OF THE
PLATED TERMINAL FROM THE EDGE OF THE
PACKAGE IS ALLOWED.
A
B
D
E
DIM
A
A1
b
D
E
e
L
L1
TOP VIEW
0.05 C
A
6X
0.05 C
MOUNTING FOOTPRINT
SOLDERMASK DEFINED*
SEATING
PLANE
SIDE VIEW
C
A1
e
5X
L
MILLIMETERS
MIN
MAX
−−−
0.40
0.00
0.05
0.15
0.25
1.20 BSC
1.00 BSC
0.40 BSC
0.25
0.35
0.35
0.45
5X
0.49
NOTE 4
3
1
1.24
L1
0.53
6
4
6X
b
0.10 C A B
BOTTOM VIEW
6X
0.26
0.05 C
NOTE 3
1
PKG
OUTLINE
0.40
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
7
NLU1GT32
PACKAGE DIMENSIONS
ULLGA6 1.45x1.0, 0.5P
CASE 613AF−01
ISSUE A
PIN ONE
REFERENCE
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
4. A MAXIMUM OF 0.05 PULL BACK OF THE
PLATED TERMINAL FROM THE EDGE OF THE
PACKAGE IS ALLOWED.
A
B
D
ÉÉÉ
ÉÉÉ
ÉÉÉ
E
DIM
A
A1
b
D
E
e
L
L1
TOP VIEW
0.10 C
0.05 C
A
6X
0.05 C
MOUNTING FOOTPRINT
SOLDERMASK DEFINED*
SEATING
PLANE
SIDE VIEW
5X
C
A1
e
5X
L
MILLIMETERS
MIN
MAX
−−−
0.40
0.00
0.05
0.15
0.25
1.45 BSC
1.00 BSC
0.50 BSC
0.25
0.35
0.30
0.40
0.49
NOTE 4
3
1
1.24
L1
0.53
6
4
BOTTOM VIEW
6X
0.30
6X
b
0.10 C A B
0.05 C
NOTE 3
1
PKG
OUTLINE
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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8
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For additional information, please contact your local
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NLU1GT32/D