ONSEMI NUS3116MTR2G

NUS3116MT
Main Switch Power
MOSFET and Dual Charging
BJT
-12 V, -6.2 A, mCoolE Single P-Channel
with Dual PNP low Vce(sat) Transistors,
3x3mm WDFN Package
This device integrates one high performance power MOSFET and
two low Vce(sat) transistors, greatly reducing the layout space and
optimizing charging performance in the battery-powered portable
electronics.
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MOSFET
V(BR)DSS
Applications
•Main Switch and Battery Charging Mux for Portable Electronics
•Optimized for Commercial PMUs from Top Suppliers (See Figure 2)
32 mW @ -4.5 V
-6.2 A
44 mW @ -2.5 V
Low Vce(sat) PNP (Wall)
VCEO MAX
VEBO MAX
IC MAX
-30 V
-8.0 V
-2.0 A
Low Vce(sat) PNP (USB)
VCEO MAX
VEBO MAX
IC MAX
-30 V
-8.0 V
-2.0 A
8
MARKING DIAGRAM
1
1
8
1
C
7
2
3
D
6
5
4
mCOOL™ 3x3 Pin Connections
(Top View)
Figure 1. Simple Schematic
ID MAX
-12 V
Features
•High Performance Power MOSFET
•Dual-Low Vce(sat) Transistors as Charging Power Mux
•3.0x3.0x0.8 mm WDFN Package
•Independent Pin-out Provides Circuit Flexibility
•Low Profile (<0.8 mm) for Easy Fit in Thin Environments
•This is a Pb-Free Device
RDS(on) TYP
DFN8
CASE 506BC
3116
AYWWG
G
3116
= Device Code
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb-Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NUS3116MTR2G
WDFN8
(Pb-Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2007
May, 2007 - Rev. 0
Publication Order Number:
NUS3116MT/D
NUS3116MT
P-Channel Power MOSFET Maximum Ratings (TJ = 25°C unless otherwise stated)
Parameter
Symbol
Value
Units
Drain-to-Source Voltage
VDSS
-12
V
Gate-to-Source Voltage
VGS
±8.0
V
ID
-5.47
A
Continuous Drain Current (Note 1)
Steady State
TA = 25°C
TA = 85°C
t≤5s
Power Dissipation (Note 1)
TA = 25°C
Steady State
TA = 25°C
t≤5s
Continuous Drain Current (Note 2, Minimum Pad)
-4.0
Steady State
TA = 25°C
-6.2
PD
2.2
ID
TA = 25°C
tp = 10 ms
Pulsed Drain Current
A
-4.4
TA = 85°C
Power Dissipation (Note 2)
W
1.7
-3.2
PD
1.14
W
IDM
-25
A
TJ, TSTG
-55 to 150
°C
Source Current (Body Diode)2
IS
-2.8
A
Lead Temperature for Soldering Purposes (1/8″ from case for 10 s)
TL
260
°C
Symbol
Max
Units
RqJA
110
°C/W
Junction-to-Ambient – t < 10 s (Note 2)
RqJA
56
°C/W
Junction-to-Ambient – Steady State (Note 1)
RqJA
72
°C/W
Junction-to-Ambient – t < 10 s (Note 1)
RqJA
40
°C/W
Operating Junction and Storage Temperature
THERMAL RESISTANCE RATINGS
Parameter
Junction-to-Ambient – Steady State (Note 2)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Surface-mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces)
2. Surface-mounted on FR4 board using the minimum recommended pad size of 0.5 in sq, 1 oz. Cu.
P-Channel MOSFET Electrical Characteristics (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
V(BR)DSS
VGS = 0 V, ID = -250 mA
-12.0
Drain-to-Source Breakdown
Voltage Temperature Coefficient
V(BR)DSS/TJ
ID = -250 mA, ref to 25°C
Zero Gate Voltage Drain Current
IDSS
Typ
Max
Units
OFF CHARACTERISTICS
Drain-to-Source Breakdown Voltage
Gate-to-Source Leakage Current
VGS = 0 V,
VDS = -12 V
V
-10.1
mV/°C
TJ = 25°C
-1.0
TJ = 125°C
-10
IGSS
VDS = 0 V, VGS = ±8 V
VGS(TH)
VGS = VDS, ID = -250 mA
mA
±200
nA
-1.1
V
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
VGS(TH)/TJ
Drain-to-Source On Resistance
RDS(on)
Forward Transconductance
gFS
-0.45
-0.67
2.68
mV/°C
VGS = -4.5 V, ID = -3.0 A
32
40
VGS = -2.5 V, ID = -3.0 A
44
50
VDS = -16 V, ID = -3.0 A
5.9
3. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%
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2
mW
S
NUS3116MT
P-Channel MOSFET Electrical Characteristics (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
CHARGES, CAPACITANCES AND GATE RESISTANCE
VGS = 0 V, f = 1.0 MHz,
VDS = -12 V
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
Total Gate Charge
QG(tot)
Threshold Gate Charge
QG(th)
Gate-to-Source Charge
QGS
2.2
Gate-to-Drain Charge
QGD
2.9
pF
1329
200
116
VGS = -4.5 V, VDS = -12 V,
ID = -3.0 A
nC
13
1.5
SWITCHING CHARACTERISTICS
VGS = -4.5 V, VDD = -12 V,
ID = -3.0 A, RG = 3.0
td(on)
Turn-On Delay Time
Rise Time
tr
Turn-Of f Delay Time
ns
8
17.5
td(off)
80
tf
56.5
Fall Time
DRAIN-SOURCE DIODE CHARACTERISTICS
Forward Recovery Voltage
VSD
Reverse Recovery Time
trr
Charge Time
ta
Discharge Time
Reverse Recovery Charge
VGS = 0 V,
IS = -1.0 A
TJ = 25°C
-0.66
TJ = 125°C
-0.54
VGS = 0 V,
dISD/dt = 100 A/ms,
IS = -1.0 A
-1.2
V
ns
70.8
14.3
tb
56.4
QRR
44
nC
3. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%
Dual-PNP Transistors Maximum Ratings (TJ = 25°C unless otherwise stated)
Parameter
Symbol
Value
Units
Collector-Emitter Voltage
VCEO
-30
V
Collector-Base Voltage
VCBO
-30
V
Emitter-Base Voltage
VEBO
-8.0
V
Collector Current, Continous
IC
-2.0
A
Collector Current, Pulsed (Note 4)
IC
-6.0
A
TJ, TSTG
-55 to 150
°C
PD
1.5
W
RqJA
83
°C/W
PD
810
mW
RqJA
155
°C/W
Operating Junction and Storage Temperature
Thermal Resistance Dissipation
Thermal Resistance (Note 5)
Thermal Resistance Dissipation
Thermal Resistance (Note 6)
4. Single Pulse: Pulse Width = 1 ms
5. Surface-mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces)
6. Surface-mounted on FR4 board using the minimum recommended pad size of 100 mm2, 1 oz. Cu.
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NUS3116MT
Dual-PNP Transistors Electrical Characteristics (TJ = 25°C unless otherwise stated)
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Collector-Emitter Voltage
VCEO
IC = -10 mA, IB = 0
-30
V
Collector-Base Voltage
VCBO
IC = -0.1 mA, IE = 0
-30
V
Emitter-Base Voltage
VEBO
IE = -0.1 mA, IC = 0
-8.0
V
Collector-Emitter Cutoff Current
ICES
VCES = -30 V
DC Current Gain (Note 7)
hFE
IC = -1.0 A, VCE = -2.0 V
100
200
-
DC Current Gain (Note 7)
hFE
IC = -2.0 A, VCE = -2.0 V
100
200
-
Collector-Emitter Saturation Voltage
VCE(sat)
IC = -1.0 A, IB = -0.01 A
0.22
V
Collector-Emitter Saturation Voltage
VCE(sat)
IC = -1.0 A, IB = -0.1 A
0.12
V
Collector-Emitter Saturation Voltage
VCE(sat)
IC = -2.0 A, IB = -0.2 A
0.24
V
Input Capacitance
Cibo
VEB = -0.5 V, f = 1.0 MHz
240
400
pF
Output Capacitance
Cobo
VCB = -3.0 V, f = 1.0 MHz
50
100
pF
OFF CHARACTERISTICS
-0.1
mA
ON CHARACTERISTICS
7. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%
from WALL
1
8
CHR_ctl
7
USB_ctl
6
BAT_FET_N
C
from USB
2
3
D
R_sns
5
4
Main Battery
Supply
Voltage
VDD
Figure 2. Typical Application Circuit
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4
NUS3116MT
TYPICAL CHARACTERISTICS - MOSFET
-1.7 - -8.0 V
-1.6 V
5
-1.5 V
4
VGS = -1.4 V
3
2
TJ = 25°C
0
1
2
3
4
5
TJ = 25°C
4
TJ = 100°C
3
TJ = -55°C
2
0
0.5
6
1.0
1.5
2.0
-V DS, DRAIN-TO-SOURCE VOLTAGE (V)
-V GS, GATE-T O-SOURCE VOLTAGE (V)
Figure 3. On-Region Characteristics
Figure 4. Transfer Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)
0
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)
5
1
1
0.05
VGS = 4.5 V
TJ = 100°C
0.04
TJ = 25°C
0.03
TJ = -55°C
0.02
1
2
3
4
5
6
-I D, DRAIN CURRENT (A)
0.05
TJ = 25°C
VGS = -2.5 V
0.04
VGS = -4.5 V
0.03
0.02
1
2
3
4
5
6
-I D, DRAIN CURRENT (A)
Figure 5. On-Resistance vs. Drain Current
Figure 6. On-Resistance vs. Drain Current and
Gate Voltage
1.6
10,000
VGS = 0 V
ID = -3 A
VGS = -4.5 V
TJ = 150°C
1.4
-I DSS, LEAKAGE (nA)
RDS(on), DRAIN-TO-SOURCE
RESISTANCE (NORMALIZED)
VDS ≥ -10 V
6
-I D, DRAIN CURRENT (A)
-I D, DRAIN CURRENT (A)
6
1.2
1,000
1.0
TJ = 100°C
0.8
0.6
-50
100
-25
0
25
50
75
100
125
150
2
4
6
8
10
TJ, JUNCTION TEMPERATURE (°C)
-V DS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 7. On-Resistance Variation with
Temperature
Figure 8. Drain-to-Source Leakage Current
vs. Voltage
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5
12
NUS3116MT
VDS = 0 V
VGS = 0 V
TJ = 25°C
C, CAPACITANCE (pF)
2400 Ciss
2000
1600
Ciss
1200
Crss
800
Coss
400
0
-4
-2
0
2
4
6
10
8
12
6
VDS
5
10
QT
8
4
VGS
3
Qgs
2
6
Qgd
4
ID = -3 A
TJ = 25°C
1
0
0
2
4
6
8
10
12
2
0
14
Qg, TOTAL GATE CHARGE (nC)
-V GS -V DS
GATE-T O-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (V)
Figure 10. Gate-to-Source and
Drain-to-Source Voltage vs. Total Charge
Figure 9. Capacitance Variation
10
1,000
-I S, SOURCE CURRENT (A)
VGS = 0 V
VDD = -12 V
ID = -3.0 A
VGS = -4.5 V
td(off)
100
tf
tr
10
td(on)
TJ = 25°C
1
TJ = -55°C
TJ = 150°C
0.1
0.01
1
1
10
0
100
0.2
0.4
0.6
0.8
1.0
RG, GATE RESISTANCE (W)
-V SD, SOURCE-TO-DRAIN VOLTAGE (V)
Figure 11. Resistive Switching Time Variation
vs. Gate Resistance
Figure 12. Diode Forward Voltage vs. Current
100
-I D, DRAIN CURRENT (A)
t, TIME (ns)
12
-V DS, DRAIN-TO-SOURCE VOLTAGE (V)
2800
-V GS, GATE-T O-SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS - MOSFET
Single Pulse
TC = 25°C
Mounted on 2″ sq.
FR4 board (0.5″ sq.
2 oz. Cu single
sided) with MOSFET
die operating.
100 ms
10
1 ms
10 ms
1
RDS(on) Limit
Thermal Limit
Package Limit
0.1
dc
0.01
0.1
1
10
-V DS, DRAIN-TO-SOURCE VOLTAGE (V)
Figure 13. Maximum Rated Forward Biased
Safe Operating Area
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6
100
NUS3116MT
TYPICAL CHARACTERISTICS - MOSFET
1
RqJA, EFFECTIVE TRANSIENT
THERMAL RESPONSE
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01 0.01
Single Pulse
0.001
1E-06
1E-05
1E-04
1E-03
1E-02
1E-01
t, TIME (s)
Figure 14. FET Thermal Response
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7
1E+00
1E+01
1E+02
1E+03
NUS3116MT
TJ = 25°C
0.45
0.40
0.35
0.30
0.25
0.20
IC/IB = 10
0.15
0.10
0.05
0
0.001
0.01
0.1
1
-55 °C
IC/IB = 100
25°C
150°C
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
0.001
0.01
0.1
1
10
IC, COLLECTOR CURRENT (A)
IC, COLLECTOR CURRENT (A)
Figure 15. Collector Emitter Saturation Voltage
vs. Collector Current
Figure 16. Collector Emitter Saturation Voltage
vs. Collector Current
1.0
725
675
625
575
525
475
425
375
325
275
225
175
125
75
IC/IB = 100
150°C (2.0 V)
25°C (2.0 V)
-55 °C (2.0 V)
-55 °C
0.9
0.8
25°C
0.7
0.6
150°C
0.5
0.4
0.3
0.2
0.001
0.01
0.1
1
10
0.001
0.9
0.01
0.1
1
10
IC, COLLECTOR CURRENT (A)
IC, COLLECTOR CURRENT (A)
Figure 17. DC Current Gain vs. Collector
Current
Figure 18. Base Emitter Saturation Voltage vs.
Collector Current
1.0
VBE(on), BASE EMITTER
TURN-ON VOLTAGE (V)
0.60
0.55
0.50
10
VBE(sat), BASE EMITTER
SATURATION VOLTAGE (V)
hFE, DC CURRENT GAIN
IC/IB = 100
VCE(sat), COLLECTOR EMITTER
SATURATION VOLTAGE (V)
0.60
0.55
0.50
VCE = -1.0 V
-55 °C
0.8
0.7
25°C
0.6
0.5
150°C
0.4
0.3
0.2
0.001
0.01
0.1
1
10
VCE, COLLECTOR-EMITTER VOLTAGE (V)
VCE(sat), COLLECTOR EMITTER
SATURATION VOLTAGE (V)
TYPICAL CHARACTERISTICS - BJT
1.0
10 mA
100 mA 300 mA
500 mA
0.8
0.6
0.4
0.2
0
0.01
IC, COLLECTOR CURRENT (A)
0.1
1
10
IB, BASE CURRENT (mA)
Figure 19. Base Emitter Turn-On Voltage vs.
Collector Current
Figure 20. Saturation Region
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8
100
NUS3116MT
TYPICAL CHARACTERISTICS - BJT
90
Cobo, OUTPUT CAPACITANCE (pF)
Cibo, INPUT CAPACITANCE (pF)
300
275
250
225
200
175
150
125
80
70
60
50
40
30
20
100
0
1
2
3
4
5
6
0
7
5
10
15
20
25
30
35
VEB, EMITTER BASE VOLTAGE (V)
VCB, COLLECTOR BASE VOLTAGE (V)
Figure 21. Input Capacitance
Figure 22. Output Capacitance
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40
45
NUS3116MT
PACKAGE DIMENSIONS
DFN8, 3x3, 0.65P
CASE 506BC-01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30mm.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
D
B
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
PIN ONE
REFERENCE
2X
0.10 C
E
DIM
A
A1
A3
b
D
D2
D3
E
E2
e
G2
G3
K
L
TOP VIEW
2X
0.10 C
(A3)
0.05 C
A
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.05
0.20 REF
0.25
0.35
3.00 BSC
1.00
1.20
0.95
1.15
3.00 BSC
1.70
1.90
0.65 BSC
0.15 REF
0.20 REF
0.20
--0.25
0.45
8X
0.05 C
SEATING
PLANE
SIDE VIEW
A1
SOLDERING FOOTPRINT*
C
G3
8X
L
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
3.30
1
G2
D2
D3
e
1
1.28
4
2.55
1.10
2X
8X
K
8
5
STYLE 1:
PIN 1. EMITTER1
2. EMITTER2
3. COLLECTOR
4. SOURCE
5. DRAIN
6. GATE
7. BASE2
8. BASE1
E2
1.80
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
ÇÇ
8X
0.35
1.15
0.65
PITCH
8X
0.52
DIMENSIONS: MILLIMETERS
8X
b
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
0.10 C A B
BOTTOM VIEW
0.05 C
NOTE 3
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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NUS3116MT/D